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1. 发明授权

US09710306B2 Methods and apparatus for auto-throttling encapsulated compute tasks 有权
公开(公告)号：US09710306B2
公开(公告)日：2017-07-18
申请号：US13442730
申请日：2012-04-09
申请人： Jerome F. Duluk, Jr. , Jesse David Hall , Philip Alexander Cuadra , Karim M. Abdalla
发明人： Jerome F. Duluk, Jr. , Jesse David Hall , Philip Alexander Cuadra , Karim M. Abdalla
IPC分类号： G06F9/46 , G06F9/48 , G06F9/50
CPC分类号： G06F9/4881 , G06F9/5016 , G06F2209/483
摘要： Systems and methods for auto-throttling encapsulated compute tasks. A device driver may configure a parallel processor to execute compute tasks in a number of discrete throttled modes. The device driver may also allocate memory to a plurality of different processing units in a non-throttled mode. The device driver may also allocate memory to a subset of the plurality of processing units in each of the throttling modes. Data structures defined for each task include a flag that instructs the processing unit whether the task may be executed in the non-throttled mode or in the throttled mode. A work distribution unit monitors each of the tasks scheduled to run on the plurality of processing units and determines whether the processor should be configured to run in the throttled mode or in the non-throttled mode.

2. 发明申请

US20130268942A1 METHODS AND APPARATUS FOR AUTO-THROTTLING ENCAPSULATED COMPUTE TASKS 有权
标题翻译：用于自动曲轴加密计算机任务的方法和装置
公开(公告)号：US20130268942A1
公开(公告)日：2013-10-10
申请号：US13442730
申请日：2012-04-09
申请人： Jerome F. DULUK, JR. , Jesse David Hall , Philip Alexander Cuadra , Karim M. Abdalla
发明人： Jerome F. DULUK, JR. , Jesse David Hall , Philip Alexander Cuadra , Karim M. Abdalla
IPC分类号： G06F9/46
CPC分类号： G06F9/4881 , G06F9/5016 , G06F2209/483
摘要： Systems and methods for auto-throttling encapsulated compute tasks. A device driver may configure a parallel processor to execute compute tasks in a number of discrete throttled modes. The device driver may also allocate memory to a plurality of different processing units in a non-throttled mode. The device driver may also allocate memory to a subset of the plurality of processing units in each of the throttling modes. Data structures defined for each task include a flag that instructs the processing unit whether the task may be executed in the non-throttled mode or in the throttled mode. A work distribution unit monitors each of the tasks scheduled to run on the plurality of processing units and determines whether the processor should be configured to run in the throttled mode or in the non-throttled mode.
摘要翻译：自动调节封装计算任务的系统和方法。设备驱动器可以配置并行处理器来执行多个离散节流模式中的计算任务。设备驱动器还可以以非节流模式将存储器分配给多个不同的处理单元。在每个节流模式中，设备驱动器还可以向多个处理单元的子集分配存储器。为每个任务定义的数据结构包括一个标志，指示处理单元是否可以在非节流模式或节流模式下执行任务。工作分配单元监视计划在多个处理单元上运行的任务，并且确定处理器是否应被配置为以节流模式或非节流模式运行。

3. 发明授权

US09965321B2 Error checking in out-of-order task scheduling 有权
公开(公告)号：US09965321B2
公开(公告)日：2018-05-08
申请号：US13316344
申请日：2011-12-09
申请人： Jerome F. Duluk, Jr. , Timothy John Purcell , Jesse David Hall , Philip Alexander Cuadra
发明人： Jerome F. Duluk, Jr. , Timothy John Purcell , Jesse David Hall , Philip Alexander Cuadra
IPC分类号： G06F9/46 , G06F9/48
CPC分类号： G06F9/4843
摘要： One embodiment of the present invention sets forth a technique for error-checking a compute task. The technique involves receiving a pointer to a compute task, storing the pointer in a scheduling queue, determining that the compute task should be executed, retrieving the pointer from the scheduling queue, determining via an error-check procedure that the compute task is eligible for execution, and executing the compute task.

4. 发明授权

US08922555B2 Pixel shader output map 有权
标题翻译：像素着色器输出图
公开(公告)号：US08922555B2
公开(公告)日：2014-12-30
申请号：US12898998
申请日：2010-10-06
申请人： Jerome F. Duluk, Jr. , Jesse David Hall , Patrick R. Brown , Mark Dennis Stadler
发明人： Jerome F. Duluk, Jr. , Jesse David Hall , Patrick R. Brown , Mark Dennis Stadler
IPC分类号： G06T15/00
CPC分类号： G06T15/005
摘要： One embodiment of the present invention sets forth a technique for storing only the enabled components for each enabled vector and writing only enabled components to one or more specified render targets. A shader program header (SPH) file provides per-component mask bits for each render target. Each enabled mask bit indicates that the pixel shader generates the corresponding component as an output to the raster operations unit. In the hardware, the per-component mask bits are combined with the applications programming interface (API)-level per-component write masks to determine the components that are updated by the shader program. The combined mask is used as the write enable bits for components in one or more render targets. One advantage of the combined mask is that the components that are not updated are not forwarded from the pixel shader to the ROP, thereby saving bandwidth between those processing units.
摘要翻译：本发明的一个实施例提出了一种用于仅存储每个启用向量的启用组件并仅将启用的组件写入一个或多个指定的渲染目标的技术。着色器程序头（SPH）文件为每个渲染目标提供每个组件掩码位。每个启用的屏蔽位指示像素着色器生成相应的组件作为光栅操作单元的输出。在硬件中，每个组件掩码位与应用程序编程接口（API）级的每个组件写入掩码相结合，以确定由着色器程序更新的组件。组合掩码用作一个或多个渲染目标中的组件的写使能位。组合掩码的一个优点是未更新的组件不会从像素着色器转发到ROP，从而节省了这些处理单元之间的带宽。

5. 发明授权

US08786618B2 Shader program headers 有权
标题翻译：着色器程序标题
公开(公告)号：US08786618B2
公开(公告)日：2014-07-22
申请号：US12899431
申请日：2010-10-06
申请人： Jerome F. Duluk, Jr. , Jesse David Hall , Patrick R. Brown , Gernot Schaufler , Mark D. Stadler
发明人： Jerome F. Duluk, Jr. , Jesse David Hall , Patrick R. Brown , Gernot Schaufler , Mark D. Stadler
IPC分类号： G06T1/00
CPC分类号： G06T15/005
摘要： One embodiment of the present invention sets forth a technique for configuring a graphics processing pipeline (GPP) to process data according to one or more shader programs. The method includes receiving a plurality of pointers, where each pointer references a different shader program header (SPH) included in a plurality of SPHs, and each SPH is associated with a different shader program that executes within the GPP. For each SPH included in the plurality of SPHs, one or more GPP configuration parameters included in the SPH are identified, and the GPP is adjusted based on the one or more GPP configuration parameters.
摘要翻译：本发明的一个实施例提出了一种用于配置图形处理流水线（GPP）以根据一个或多个着色器程序处理数据的技术。该方法包括接收多个指针，其中每个指针引用包括在多个SPH中的不同着色器程序头（SPH），并且每个SPH与在GPP内执行的不同着色器程序相关联。对于包括在多个SPH中的每个SPH，识别包括在SPH中的一个或多个GPP配置参数，并且基于一个或多个GPP配置参数来调整GPP。

6. 发明申请

US20110072211A1 Hardware For Parallel Command List Generation 审中-公开
标题翻译：用于并行命令列表生成的硬件
公开(公告)号：US20110072211A1
公开(公告)日：2011-03-24
申请号：US12853161
申请日：2010-08-09
申请人： Jerome F. DULUK, JR. , Jesse David Hall , Henry Packard Moreton , Patrick R. Brown
发明人： Jerome F. DULUK, JR. , Jesse David Hall , Henry Packard Moreton , Patrick R. Brown
IPC分类号： G06F9/38 , G06T1/00 , G06F12/08
CPC分类号： G06F9/461 , G06F12/00
摘要： A method for providing state inheritance across command lists in a multi-threaded processing environment. The method includes receiving an application program that includes a plurality of parallel threads; generating a command list for each thread of the plurality of parallel threads; causing a first command list associated with a first thread of the plurality of parallel threads to be executed by a processing unit; and causing a second command list associated with a second thread of the plurality of parallel threads to be executed by the processing unit, where the second command list inherits from the first command list state associated with the processing unit.
摘要翻译：一种在多线程处理环境中通过命令列表提供状态继承的方法。该方法包括接收包括多个并行线程的应用程序; 生成所述多个并行线程中的每个线程的命令列表; 使与所述多个并行线程中的第一线程相关联的第一命令列表由处理单元执行; 并且使得与所述多个并行线程的第二线程相关联的第二命令列表由所述处理单元执行，其中所述第二命令列表从与所述处理单元相关联的所述第一命令列表状态中继承。

7. 发明授权

US09275491B2 GPU work creation and stateless graphics in OPENGL 有权
标题翻译： GPU工作创建和无状态图形在OPENGL
公开(公告)号：US09275491B2
公开(公告)日：2016-03-01
申请号：US13078878
申请日：2011-04-01
申请人： Jeffrey A. Bolz , Jesse David Hall , Jerome F. Duluk, Jr. , Patrick R. Brown , Gregory Scott Palmer
发明人： Jeffrey A. Bolz , Jesse David Hall , Jerome F. Duluk, Jr. , Patrick R. Brown , Gregory Scott Palmer
IPC分类号： G06T15/00 , G06T15/80 , G06T1/60 , G06F9/30 , G06F9/38 , G06T1/00
CPC分类号： G06T15/005 , G06F9/3009 , G06F9/3851 , G06F9/3879 , G06F9/3891 , G06T1/00 , G06T1/60 , G06T15/80
摘要： One embodiment of the present invention sets forth a method for generating work to be processed by a graphics pipeline residing within a graphics processor. The method includes the steps of receiving an indication that a first graphics workload is to be submitted to a command queue associated with the graphics processor, allocating a first portion of shader accessible memory for one or more units of state information that are necessary for processing the first graphics workload, populating the first portion of shader accessible memory with the one or more units of state information, and transmitting to the command queue of the graphics processor the one or more units of state information stored within the first portion of shader accessible memory, wherein the first graphics workload is processed within the graphics pipeline based on the one or more units of state information.
摘要翻译：本发明的一个实施例提出了一种用于产生要由位于图形处理器内的图形管线处理的工作的方法。该方法包括以下步骤：接收将要向第一图形工作负载提交到与图形处理器相关联的命令队列的指示，为处理所述图形处理所需的一个或多个状态信息单元分配着色器可访问存储器的第一部分第一图形工作负载，用一个或多个状态信息单元填充着色器可访问存储器的第一部分，以及向存储在着色器可访问存储器的第一部分内的一个或多个状态信息单元传送到图形处理器的命令队列，其中基于所述一个或多个状态信息单元在所述图形流水线内处理所述第一图形工作负载。

8. 发明授权

US08766988B2 Providing pipeline state through constant buffers 有权
标题翻译：通过恒定缓冲区提供流水线状态
公开(公告)号：US08766988B2
公开(公告)日：2014-07-01
申请号：US12899454
申请日：2010-10-06
申请人： Jerome F. Duluk, Jr. , Jesse David Hall
发明人： Jerome F. Duluk, Jr. , Jesse David Hall
IPC分类号： G06T1/20 , G06T1/00 , G06F15/00
CPC分类号： G06T1/20 , G06F9/30087 , G06F9/3851 , G06F9/3887
摘要： One embodiment of the present invention sets forth a technique for providing state information to one or more shader engines within a processing pipeline. State information received from an application accessing the processing pipeline is stored in constant buffer memory accessible to each of the shader engines. The shader engines can then retrieve the state information during execution.
摘要翻译：本发明的一个实施例提出了一种用于向处理流水线内的一个或多个着色引擎提供状态信息的技术。从访问处理流水线的应用程序接收到的状态信息存储在每个着色引擎可访问的恒定缓冲存储器中。着色器引擎可以在执行期间检索状态信息。

9. 发明申请

US20110242119A1 GPU Work Creation and Stateless Graphics in OPENGL 有权
标题翻译： GPU工作创建和无状态图形在OPENGL
公开(公告)号：US20110242119A1
公开(公告)日：2011-10-06
申请号：US13078878
申请日：2011-04-01
申请人： Jeffrey A. BOLZ , Jesse David Hall , Jerome F. Duluk, JR. , Patrick R. Brown , Gregory Scott Palmer
发明人： Jeffrey A. BOLZ , Jesse David Hall , Jerome F. Duluk, JR. , Patrick R. Brown , Gregory Scott Palmer
IPC分类号： G06T15/00
CPC分类号： G06T15/005 , G06F9/3009 , G06F9/3851 , G06F9/3879 , G06F9/3891 , G06T1/00 , G06T1/60 , G06T15/80
摘要： One embodiment of the present invention sets forth a method for generating work to be processed by a graphics pipeline residing within a graphics processor. The method includes the steps of receiving an indication that a first graphics workload is to be submitted to a command queue associated with the graphics processor, allocating a first portion of shader accessible memory for one or more units of state information that are necessary for processing the first graphics workload, populating the first portion of shader accessible memory with the one or more units of state information, and transmitting to the command queue of the graphics processor the one or more units of state information stored within the first portion of shader accessible memory, wherein the first graphics workload is processed within the graphics pipeline based on the one or more units of state information.
摘要翻译：本发明的一个实施例提出了一种用于产生要由位于图形处理器内的图形管线处理的工作的方法。该方法包括以下步骤：接收将要向第一图形工作负载提交到与图形处理器相关联的命令队列的指示，为处理所述图形处理所需的一个或多个状态信息单元分配着色器可访问存储器的第一部分第一图形工作负载，用一个或多个状态信息单元填充着色器可访问存储器的第一部分，以及向存储在着色器可访问存储器的第一部分内的一个或多个状态信息单元传送到图形处理器的命令队列，其中基于所述一个或多个状态信息单元在所述图形流水线内处理所述第一图形工作负载。

10. 发明申请

US20130152094A1 ERROR CHECKING IN OUT-OF-ORDER TASK SCHEDULING 有权
标题翻译：错误检查在超时任务调度
公开(公告)号：US20130152094A1
公开(公告)日：2013-06-13
申请号：US13316344
申请日：2011-12-09
申请人： Jerome F. Duluk, JR. , Timothy John Purcell , Jesse David Hall , Phlip Alexander Cuadra
发明人： Jerome F. Duluk, JR. , Timothy John Purcell , Jesse David Hall , Phlip Alexander Cuadra
IPC分类号： G06F9/46
CPC分类号： G06F9/4843
摘要： One embodiment of the present invention sets forth a technique for error-checking a compute task. The technique involves receiving a pointer to a compute task, storing the pointer in a scheduling queue, determining that the compute task should be executed, retrieving the pointer from the scheduling queue, determining via an error-check procedure that the compute task is eligible for execution, and executing the compute task.
摘要翻译：本发明的一个实施例提出了一种用于错误检查计算任务的技术。该技术涉及接收指向计算任务的指针，将指针存储在调度队列中，确定应该执行计算任务，从调度队列检索指针，经由错误检查程序确定计算任务是否符合执行和执行计算任务。

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