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    • 2. 发明授权
    • Method for arbitrating multiple memory access requests in a unified memory architecture via a non unified memory controller
    • 通过非统一存储器控制器在统一存储器架构中仲裁多个存储器访问请求的方法
    • US06317813B1
    • 2001-11-13
    • US09314245
    • 1999-05-18
    • Jen-Pin SuChun-Chieh WuWen-Hsiang LinTsan-hui Chen
    • Jen-Pin SuChun-Chieh WuWen-Hsiang LinTsan-hui Chen
    • G06F1200
    • G06F13/18
    • In a memory controller system, a method for granting a system memory by a memory request arbitrator to a request among a plurality of pending memory access requests is provided. The plurality of the memory access requests includes Rfrsh_Hreq, Crt_Hreq, Group AB, Crt_Lreq and Rfrsh_Lreq and are respectively asserted by a host control circuitry and/or a graphical control circuitry which are implemented and integrated on a single monolithic semiconductor chip. The host control circuitry and the graphical control circuitry shares the system memory and the memory request arbitrator includes a refresh queue and the graphics control circuitry includes a CRT FIFO. The method prioritizes the plurality of the memory access requests in order of Rfrsh_Hreq>Crt_Hreq>Group AB>Crt_Lreq>Rfrsh_Lreq. The Rfsh_Hreq is memory refresh request signal of first type whenever the refresh queue being full, the Crt_Hreq is memory access signal of a first type for fueling the CRT FIFO with display data, the Group AB are memory access request signals of a second type output either from the graphical control circuitry or the host control circuitry, the Crt_Lreq is memory access signal of a third type for fueling the CRT FIFO with display data, the Rfrsh_Lreq is memory refresh request signal of second type whenever the refresh queue being non-empty.
    • 在存储器控制器系统中,提供了一种通过存储器请求仲裁器将系统存储器授予多个未决存储器访问请求中的请求的方法。 多个存储器访问请求包括Rfrsh_Hreq,Crt_Hreq,组AB,Crt_Lreq和Rfrsh_Lreq,并且分别由实现并集成在单个单片半导体芯片上的主机控制电路和/或图形控制电路断言。 主机控制电路和图形控制电路共享系统存储器,并且存储器请求仲裁器包括刷新队列,并且图形控制电路包括CRT FIFO。 该方法按照Rfrsh_Hreq> Crt_Hreq> Group AB> Crt_Lreq> Rfrsh_Lreq的顺序对多个存储器访问请求进行优先级排序。 Rfsh_Hreq是刷新队列满时的第一种类型的存储器刷新请求信号,Crt_Hreq是用于向显示数据供给CRT FIFO的第一种存储器访问信号,组AB是第二类型输出的存储器访问请求信号 从图形控制电路或主机控制电路,Crt_Lreq是用于向CRT FIFO加载显示数据的第三种存储器访问信号,每当刷新队列不为空时,Rfrsh_Lreq是第二类型的存储器刷新请求信号。
    • 5. 发明授权
    • Ternary nitride-based buffer layer of a nitride-based light-emitting device and a method for manufacturing the same
    • 氮化物系发光元件的三元氮化物系缓冲层及其制造方法
    • US07497905B2
    • 2009-03-03
    • US10711567
    • 2004-09-24
    • Chen OuWen-Hsiang LinShih-Kuo Lai
    • Chen OuWen-Hsiang LinShih-Kuo Lai
    • C30B25/02
    • H01L33/007H01L21/0237H01L21/0242H01L21/02458H01L21/0254H01L21/0262
    • Ternary nitride-based buffer layer of a nitride-based light-emitting device and related manufacturing method. The device includes a substrate and a plurality of layers formed over the substrate in the following sequence: a ternary nitride-based buffer layer, a first conductivity type nitride-based semiconductor layer, a light-emitting layer, and a second conductivity type nitride-based semiconductor layer. The manufacturing method includes introducing a first reaction source containing a first group III element into a chamber at a first temperature that is subsequently deposited on the surface of the substrate, the melting point of said element being lower than the first temperature. Introducing a second reaction source containing a second group III element and a third reaction source containing a nitrogen element into the chamber at a second temperature, no lower than the melting point of the first group III element, for forming a ternary nitride-based buffer layer with the first group III element.
    • 氮化物系发光元件的三元氮化物系缓冲层及其制造方法。 该装置包括基板和多个层,其以下列顺序形成在基板上:三元氮化物基缓冲层,第一导电型氮化物基半导体层,发光层和第二导电型氮化物基缓冲层, 基于半导体层。 该制造方法包括将包含第一III族元素的第一反应源在随后沉积在基材表面上的第一温度下引入室中,所述元素的熔点低于第一温度。 在不低于第一III族元素的熔点的第二温度下引入含有第二组III元素的第二反应源和含有氮元素的第三反应源,用于形成三元氮化物基缓冲层 与第一组III元素。
    • 6. 发明申请
    • POWER SUPPLY APPARATUS HAVING MULTIPLE POWER OUTPUT DEVICES
    • 具有多个电力输出装置的电源装置
    • US20070270003A1
    • 2007-11-22
    • US11534104
    • 2006-09-21
    • Wen-Hsiang LinSzu-Lu HuangHung-Chang Hsieh
    • Wen-Hsiang LinSzu-Lu HuangHung-Chang Hsieh
    • H01R13/648
    • H01R13/6272H01R13/639
    • A power supply apparatus includes a main body, a power input device, a first power output device and a second power output device. The power input device is coupled to an input terminal of the main body. The first power output device includes a first cable and a first connector. The first cable is interconnected between a first output terminal of the main body and a first surface of the first connector. An extension part is extended from the first surface of the first connector. The second power output device includes a second cable and a second connector. A first surface of the second connector is suppressed by the extension part of the first connector to facilitate securely fixing the first connector and the second connector in a power socket, so that a regulated output voltage is outputted from the first and second output devices to the power socket.
    • 电源装置包括主体,电源输入装置,第一电力输出装置和第二电力输出装置。 电源输入装置耦合到主体的输入端子。 第一电力输出装置包括第一电缆和第一连接器。 第一电缆在主体的第一输出端子和第一连接器的第一表面之间互连。 延伸部分从第一连​​接器的第一表面延伸。 第二电力输出装置包括第二电缆和第二连接器。 第二连接器的第一表面被第一连接器的延伸部分抑制,以便将第一连接器和第二连接器牢固地固定在电源插座中,使得稳定的输出电压从第一和第二输出装置输出到 电源插座。
    • 10. 发明申请
    • TERNARY NITRIDE-BASED BUFFER LAYER OF A NITRIDE-BASED LIGHT-EMITTING DEVICE AND A METHOD FOR MANUFACTURING THE SAME
    • 基于氮化物的发光器件的基于氮化物的缓冲层及其制造方法
    • US20050221520A1
    • 2005-10-06
    • US10711567
    • 2004-09-24
    • Chen OuWen-Hsiang LinShih-Kuo Lai
    • Chen OuWen-Hsiang LinShih-Kuo Lai
    • H01L21/00H01L21/20H01L21/205H01L33/06H01L33/12H01L33/32
    • H01L33/007H01L21/0237H01L21/0242H01L21/02458H01L21/0254H01L21/0262
    • Ternary nitride-based buffer layer of a nitride-based light-emitting device and related manufacturing method. The device includes a substrate and a plurality of layers formed over the substrate in the following sequence: a ternary nitride-based buffer layer, a first conductivity type nitride-based semiconductor layer, a light-emitting layer, and a second conductivity type nitride-based semiconductor layer. The manufacturing method includes introducing a first reaction source containing a first group III element into a chamber at a first temperature that is subsequently deposited on the surface of the substrate, the melting point of said element being lower than the first temperature. Introducing a second reaction source containing a second group III element and a third reaction source containing a nitrogen element into the chamber at a second temperature, no lower than the melting point of the first group III element, for forming a ternary nitride-based buffer layer with the first group III element.
    • 氮化物系发光元件的三元氮化物系缓冲层及其制造方法。 该装置包括基板和多个层,其以下列顺序形成在基板上:三元氮化物基缓冲层,第一导电型氮化物基半导体层,发光层和第二导电型氮化物基缓冲层, 基于半导体层。 该制造方法包括将包含第一III族元素的第一反应源在随后沉积在基材表面上的第一温度下引入室中,所述元素的熔点低于第一温度。 在不低于第一III族元素的熔点的第二温度下引入含有第二组III元素的第二反应源和含有氮元素的第三反应源,用于形成三元氮化物基缓冲层 与第一组III元素。