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1. 发明授权

US5754482A Memory using undecoded precharge for high speed data sensing 失效
标题翻译：内存使用未编码的预充电用于高速数据传感
公开(公告)号：US5754482A
公开(公告)日：1998-05-19
申请号：US845097
申请日：1997-04-21
申请人： Jeffrey Yangming Su , Bruce Lee Morton , Chad Steven Gallun
发明人： Jeffrey Yangming Su , Bruce Lee Morton , Chad Steven Gallun
IPC分类号： G11C16/06 , G11C7/12 , G11C16/24 , G11C16/28 , G11C16/04
CPC分类号： G11C16/28 , G11C16/24 , G11C7/12
摘要： A memory (400) returns all bit lines to a predetermined voltage level optimum for subsequent fast sensing. The memory (400) includes precharge circuitry (106, 108, 110) which begins the precharge operation during the latching phase of a prior access. The precharge circuitry (106, 108, 110) precharges all bit lines, rather than a selected bit line, to the predetermined voltage level prior to address decoding. In order to prevent "walk-up", the memory (400) includes circuitry such as a switched capacitor (138, 140) which draws current from the bit lines to reduce the voltage on a bit line which drove a logic high level in an earlier cycle or which had an increased voltage due to capacitive cross-coupling to an adjacent bit line. The memory (400) may also include devices such as transmission gates (142, 144, 146) to couple together adjacent bit lines and thereby more evenly distribute the precharging.
摘要翻译：存储器（400）将所有位线返回到用于随后的快速感测最佳的预定电压电平。存储器（400）包括在先前访问的锁存阶段期间开始预充电操作的预充电电路（106,108,110）。在地址解码之前，预充电电路（106,108,110）将所有位线而不是所选择的位线预充电到预定电压电平。为了防止“走动”，存储器（400）包括诸如开关电容器（138,140）的电路，其从位线吸取电流以减少位线上的电压，从而驱动逻辑高电平或者由于与相邻位线的电容性交叉耦合而具有增加的电压。存储器（400）还可以包括诸如用于将相邻位线耦合在一起的传输门（142,144,146）的装置，从而更均匀地分配预充电。

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