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1. 发明申请

US20090204367A1 METHODS FOR DISTRIBUTING A RANDOM VARIABLE USING STATISTICALLY-CORRECT SPATIAL INTERPOLATION 有权
标题翻译：使用统计 - 正确空间插值分配随机变量的方法
公开(公告)号：US20090204367A1
公开(公告)日：2009-08-13
申请号：US12030462
申请日：2008-02-13
申请人： Jeffrey G. Hemmett , Mukesh Kumar , Wayne H. Woods, JR. , Cole E. Zemke
发明人： Jeffrey G. Hemmett , Mukesh Kumar , Wayne H. Woods, JR. , Cole E. Zemke
IPC分类号： G06F17/18
CPC分类号： G06F17/18
摘要： Methods for distributing a random variable by spatial interpolation with statistical corrections. The method includes assigning a numerical value of the random variable at each vertex of an array of equilateral triangles formed in a planar coordinate frame and defining a plurality of test points at respective spatial locations in the planar coordinate frame that are bounded by the array of equilateral triangles. A numerical value of the random variable is distributed at each of the test points by spatial interpolation from one or more of the numerical values of the random variable assigned at each vertex of the array of equilateral triangles. The method further includes adjusting the numerical value of the random variable distributed at each of the test points with a respective correction factor.
摘要翻译：通过统计校正的空间插值分布随机变量的方法。该方法包括在平面坐标系中形成的等边三角形阵列的每个顶点处分配随机变量的数值，并且在平面坐标系中的由等边阵列限定的相应空间位置处限定多个测试点三角形。随机变量的数值通过从等边三角形阵列的每个顶点处分配的随机变量的一个或多个数值中的空间插值分布在每个测试点。该方法还包括用相应的校正因子来调整在每个测试点分布的随机变量的数值。

2. 发明申请

US20110077916A1 Method of Distributing a Random Variable Using Statistically Correct Spatial Interpolation Continuously With Spatially Inhomogeneous Statistical Correlation Versus Distance, Standard Deviation, and Mean 失效
标题翻译：使用统计学上正确的空间插值分布随机变量的方法与空间不均匀的统计相关性与距离，标准偏差和平均值
公开(公告)号：US20110077916A1
公开(公告)日：2011-03-31
申请号：US12570195
申请日：2009-09-30
申请人： John M Cohn , Ulrich A. Finkler , David J. Hathaway , Jefrey G. Hemmett , Fook-Luen Heng , Jason D. Hibbeler , Gie Lee , Wayne H. Woods, JR. , Cole E. Zemke
发明人： John M Cohn , Ulrich A. Finkler , David J. Hathaway , Jefrey G. Hemmett , Fook-Luen Heng , Jason D. Hibbeler , Gie Lee , Wayne H. Woods, JR. , Cole E. Zemke
IPC分类号： G06F17/10 , G06F17/17 , G06F1/02
CPC分类号： G06F17/175
摘要： Methods for modeling a random variable with spatially inhomogenous statistical correlation versus distance, standard deviation, and mean by spatial interpolation with statistical corrections. The method includes assigning statistically independent random variable to a set of seed points in a coordinate frame and defining a plurality of test points at respective spatial locations in the coordinate frame. A equation for a random variable is determined for each of the test points by spatial interpolation from one or more of the random variable assigned to the seed points. The method further includes adjusting the equation of the random variable at each of the test point with respective correction factor equations.
摘要翻译：用空间不均匀的统计学相关性与距离，标准偏差和通过统计学校正的空间插值的平均值来建模随机变量的方法。该方法包括将统计独立的随机变量分配给坐标系中的一组种子点并在坐标系中的相应空间位置定义多个测试点。通过从分配给种子点的一个或多个随机变量的空间插值，为每个测试点确定随机变量的等式。该方法还包括利用相应的校正因子方程来调整每个测试点处的随机变量的方程。

3. 发明申请

US20120139667A1 ON-CHIP HIGH PERFORMANCE SLOW-WAVE COPLANAR WAVEGUIDE STRUCTURES, METHOD OF MANUFACTURE AND DESIGN STRUCTURE 失效
标题翻译：片上高性能慢波共晶波形结构，制造方法和设计结构
公开(公告)号：US20120139667A1
公开(公告)日：2012-06-07
申请号：US12959997
申请日：2010-12-03
申请人： Essam MINA , Guoan Wang , Wayne H. Woods, JR.
发明人： Essam MINA , Guoan Wang , Wayne H. Woods, JR.
IPC分类号： H01P3/08
CPC分类号： H01P3/081 , H01P3/003 , H01P9/00
摘要： On-chip high performance slow-wave coplanar waveguide structures, method of manufacture and design structures for integrated circuits are provided herein. The structure includes at least one ground and signal layer provided in a same plane as the at least one ground. The signal layer has at least one alternating wide portion and narrow portion with an alternating thickness. The wide portion extends toward the at least one ground.
摘要翻译：本文提供片上高性能慢波共面波导结构，集成电路的制造方法和设计结构。该结构包括设置在与至少一个地面相同的平面中的至少一个接地和信号层。信号层具有至少一个交替宽的部分和具有交替厚度的窄部分。宽部分朝向至少一个地面延伸。

4. 发明申请

US20120019313A1 MILLIMETER-WAVE ON-CHIP SWITCH EMPLOYING FREQUENCY-DEPENDENT INDUCTANCE FOR CANCELLATION OF OFF-STATE CAPACITANCE 有权
标题翻译：采用离散电源的毫米波片式开关，用于取消非状态电容的频率依赖性电感
公开(公告)号：US20120019313A1
公开(公告)日：2012-01-26
申请号：US12839777
申请日：2010-07-20
申请人： Wayne H. Woods, JR. , Guoan Wang , Hanyi Ding
发明人： Wayne H. Woods, JR. , Guoan Wang , Hanyi Ding
IPC分类号： H01P1/20
CPC分类号： H01P1/127 , H01F17/0006 , H01L23/5223 , H01L23/5227 , H01L23/645 , H01L23/66 , H01L27/0629 , H01L28/10 , H01L2223/6627 , H01L2924/0002 , H03K17/145 , H01L2924/00
摘要： A semiconductor switching device includes a field effect transistor and an inductor structure that provides a frequency dependent inductance in a parallel connection. During the off-state of the semiconductor switching device, the frequency dependent impedance component due to the off-state parasitic capacitance of the switching device is cancelled by the frequency dependent inductance component of the inductor structure, which provides a non-linear impedance as a function of frequency. The inductor structure provides less inductance at a higher operating frequency than at a lower operating frequency to provide more effective cancellation of two impedance components of the parasitic capacitance and the inductance. Thus, the semiconductor switching device can provide low parasitic coupling at multiple operating frequencies. The operating frequencies of the semiconductor switching device can be at gigahertz ranges for millimeter wave applications.
摘要翻译：半导体开关器件包括场效应晶体管和在并联连接中提供频率相关电感的电感器结构。在半导体开关器件的截止状态期间，由开关器件的截止状态寄生电容引起的与频率相关的阻抗分量被电感器结构的频率相关的电感分量抵消，该电感器结构提供非线性阻抗作为频率功能电感器结构在较高工作频率下提供比在较低工作频率下更小的电感，以提供更有效地消除寄生电容和电感的两个阻抗分量。因此，半导体开关器件可以在多个工作频率下提供低的寄生耦合。对于毫米波应用，半导体开关器件的工作频率可以是千兆赫兹范围。

5. 发明申请

US20110043299A1 Compact On-Chip Branchline Coupler Using Slow Wave Transmission Line 有权
标题翻译：使用慢波传输线的紧凑型片上分支线耦合器
公开(公告)号：US20110043299A1
公开(公告)日：2011-02-24
申请号：US12542958
申请日：2009-08-18
申请人： Hanyi Ding , Essam Mina , Guoan Wang , Wayne H. Woods, JR.
发明人： Hanyi Ding , Essam Mina , Guoan Wang , Wayne H. Woods, JR.
IPC分类号： H01P5/18 , H01P1/18
CPC分类号： H01P3/082 , H01L27/0617 , H01L27/0629 , H01P5/227
摘要： Branchline coupler structure using slow wave transmission line effect having both large inductance and large capacitance per unit length. The branchline coupler structure includes a plurality of quarter-wavelength transmission lines, at least one of which includes a high impedance arm and a low impedance arm. The high and low impedances are relative to each other. The high impedance arm includes a plurality of narrow cells and having an inductance of nL and a capacitance of C/n, and the low impedance arm includes a plurality of wide cells and having an inductance of L/n and capacitance of nC. The wide and narrow cells are relative to each other, and the wide and narrow cells are adjacent each other to form a signal layer having step discontinuous alternative widths.
摘要翻译：使用慢波传输线效应的分支线耦合器结构具有每单位长度的大电感和大电容。支线耦合器结构包括多个四分之一波长传输线，其中至少一个包括高阻抗臂和低阻抗臂。高阻抗和低阻抗是相对的。高阻抗臂包括多个窄电池并且具有nL的电感和C / n的电容，并且低阻抗臂包括多个宽电池并且具有L / n的电感和nC的电容。宽和窄的单元彼此相对，并且宽和窄的单元彼此相邻以形成具有阶梯不连续替代宽度的信号层。

6. 发明申请

US20100265011A1 CIRCUIT STRUCTURE AND DESIGN STRUCTURE FOR AN OPTIONALLY SWITCHABLE ON-CHIP SLOW WAVE TRANSMISSION LINE BAND-STOP FILTER AND A METHOD OF MANUFACTURE 有权
标题翻译：用于可选择的可切换的片上慢波传输线连接滤波器的电路结构和设计结构及其制造方法
公开(公告)号：US20100265011A1
公开(公告)日：2010-10-21
申请号：US12424110
申请日：2009-04-15
申请人： Hanyi Ding , Kwan H. Lam , Guoan Wang , Wayne H. Woods, JR.
发明人： Hanyi Ding , Kwan H. Lam , Guoan Wang , Wayne H. Woods, JR.
IPC分类号： H01P3/08 , H05K3/10 , G06F17/50
CPC分类号： H01P1/203 , Y10T29/49155
摘要： The present invention generally relates to a circuit structure, design structure and method of manufacturing a circuit, and more specifically to a circuit structure and design structure for an on-chip slow wave transmission line band-stop filter and a method of manufacture. A structure includes an on-chip transmission line stub comprising a conditionally floating structure structured to provide increased capacitance to the on-chip transmission line stub when the conditionally floating structure is connected to ground.
摘要翻译：本发明一般涉及一种电路结构，电路制造的设计结构和方法，更具体地涉及用于片上慢波传输线带阻滤波器的电路结构和设计结构以及制造方法。一种结构包括片上传输线短截线，其包括有条件浮动结构，其被构造为当有条件浮动结构连接到地时为片上传输线短截线提供增加的电容。

7. 发明申请

US20100237464A1 Chip Inductor With Frequency Dependent Inductance 有权
标题翻译：具有频率依赖电感的片式电感器
公开(公告)号：US20100237464A1
公开(公告)日：2010-09-23
申请号：US12632030
申请日：2009-12-07
申请人： Hanyi Ding , Wayne H. Woods, JR.
发明人： Hanyi Ding , Wayne H. Woods, JR.
IPC分类号： H01L27/06 , G06F17/50
CPC分类号： H01L28/10 , G06F17/5068 , G06F17/5077 , H01L21/31053 , H01L21/76808 , H01L21/76826 , H01L23/5223 , H01L23/5227 , H01L27/08 , H01L29/432 , H01L2924/0002 , H01L2924/3011 , H01L2924/00
摘要： A set of metal line structures including a signal transmission metal line and a capacitively-grounded inductively-signal-coupled metal line is embedded in a dielectric material layer. A capacitor is serially connected between the capacitively-grounded inductively-signal-coupled metal line and a local electrical ground, which may be on the input side or on the output side. The set of metal line structures and the capacitor collective provide a frequency dependent inductor. The Q factor of the frequency dependent inductor has multiple peaks that enable the operation of the frequency dependent inductor at multiple frequencies. Multiple capacitively-grounded inductively-signal-coupled metal lines may be provided in the frequency-dependent inductor, each of which is connected to the local electrical ground through a capacitor. By selecting different capacitance values for the capacitors, multiple values of the Q-factor may be obtained in the frequency dependent inductor at different signal frequencies.
摘要翻译：包括信号传输金属线和电容接地感应信号耦合金属线的一组金属线结构被嵌入在电介质材料层中。电容器串联连接在电容接地的感应信号耦合金属线路和可能在输入侧或输出侧的局部电接地之间。金属线结构和电容集合提供了一个频率相关的电感。频率依赖电感器的Q因子具有多个峰值，使得能够在多个频率下操作频率相关的电感器。可以在频率相关电感器中提供多个电容耦合的感应信号耦合金属线路，每个电路通过电容器连接到本地电接地。通过选择电容器的不同电容值，可以在不同信号频率的频率相关电感器中获得Q因子的多个值。

8. 发明申请

US20090315633A1 Design Structure, Structure and Method for Providing an On-Chip Variable Delay Transmission Line With Fixed Characteristic Impedance 有权
公开(公告)号：US20090315633A1
公开(公告)日：2009-12-24
申请号：US12144682
申请日：2008-06-24
申请人： Hanyi Ding , Wayne H. Woods, JR.
发明人： Hanyi Ding , Wayne H. Woods, JR.
IPC分类号： H01P3/08 , H04B3/04 , H01P11/00 , H01L21/768
CPC分类号： H01P9/006 , H01L23/5222 , H01L23/5225 , H01L2924/0002 , H01L2924/3011 , Y10T29/41 , H01L2924/00
摘要： A design structure, structure, and method for providing an on-chip variable delay transmission line with a fixed characteristic impedance. A method of manufacturing a transmission line structure includes forming a signal line of the transmission line structure, forming a first ground return structure that causes a first delay and a first characteristic impedance in the transmission line structure, and forming a second ground return structure that causes a second delay and a second characteristic impedance in the transmission line structure. The first delay is different from the second delay, and the first characteristic impedance is substantially the same as the second characteristic impedance.

9. 发明申请

US20130193584A1 ON-CHIP RADIAL CAVITY POWER DIVIDER/COMBINER 有权
标题翻译：片上径向辐射功率分配器/组合器
公开(公告)号：US20130193584A1
公开(公告)日：2013-08-01
申请号：US13358792
申请日：2012-01-26
申请人： Hanyi Ding , Pinping Sun , Guoan Wang , Wayne H. Woods, JR.
发明人： Hanyi Ding , Pinping Sun , Guoan Wang , Wayne H. Woods, JR.
IPC分类号： H01L23/48 , H01L21/768
CPC分类号： H01L23/481 , H01L23/66 , H01L2224/16225 , H01L2924/1305 , H01L2924/15311 , H01L2924/00
摘要： Disclosed is a chip with a power divider/combiner, a module incorporating the chip and associated methods. The divider/combiner comprises first and second metal layers on opposite sides of a substrate. Interconnects extend through the substrate and comprise: a first interconnect, second interconnects annularly arranged about the first interconnect and third interconnects annularly arranged about the second interconnects. Each interconnect comprises one or more through silicon vias lined/filled with a conductor. For a power divider, an opening in the first metal layer at the first interconnect comprises an input port for receiving power and openings in the first or second metal layer at the second interconnects comprise output ports for applying power to other devices. For a power combiner, openings in the first or second metal layer at the second interconnects comprise the input ports and an opening in the first metal layer at the first interconnect comprises an output port.
摘要翻译：公开了具有功率分配器/组合器的芯片，包括芯片的模块和相关联的方法。分隔器/组合器包括在衬底的相对侧上的第一和第二金属层。互连件延伸穿过衬底并且包括：第一互连，围绕第一互连环形布置的第二互连和围绕第二互连环形布置的第三互连。每个互连包括一个或多个内衬/填充有导体的通孔硅通孔。对于功率分配器，第一互连处的第一金属层中的开口包括用于接收功率的输入端口，并且在第二互连处的第一或第二金属层中的开口包括用于向其它器件施加电力的输出端口。对于功率组合器，在第二互连处的第一或第二金属层中的开口包括输入端口，并且在第一互连处的第一金属层中的开口包括输出端口。

10. 发明申请

US20130088403A1 Low Phase Variation CMOS Digital Attenuator 有权
标题翻译：低相位变化CMOS数字衰减器
公开(公告)号：US20130088403A1
公开(公告)日：2013-04-11
申请号：US13253260
申请日：2011-10-05
申请人： Pinping Sun , Hanyi Ding , Wayne H. Woods, JR.
发明人： Pinping Sun , Hanyi Ding , Wayne H. Woods, JR.
IPC分类号： H01Q1/50 , G06F17/50 , H01P1/22
CPC分类号： H01P1/22 , H03H7/07 , H03H7/24 , H03H11/245 , H03L5/00
摘要： A low phase variation attenuator uses a combined attenuation path and a phase network to significantly reduce a phase error between a reference signal and an attenuated signal without degrading the insertion loss. A grounded parallel connection of a resistor and a capacitor is employed in series with an attenuation transistor, which is connected to a middle of a two resistor voltage divider. The two resistor voltage divider includes two resistors of equal resistance that are connected in a series connection. The two resistor voltage divider is connected in a parallel connection with a reference transistor, which functions as a main switch for the transmission or attenuation of a radio frequency (RF) signal.
摘要翻译：低相位变化衰减器使用组合的衰减路径和相位网络来显着地减小参考信号和衰减信号之间的相位误差而不降低插入损耗。电阻和电容器的并联接地与衰减晶体管串联使用，该衰减晶体管连接到两个电阻分压器的中间。两个电阻分压器包括两个串联连接的等电阻电阻。两个电阻分压器与参考晶体管并联连接，参考晶体管用作发射或衰减射频（RF）信号的主开关。

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