会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 2. 发明授权
    • Oxide semiconductor thin-film transistor
    • 氧化物半导体薄膜晶体管
    • US08841663B2
    • 2014-09-23
    • US13080413
    • 2011-04-05
    • Je-Hun LeeJae-Woo ParkByung-Du AhnSei-Yong ParkJun-Hyun Park
    • Je-Hun LeeJae-Woo ParkByung-Du AhnSei-Yong ParkJun-Hyun Park
    • H01L29/10H01L29/12H01L29/786H01L29/45
    • H01L29/45H01L29/78618H01L29/7869H01L29/78696
    • A thin-film transistor includes a gate electrode, a source electrode, a drain electrode, a gate insulation layer and an oxide semiconductor pattern. The source and drain electrodes include a first metal element with a first oxide formation free energy. The oxide semiconductor pattern has a first surface making contact with the gate insulation layer and a second surface making contact with the source and drain electrodes to be positioned at an opposite side of the first surface. The oxide semiconductor pattern includes an added element having a second oxide formation free energy having an absolute value greater than or equal to an absolute value of the first oxide formation free energy, wherein an amount of the added element included in a portion near the first surface is zero or smaller than an amount of the added element included in a portion near the second surface.
    • 薄膜晶体管包括栅电极,源电极,漏电极,栅极绝缘层和氧化物半导体图案。 源极和漏极包括具有第一氧化物形成自由能的第一金属元件。 氧化物半导体图案具有与栅极绝缘层接触的第一表面和与源极和漏极电极接触以与第一表面相对的第二表面。 氧化物半导体图案包括具有绝对值大于或等于第一氧化物形成自由能的绝对值的第二氧化物形成自由能的添加元素,其中包括在第一表面附近的部分中的添加元素的量 为零或小于包含在靠近第二表面的部分中的添加元素的量。
    • 6. 发明申请
    • Blind Type Curtain
    • 盲型窗帘
    • US20080251221A1
    • 2008-10-16
    • US12066415
    • 2006-09-13
    • Jae-Woo Park
    • Jae-Woo Park
    • A47C23/00A47C23/02
    • A47H23/02A47H2023/003E06B9/264
    • The present invention relates to a blind type curtain, and more specifically to a blind type curtain, obtained by forming several blind unit pieces formed on rear surface of the textile curtain at regular interval, such that the functions such as light beam regulation, sight-blocking, soundproofing, anti-cold, and anti-rat can be performed, and the function such as interior can be simultaneously performed, by which these functions are further magnified, of which the manufacture and handling is easy, used as a combined use of indoor and outdoor, and which provides no concern about noise and breakage. That is, a membrane shaped blind unit piece 2 is prepared by forming several blind unit pieces protrusively formed in a row direction at regular interval, preparing a connecting yarn on rear side of the blind unit piece, weaving the upper and lower end of the connecting yarn with the upper and lower end of a space of rear side of the blind unit piece to maintain the protrusion of the unit piece, and folding the lower end of the blind unit piece 2 forcibly.
    • 盲型帘幕技术领域本发明涉及一种盲型帘幕,更具体地涉及一种盲型帘幕,其通过以规则的间隔形成形成在纺织品窗帘的后表面上的若干个单元片而获得,使得诸如光束调节, 可以进行阻隔,隔音,防冷和抗大鼠,并且可以同时执行诸如内部的功能,通过这些功能进一步放大,其制造和处理容易,用作组合使用 室内和室外,不关心噪音和破损。 也就是说,通过以规则的间隔形成沿行方向突出形成的多个盲单元件来制备膜形盲单元件2,在盲单元件的后侧准备连接纱线,编织连接的上下端 纱线,其具有盲单元件的后侧的空间的上端和下端,以保持单元件的突起,并且强制地折叠盲单元件2的下端。
    • 7. 发明申请
    • THIN FILM TRANSISTOR INCLUDING TITANIUM OXIDES AS ACTIVE LAYER AND METHOD OF MANUFACTURING THE SAME
    • 包括作为主动层的氧化钛的薄膜晶体管及其制造方法
    • US20080237595A1
    • 2008-10-02
    • US12058399
    • 2008-03-28
    • Jae-Woo ParkSeunghyup Yoo
    • Jae-Woo ParkSeunghyup Yoo
    • H01L29/04H01L21/02
    • H01L29/7869
    • Disclosed herein is a method of manufacturing a thin film transistor including titanium oxides as an active layer and the structure of the thin film transistor film manufactured using the method. The thin film transistor includes: a substrate; an active layer formed on the substrate using polycrystalline or amorphous titanium oxides; and an insulating layer formed on the active layer. Further, the method of manufacturing the thin film transistor includes: forming a substrate; forming an active layer on the substrate using polycrystalline or amorphous titanium oxides; and forming an insulating layer on the active layer. The present invention is advantageous in that the performance of the thin film transistor can be improved, the thin film transistor can be manufactured at low cost, harmful environmental problems can be solved, and the thin film transistor can be widely applied to various electronic apparatuses including, but not limited to, integrated drivers in active-matrix displays and transparent electronic devices.
    • 本发明公开了一种制造薄膜晶体管的方法,该薄膜晶体管包括钛氧化物作为有源层,以及使用该方法制造的薄膜晶体管膜的结构。 薄膜晶体管包括:基板; 使用多晶或无定形钛氧化物在所述衬底上形成的有源层; 以及形成在有源层上的绝缘层。 此外,制造薄膜晶体管的方法包括:形成衬底; 使用多晶或无定形钛氧化物在衬底上形成有源层; 以及在所述有源层上形成绝缘层。 本发明的优点在于,可以提高薄膜晶体管的性能,可以以低成本制造薄膜晶体管,可以解决有害的环境问题,并且薄膜晶体管可以广泛地应用于各种电子设备,包括 但不限于有源矩阵显示器和透明电子设备中的集成驱动器。
    • 10. 发明授权
    • Nonvolatile memory device, method of operating the same and electronic device including the same
    • 非易失存储器件,其操作方法和包括其的电子器件
    • US08934305B2
    • 2015-01-13
    • US13479467
    • 2012-05-24
    • Jae-Woo ParkJung-No Im
    • Jae-Woo ParkJung-No Im
    • G11C16/34G11C16/06G11C16/10G11C11/56G11C16/04
    • G11C16/3459G11C11/5628G11C16/0483
    • A nonvolatile memory device and a method of operating the same are provided. The method includes performing a plurality of program operations on a plurality of memory cells each to be programmed to one of a plurality of program states, performing a program-verify operation on programmed memory cells associated with each of the plurality of program states, the program-verify operation comprises, selecting one of the plurality of offsets based on a noise level of a common source line associated with a programmed memory cell, using the selected offset to select one of a first verify voltage and a second verify voltage higher than the first verify voltage, and verifying a program state of the programmed memory cell using the first verify voltage and the second verify voltage.
    • 提供一种非易失性存储器件及其操作方法。 该方法包括对多个存储器单元执行多个编程操作,每个存储器单元被编程为多个程序状态中的一个,对与多个程序状态中的每一个相关联的程序存储单元执行程序验证操作,该程序 - 验证操作包括:使用所选择的偏移量,基于与编程的存储器单元相关联的公共源极线的噪声电平来选择所述多个偏移中的一个,以选择第一验证电压和高于所述第一验证电压的第二验证电压 验证电压,以及使用第一验证电压和第二验证电压来验证编程的存储器单元的编程状态。