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1. 发明申请

US20090163022A1 TFT ARRAY PANEL 有权
标题翻译： TFT阵列面板
公开(公告)号：US20090163022A1
公开(公告)日：2009-06-25
申请号：US12369839
申请日：2009-02-12
申请人： Je-Hun LEE , Jae-Kyeong LEE , Chang-Oh JEONG , Beom-Seok CHO
发明人： Je-Hun LEE , Jae-Kyeong LEE , Chang-Oh JEONG , Beom-Seok CHO
IPC分类号： H01L21/4763
CPC分类号： H01L29/66765 , H01L27/12 , H01L29/458 , H01L29/4908
摘要： Multi-layered wiring for a larger flat panel display is formed by depositing molybdenum on a substrate in presence of a precursor gas containing at least one oxygen, nitrogen and carbon to form a molybdenum layer. An aluminum layer is deposited on the molybdenum layer. Another metal layer may be formed on the aluminum layer. The molybdenum layer has a face-centered cubic (FCC) lattice structure with a preferred orientation of (111).
摘要翻译：在含有至少一个氧，氮和碳的前体气体的存在下，在基板上沉积钼以形成钼层，形成用于较大平板显示器的多层布线。铝层沉积在钼层上。可以在铝层上形成另一金属层。钼层具有面心立方（FCC）晶格结构，其优选取向为（111）。

2. 发明申请

US20080138942A1 THIN FILM TRANSISTOR ARRAY PANEL AND METHOD FOR MANUFACTURING THE SAME 有权
标题翻译：薄膜晶体管阵列及其制造方法
公开(公告)号：US20080138942A1
公开(公告)日：2008-06-12
申请号：US12031121
申请日：2008-02-14
申请人： Je-Hun LEE , Yang-Ho BAE , Beom-Seok CHO , Chang-Oh JEONG
发明人： Je-Hun LEE , Yang-Ho BAE , Beom-Seok CHO , Chang-Oh JEONG
IPC分类号： H01L21/336
CPC分类号： H01L27/3279 , H01L27/124 , H01L27/1288 , H01L51/0023 , H01L51/56
摘要： The invention provides a thin film transistor (TFT) array panel that includes an insulating substrate; a gate line formed on the insulating substrate and having a first layer of an Al containing metal, a second layer of a Cu containing metal that is thicker than the first layer, and a gate electrode; a gate insulating layer arranged on the gate line; a semiconductor arranged on the gate insulating layer; a data line having a source electrode and arranged on the gate insulating layer and the semiconductor; a drain electrode arranged on the gate insulating layer and the semiconductor and facing the source electrode; a passivation layer having a contact hole and arranged on the data line and the drain electrode; and a pixel electrode arranged on the passivation layer and coupled with the drain electrode through the contact hole.
摘要翻译：本发明提供一种薄膜晶体管（TFT）阵列面板，其包括绝缘基板; 形成在所述绝缘基板上并具有含有Al的金属的第一层，比所述第一层更厚的含Cu金属的第二层的栅极线和栅电极; 栅极绝缘层，布置在栅极线上; 布置在栅绝缘层上的半导体; 数据线，其具有源电极并且布置在所述栅极绝缘层和所述半导体上; 布置在所述栅绝缘层和所述半导体上并面对所述源电极的漏电极; 钝化层，其具有接触孔并且布置在所述数据线和所述漏电极上; 以及设置在钝化层上并通过接触孔与漏电极耦合的像素电极。

3. 发明申请

US20080227245A1 THIN FILM TRANSISTOR ARRAY PANEL AND A METHOD FOR MANUFACTURING THE SAME 失效
标题翻译：薄膜晶体管阵列及其制造方法
公开(公告)号：US20080227245A1
公开(公告)日：2008-09-18
申请号：US12112104
申请日：2008-04-30
申请人： Jae-Gab LEE , Bong-Joo KANG , Beom-Seok CHO , Chang-Oh JEONG
发明人： Jae-Gab LEE , Bong-Joo KANG , Beom-Seok CHO , Chang-Oh JEONG
IPC分类号： H01L21/84
CPC分类号： H01L27/12 , H01L27/124 , H01L29/458 , H01L29/4908 , H01L29/66765
摘要： A thin film transistor array panel includes an insulating substrate, a gate wire formed on the insulating substrate. A gate insulating layer covers the gate wire. A semiconductor pattern is formed on the gate insulating layer. A data wire having source electrodes, drain electrodes and data lines is formed on the gate insulating layer and the semiconductor pattern. A protective layer is formed on the data wire. Pixel electrodes connected to the drain electrode via contact holes are formed on the protective layer. The gate wire and the data wire are made of Ag alloy containing Ag and an additive including at least one selected from Zn, In, Sn and Cr.
摘要翻译：薄膜晶体管阵列面板包括绝缘基板，形成在绝缘基板上的栅极线。栅极绝缘层覆盖栅极线。在栅极绝缘层上形成半导体图形。在栅极绝缘层和半导体图案上形成具有源电极，漏电极和数据线的数据线。在数据线上形成保护层。在保护层上形成通过接触孔与漏电极连接的像素电极。栅极线和数据线由含有Ag的Ag合金和包含选自Zn，In，Sn和Cr中的至少一种的添加剂制成。

4. 发明申请

US20080044963A1 TFT SUBSTRATE FOR LIQUID CRYSTAL DISPLAY APPARATUS AND METHOD OF MANUFACTURING THE SAME 审中-公开
标题翻译：用于液晶显示装置的TFT基板及其制造方法
公开(公告)号：US20080044963A1
公开(公告)日：2008-02-21
申请号：US11923822
申请日：2007-10-25
申请人： Beom-Seok CHO , Chang-Oh JEONG
发明人： Beom-Seok CHO , Chang-Oh JEONG
IPC分类号： H01L21/84
CPC分类号： H01L29/4908 , C22C9/00 , G02F1/133345 , G02F1/136286 , H01L27/12 , H01L27/124 , H01L27/1288 , H01L29/66765
摘要： There are provided a TFT substrate for an LCD apparatus and a method of manufacturing the same. A substrate (10), a diffusion barrier layer (11) and a copper alloy layer (12) are formed on the TET substrate, consecutively. The copper alloy includes a material from about 0.5 at % to about 15 at % to form a gate wiring layer. The material is used to form the diffusion barrier layer (11). A compound that comprises a material such as Zr, Ti, Hf, V, Ta, Ni, Cr, Nb, Co, Mn, Mo, W, Rh, Pd, Pt, etc. is deposited on the diffusion barrier layer (11) to a thickness from about 50 Å to about 5,000 Å. The deposited compound is then heat treated to convert the deposited compound into a silicide compound (11b). The transistor substrate has low resistance and high conductance. Also, etching process is simplified, and a mutual diffusion is prevented by means of the thin diffusion barrier layer.
摘要翻译：提供了一种用于LCD装置的TFT基板及其制造方法。在TET基板上连续形成基板（10），扩散阻挡层（11）和铜合金层（12）。铜合金包括约0.5at％至约15at％的材料以形成栅极布线层。该材料用于形成扩散阻挡层（11）。包含诸如Zr，Ti，Hf，V，Ta，Ni，Cr，Nb，Co，Mn，Mo，W，Rh，Pd，Pt等材料的化合物沉积在扩散阻挡层（11）上，至约50至约5000的厚度。然后将沉积的化合物进行热处理以将沉积的化合物转化为硅化物（11b）。晶体管衬底具有低电阻和高电导率。此外，简化了蚀刻工艺，并且通过薄的扩散阻挡层来防止相互扩散。

5. 发明申请

US20100149476A1 DISPLAY SUBSTRATE AND METHOD OF MANUFACTURING THE SAME 审中-公开
标题翻译：显示基板及其制造方法
公开(公告)号：US20100149476A1
公开(公告)日：2010-06-17
申请号：US12534300
申请日：2009-08-03
申请人： Do-Hyun KIM , Jong-Hyun CHOUNG , Young-Joo CHOI , Hong-Sick PARK , Tae-Hyung IHN , Dong-Hoon LEE , Pil-Sang YUN , Je-Hyeong PARK , Chang-Oh JEONG , Je-Hun LEE , Sun-Young HONG , Bong-Kyun KIM , Byeong-Jin LEE , Nam-Seok SUH
发明人： Do-Hyun KIM , Jong-Hyun CHOUNG , Young-Joo CHOI , Hong-Sick PARK , Tae-Hyung IHN , Dong-Hoon LEE , Pil-Sang YUN , Je-Hyeong PARK , Chang-Oh JEONG , Je-Hun LEE , Sun-Young HONG , Bong-Kyun KIM , Byeong-Jin LEE , Nam-Seok SUH
IPC分类号： G02F1/1333 , B05D5/12 , B44C1/22
CPC分类号： G02F1/136286 , G02F2001/133302 , G02F2001/136295
摘要： A display substrate includes; a base substrate, a deformation preventing layer disposed on a lower surface of the base substrate, wherein the deformation preventing layer applies a force to the base substrate to prevent the base substrate from bending, a gate line disposed on an upper surface of the base substrate, a data line disposed on the base substrate, and a pixel electrode disposed on the base substrate.
摘要翻译：显示基板包括：基底基板，设置在基底基板的下表面的变形防止层，其中变形防止层向基底基板施加力以防止基底基板弯曲，设置在基底基板的上表面上的栅极线设置在基底基板上的数据线，以及配置在基底基板上的像素电极。

6. 发明申请

US20080099765A1 THIN FILM TRANSISTOR SUBSTRATE AND FABRICATING METHOD THEREOF 审中-公开
标题翻译：薄膜晶体管基板及其制造方法
公开(公告)号：US20080099765A1
公开(公告)日：2008-05-01
申请号：US11923914
申请日：2007-10-25
申请人： Do-Hyun KIM , Je-Hun LEE , Chang-Oh JEONG
发明人： Do-Hyun KIM , Je-Hun LEE , Chang-Oh JEONG
IPC分类号： H01L29/04 , H01L21/336
CPC分类号： H01L29/4908 , H01L27/124 , H01L29/458
摘要： A thin film transistor substrate and fabricating method thereof, the thin film transistor substrate including a substrate, a gate line and a gate electrode, each including a metal adhesion layer and a Cu alloy layer disposed on the substrate, an active layer and an ohmic contact layer disposed over the gate electrode, a gate insulating layer disposed between the gate electrode and the active and ohmic contact layers, source and drain electrodes disposed on the ohmic contact layer, and a data line connected to the source electrode.
摘要翻译：一种薄膜晶体管基板及其制造方法，所述薄膜晶体管基板包括基板，栅极线和栅电极，每个薄膜晶体管基板包括设置在基板上的金属粘合层和Cu合金层，有源层和欧姆接触设置在栅极电极上的栅极绝缘层，设置在栅电极与有源欧姆接触层之间的栅极绝缘层，设置在欧姆接触层上的源电极和漏电极以及连接到源电极的数据线。

7. 发明申请

US20080017862A1 ARRAY SUBSTRATE, DISPLAY DEVICE HAVING THE SAME AND METHOD OF MANUFACTURING THE SAME 失效
标题翻译：阵列基板，具有该基板的显示装置及其制造方法
公开(公告)号：US20080017862A1
公开(公告)日：2008-01-24
申请号：US11779534
申请日：2007-07-18
申请人： Je-Hun LEE , Do-Hyun KIM , Eun-Guk LEE , Chang-Oh JEONG
发明人： Je-Hun LEE , Do-Hyun KIM , Eun-Guk LEE , Chang-Oh JEONG
IPC分类号： H01L29/04 , H01L21/00
CPC分类号： G02F1/136286 , G02F2001/13629 , G02F2001/136295 , H01L27/124
摘要： An array substrate includes a switching element, a signal transmission line, a passivation layer and a pixel electrode. The switching element is disposed on an insulating substrate. The signal transmission line is connected to the switching element and includes a barrier layer, a conductive line, and a copper nitride layer. The barrier layer is disposed on the insulating substrate. The conductive line is disposed on the barrier layer and includes copper or copper alloy. The copper nitride layer covers the conductive line. The passivation layer covers the switching element and the signal transmission line and has a contact hole through which a drain electrode of the switching element is partially exposed. The pixel electrode is disposed on the insulating substrate, and is connected to the drain electrode of the switching element through the contact hole.
摘要翻译：阵列基板包括开关元件，信号传输线，钝化层和像素电极。开关元件设置在绝缘基板上。信号传输线连接到开关元件，并且包括阻挡层，导电线和氮化铜层。阻挡层设置在绝缘基板上。导电线设置在阻挡层上并且包括铜或铜合金。氮化铜层覆盖导电线。钝化层覆盖开关元件和信号传输线，并且具有接触孔，开关元件的漏电极通过该接触孔部分露出。像素电极设置在绝缘基板上，并通过接触孔与开关元件的漏电极连接。

8. 发明申请

US20110309510A1 ARRAY SUBSTRATE, DISPLAY DEVICE HAVING THE SAME AND METHOD OF MANUFACTURING THE SAME 审中-公开
标题翻译：阵列基板，具有该基板的显示装置及其制造方法
公开(公告)号：US20110309510A1
公开(公告)日：2011-12-22
申请号：US13222558
申请日：2011-08-31
申请人： Je-Hun LEE , Do-Hyun KIM , Eun-Guk LEE , Chang-Oh JEONG
发明人： Je-Hun LEE , Do-Hyun KIM , Eun-Guk LEE , Chang-Oh JEONG
IPC分类号： H01L23/482
CPC分类号： G02F1/136286 , G02F2001/13629 , G02F2001/136295 , H01L27/124
摘要： An array substrate includes a switching element, a signal transmission line, a passivation layer and a pixel electrode. The switching element is disposed on an insulating substrate. The signal transmission line is connected to the switching element and includes a barrier layer, a conductive line, and a copper nitride layer. The barrier layer is disposed on the insulating substrate. The conductive line is disposed on the barrier layer and includes copper or copper alloy. The copper nitride layer covers the conductive line. The passivation layer covers the switching element and the signal transmission line and has a contact hole through which a drain electrode of the switching element is partially exposed. The pixel electrode is disposed on the insulating substrate, and is connected to the drain electrode of the switching element through the contact hole.
摘要翻译：阵列基板包括开关元件，信号传输线，钝化层和像素电极。开关元件设置在绝缘基板上。信号传输线连接到开关元件，并且包括阻挡层，导电线和氮化铜层。阻挡层设置在绝缘基板上。导电线设置在阻挡层上并且包括铜或铜合金。氮化铜层覆盖导电线。钝化层覆盖开关元件和信号传输线，并且具有接触孔，开关元件的漏电极通过该接触孔部分露出。像素电极设置在绝缘基板上，并通过接触孔与开关元件的漏电极连接。

9. 发明申请

US20080308826A1 THIN-FILM TRANSISTOR, ARRAY SUBSTRATE HAVING THE THIN-FILM TRANSISTOR AND METHOD OF MANUFACTURING THE ARRAY SUBSTRATE 有权
标题翻译：薄膜晶体管，具有薄膜晶体管的阵列基板和制造阵列基板的方法
公开(公告)号：US20080308826A1
公开(公告)日：2008-12-18
申请号：US11930502
申请日：2007-10-31
申请人： Je-Hun LEE , Do-Hyun KIM , Eun-Guk LEE , Chang-Oh JEONG
发明人： Je-Hun LEE , Do-Hyun KIM , Eun-Guk LEE , Chang-Oh JEONG
IPC分类号： H01L29/78 , H01L21/02
CPC分类号： H01L29/7869 , H01L27/1214 , H01L27/1225 , H01L27/124 , H01L27/1288
摘要： A thin-film transistor includes a semiconductor pattern, source and drain electrodes and a gate electrode, the semiconductor pattern is formed on a base substrate, and the semiconductor pattern includes metal oxide. The source and drain electrodes are formed on the semiconductor pattern such that the source and drain electrodes are spaced apart from each other and an outline of the source and drain electrodes is substantially same as an outline of the semiconductor pattern. The gate electrode is disposed in a region between the source and drain electrodes such that portions of the gate electrode are overlapped with the source and drain electrodes. Therefore, leakage current induced by light is minimized. As a result, characteristics of the thin-film transistor are enhanced, after-image is reduced to enhance display quality, and stability of manufacturing process is enhanced.
摘要翻译：薄膜晶体管包括半导体图案，源极和漏极以及栅极，半导体图案形成在基底基板上，半导体图案包括金属氧化物。源极和漏极形成在半导体图案上，使得源极和漏极彼此间隔开，并且源极和漏极的轮廓与半导体图案的轮廓基本相同。栅电极设置在源电极和漏电极之间的区域中，使得栅电极的一部分与源电极和漏电极重叠。因此，由光引起的漏电流最小化。结果，增强了薄膜晶体管的特性，减少了后图像以提高显示质量，并且提高了制造工艺的稳定性。

10. 发明申请

US20070236641A1 THIN FILM TRANSISTOR SUBSTRATE AND METHOD OF FABRICATING THE SAME 审中-公开
标题翻译：薄膜晶体管基板及其制造方法
公开(公告)号：US20070236641A1
公开(公告)日：2007-10-11
申请号：US11695751
申请日：2007-04-03
申请人： Hong-Long NING , Chang-Oh JEONG , Je-Hun LEE , Do-Hyun KIM , Sung-Hen CHO , Ki-Yong SONG , Chang-Ho NOH
发明人： Hong-Long NING , Chang-Oh JEONG , Je-Hun LEE , Do-Hyun KIM , Sung-Hen CHO , Ki-Yong SONG , Chang-Ho NOH
IPC分类号： G02F1/1343
CPC分类号： G02F1/136286 , G02F2001/13629 , G02F2001/136295
摘要： A method of fabricating a thin film transistor (TFT) substrate includes forming a gate line and a data line on an insulating substrate. The data line crosses the gate line and is insulated from the gate line. The formation of the gate line, the data line, or both the gate line and the data line includes forming a low-resistive conductive pattern on a base pattern using an electroless plating method.
摘要翻译：制造薄膜晶体管（TFT）基板的方法包括在绝缘基板上形成栅极线和数据线。数据线与栅极线交叉并与栅极线绝缘。栅极线，数据线或栅极线和数据线两者的形成包括使用化学镀方法在基底图案上形成低电阻导电图案。

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