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1. 发明授权

US07168352B2 Process for sawing substrate strip 有权
标题翻译：锯切基板条的工艺
公开(公告)号：US07168352B2
公开(公告)日：2007-01-30
申请号：US09394918
申请日：1999-09-13
申请人： Jau-Yuen Su , Tao-Yu Chen , Su Tao
发明人： Jau-Yuen Su , Tao-Yu Chen , Su Tao
IPC分类号： B26D1/00
CPC分类号： H01L21/67092 , B23D59/002 , Y10T83/04 , Y10T83/0495 , Y10T83/05 , Y10T83/0548 , Y10T83/0572 , Y10T83/531
摘要： A process for sawing a substrate strip marks corresponding to substrate areas of substrate strips which are arranged side-by-side on a plate. A saw machine is mechanically moved to the substrate areas and positioned by the alignment marks of corresponding substrate areas for cutting the substrate areas of the substrate strips in the first phase. Then the saw machine is further mechanically moved to the substrate areas again and is positioned by the alignment marks of corresponding substrate areas again for cutting the substrate areas of the substrate strips in the second phase. Therefore, an error in any of the substrate areas in the first phase and second phase will not accumulate to the subsequent substrate areas in the substrate strip.
摘要翻译：用于锯切对应于在板上并排布置的衬底条的衬底区域的衬底条的标记的方法。锯床机械地移动到基板区域并且由对应的基板区域的对准标记定位，以便在第一阶段中切割基板条的基板区域。然后再次将锯床机械地移动到基板区域，并再次通过对应基板区域的对准标记定位，以在第二阶段中切割基板条带的基板区域。因此，第一相和第二相中的任何一个衬底区域中的误差将不会累积到衬底条中的随后的衬底区域。

2. 发明授权

US6135522A Sucker for transferring packaged semiconductor device 有权
标题翻译：用于转移封装半导体器件的吸盘
公开(公告)号：US6135522A
公开(公告)日：2000-10-24
申请号：US318220
申请日：1999-05-26
申请人： Jau-Yuen Su , Su Tao
发明人： Jau-Yuen Su , Su Tao
IPC分类号： B25B11/00 , B25J15/06 , B65G47/91 , H05K13/04
CPC分类号： H05K13/0408 , B25B11/007 , B25J15/0616 , B65G47/91 , Y10T29/53191
摘要： A sucker for transferring packaged semiconductor devices is provided, which includes a position rod, an elastic buffer and a sponge. The position rod defines an air extraction channel in an axial direction thereof. The elastic buffer pad defines an aperture to hold an end of the position rod and a first air hole communicated with the aperture and the air extraction channel. The sponge is attached to the elastic buffer pad. The sponge defines a second air hole communicated with the first air hole. Therefore, when air is extracted through the air holes and air extraction channel, the sponge is provided with an absorbent force to securely catch a packaged semiconductor device.
摘要翻译：提供了用于传送封装的半导体器件的吸盘，其包括位置杆，弹性缓冲器和海绵。定位杆在其轴向方向上限定了空气抽取通道。弹性缓冲垫限定一个孔，以保持定位杆的端部和与孔和抽气通道连通的第一空气孔。海绵附着在弹性缓冲垫上。海绵限定与第一空气孔连通的第二空气孔。因此，当通过空气孔和空气抽取通道抽取空气时，海绵被提供吸收力以牢固地捕获封装的半导体器件。

3. 发明授权

US06316828B1 Structure of a solder mask for the circuit module of a BGA substrate 有权
标题翻译： BGA基板的电路模块的焊接掩模的结构
公开(公告)号：US06316828B1
公开(公告)日：2001-11-13
申请号：US09436657
申请日：1999-11-09
申请人： Su Tao , Tao-Yu Chen , Kao-Yu Hsu
发明人： Su Tao , Tao-Yu Chen , Kao-Yu Hsu
IPC分类号： H01L2334
CPC分类号： H01L23/50 , H01L24/48 , H01L24/49 , H01L2224/05554 , H01L2224/05599 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/49175 , H01L2224/73265 , H01L2224/85399 , H01L2924/00014 , H01L2924/10162 , H01L2924/14 , H01L2924/15311 , H01L2924/181 , H01L2924/19041 , H01L2924/19105 , H01L2924/00 , H01L2924/00012 , H01L2224/45015 , H01L2924/207 , H01L2224/45099
摘要： The structure of a solder mask for the circuit module of a BGA substrate mainly comprises a power ring, a ground ring, a plurality of holes, a plurality of first holes and a plurality of second holes. The power ring and the ground ring are arranged between the chip area and the wire bonding area; the first openings are arranged on the power ring and the ground ring for receiving the electronic part. Thus the substrate meets the requirement of keeping the electronic part close to the chip. The second openings are arranged over the associated holes which electrically connect to the power ring and the ground ring by traces; these holes do need not to electrically connect the power layer and the ground layer of the substrate. The openings of the present invention use the power ring, ground ring and the holes of the substrate to electrically connect to the electronic parts, so that the present invention does not need to provide other holes or traces thus simplifying the structure of the substrate. The distance of two openings of the present invention can, moreover, be adjusted according to the length of the electronic part.
摘要翻译：用于BGA基板的电路模块的焊料掩模的结构主要包括电源环，接地环，多个孔，多个第一孔和多个第二孔。电源环和接地环布置在芯片区域和引线接合区域之间; 第一开口布置在电源环和用于接收电子部件的接地环上。因此，基板满足保持电子部件靠近芯片的要求。第二开口布置在相关联的孔上，其通过迹线电连接到电源环和接地环; 这些孔不需要电连接基板的功率层和接地层。本发明的开口使用功率环，接地环和基板的孔电连接到电子部件，使得本发明不需要提供其它孔或迹线，因此简化了基板的结构。此外，本发明的两个开口的距离可以根据电子部件的长度进行调整。

4. 发明授权

US06176417B1 Ball bonding method on a chip 有权
标题翻译：球形焊接方法在芯片上
公开(公告)号：US06176417B1
公开(公告)日：2001-01-23
申请号：US09419288
申请日：1999-10-15
申请人： Yu-Fang Tsai , Su Tao , Simon Lee , Tao Yu Chen
发明人： Yu-Fang Tsai , Su Tao , Simon Lee , Tao Yu Chen
IPC分类号： B23K3100
CPC分类号： H01L24/85 , B23K20/007 , H01L24/03 , H01L24/05 , H01L24/48 , H01L24/78 , H01L2224/03 , H01L2224/04042 , H01L2224/05556 , H01L2224/05599 , H01L2224/48091 , H01L2224/48227 , H01L2224/48471 , H01L2224/48479 , H01L2224/4851 , H01L2224/48511 , H01L2224/78301 , H01L2224/7855 , H01L2224/85051 , H01L2224/85186 , H01L2224/85201 , H01L2224/85203 , H01L2224/85205 , H01L2224/85399 , H01L2224/85986 , H01L2924/00013 , H01L2924/00014 , H01L2924/01013 , H01L2924/01019 , H01L2924/00011 , H01L2224/13099 , H01L2224/45099 , H01L2924/00
摘要： A ball bonding method on a chip mainly comprises steps of: a wire is burned to form a ball on a capillary; the capillary is moved down to a second bonding point for ball bonding; and the capillary is moved up in a vertical direction thereby pulling the tip of the ball to be cut such that the ball has a uniformly body shape and tip height. Therefore, the ball provides uniform body shape and tip height for wire bonding at a second bonding point under lower variability conditions thus increasing the reliability of products.
摘要翻译：芯片上的球焊方法主要包括以下步骤：将线烧成毛细管上的球; 毛细管向下移动到用于球接合的第二接合点; 并且毛细管沿垂直方向向上移动，从而拉动要切割的球的尖端，使得球具有均匀的体形和尖端高度。因此，球在较低变异条件下，在第二接合点提供均匀的体形和尖端高度用于引线接合，从而增加产品的可靠性。

5. 发明授权

US07605020B2 Semiconductor chip package 有权
标题翻译：半导体芯片封装
公开(公告)号：US07605020B2
公开(公告)日：2009-10-20
申请号：US11612393
申请日：2006-12-18
申请人： Su Tao , Shih Chang Lee
发明人： Su Tao , Shih Chang Lee
IPC分类号： H01L21/00
CPC分类号： H01L23/36 , H01L23/49816 , H01L23/49833 , H01L23/49838 , H01L2224/05568 , H01L2224/05573 , H01L2224/16225 , H01L2224/32225 , H01L2224/73204 , H01L2224/73253 , H01L2924/00014 , H01L2924/01079 , H01L2924/07811 , H01L2924/15311 , H01L2924/00 , H01L2224/05599
摘要： A method of manufacturing a semiconductor chip package includes mechanically and electrically connecting a semiconductor chip to a top surface of a main substrate, securely attaching the semiconductor chip to a recessed cavity on a bottom surface of an interconnection substrate, mechanically and electrically connecting the main substrate to the interconnection substrate, and cutting the main substrate to form a central substrate and a peripheral substrate wherein the semiconductor chip is disposed on the central substrate. The cutting step is conducted either (i) by forming a plurality of slots such that the central substrate and the peripheral substrate are partially conned to each other or (ii) by completely separating the central substrate and the peripheral substrate.
摘要翻译：制造半导体芯片封装的方法包括将半导体芯片机械地和电连接到主基板的顶表面，将半导体芯片牢固地连接到互连基板的底表面上的凹腔中，机械地和电连接主基板并且切割主基板以形成中心基板和外围基板，其中半导体芯片设置在中心基板上。切割步骤（i）通过形成多个狭缝进行，使得中心基板和外围基板彼此部分连接，或者（ii）通过完全分离中心基板和外围基板。

6. 发明授权

US07102241B2 Leadless semiconductor package 有权
标题翻译：无铅半导体封装
公开(公告)号：US07102241B2
公开(公告)日：2006-09-05
申请号：US10929503
申请日：2004-08-31
申请人： Su Tao
发明人： Su Tao
IPC分类号： H01L23/29 , H01L23/48
CPC分类号： H01L23/492 , H01L23/3107 , H01L23/3121 , H01L23/49811 , H01L24/48 , H01L2224/32245 , H01L2224/48091 , H01L2224/73265 , H01L2924/00014 , H01L2924/181 , H01L2924/1815 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： A leadless semiconductor package disposed on a substrate includes a chip, a plurality of leads, wherein each lead has a metal layer and a first molding compound formed on the metal layer, a second molding compound disposed on the first molding compound, and a chip paddle for carrying the chip. The leads are connected to the chip by wire bonding technique. The metal layer is exposed out of the first molding compound; and the second molding compound encapsulates the chip with the chip paddle exposed out of the second molding compound.
摘要翻译：设置在基板上的无引线半导体封装包括芯片，多个引线，其中每个引线具有金属层和形成在金属层上的第一模塑料，设置在第一模塑料上的第二模塑料和芯片桨用于携带芯片。引线通过引线接合技术连接到芯片。金属层露出第一模塑料; 并且所述第二模塑料封装所述芯片，所述芯片焊盘暴露于所述第二模塑料之外。

7. 发明授权

US07037759B2 Semiconductor package and method for manufacturing the same 有权
公开(公告)号：US07037759B2
公开(公告)日：2006-05-02
申请号：US10864408
申请日：2004-06-10
申请人： Su Tao
发明人： Su Tao
IPC分类号： H01L21/44
CPC分类号： H01L24/11 , H01L24/13 , H01L2224/05001 , H01L2224/05022 , H01L2224/05548 , H01L2224/05572 , H01L2224/056 , H01L2224/13099 , H01L2224/131 , H01L2924/0001 , H01L2924/01013 , H01L2924/01033 , H01L2924/01047 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/014 , H01L2924/14 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/00014 , H01L2224/05124
摘要： A semiconductor package comprises a semiconductor chip, a lid, a plurality of traces, a compliant layer, a plurality of conductive pastes, and a plurality of solder pads. The semiconductor chip has an active surface, a backside, and a plurality of bonding pads disposed on the active surface. The lid covers the active surface of the semiconductor chip. The traces are disposed between the lid and the active surface of the semiconductor chip, and are electrically connected to the bonding pads. The compliant layer covers the backside of the semiconductor chip for isolating the traces. The conductive pastes are electrically connected to the traces, and the solder pads are electrically connected to the conductive pastes.

8. 发明授权

US07002257B2 Optical component package and packaging including an optical component horizontally attached to a substrate 有权
标题翻译：光学部件封装和包装，其包括水平地附接到基板的光学部件
公开(公告)号：US07002257B2
公开(公告)日：2006-02-21
申请号：US10463578
申请日：2003-06-18
申请人： Su Tao , Kuo-Chung Yee , Jen-Chieh Kao
发明人： Su Tao , Kuo-Chung Yee , Jen-Chieh Kao
IPC分类号： H01L23/28
CPC分类号： H01L27/14618 , H01L24/29 , H01L24/32 , H01L24/73 , H01L27/14683 , H01L31/0203 , H01L31/0232 , H01L2224/32145 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/73265 , H01L2924/01033 , H01L2924/01047 , H01L2924/01082 , H01L2924/15787 , H01L2924/181 , H01L2924/00014 , H01L2924/00012 , H01L2924/00
摘要： An optical component package includes a substrate, an optical component, a plurality of spacers, a plurality of wires, and a transparent molding compound. The optical component is disposed on the substrate, and the surface of the optical component located away from the substrate is used to receive an optical signal. The spacers are disposed between the substrate and optical component. The wires electrically connect the optical component to the substrate. The transparent molding compound encapsulates the optical component. In this case, the diameter of each of the spacers is equal to the thickness of the transparent molding compound minus the thickness of the optical component minus the distance between where the optical signal enters the transparent molding compound and where the optical signal is received by the optical component. Furthermore, this invention also discloses a packaging method for the optical component package.
摘要翻译：光学部件封装包括基板，光学部件，多个间隔件，多根电线以及透明模塑料。光学部件设置在基板上，并且使用远离基板的光学部件的表面来接收光信号。间隔件设置在基板和光学部件之间。电线将光学部件电连接到基板。透明模塑料封装光学部件。在这种情况下，每个间隔物的直径等于透明模塑料的厚度减去光学部件的厚度减去光信号进入透明模塑料之间的距离，并且光信号由光学元件。此外，本发明还公开了一种用于光学部件封装的封装方法。

9. 发明授权

US06946729B2 Wafer level package structure with a heat slug 有权
标题翻译：具有散热片的晶圆级封装结构
公开(公告)号：US06946729B2
公开(公告)日：2005-09-20
申请号：US10417693
申请日：2003-04-17
申请人： Chun-Chi Lee , Su Tao
发明人： Chun-Chi Lee , Su Tao
IPC分类号： H01L23/31 , H01L23/433 , H01L23/34 , H01L23/02 , H01L23/48 , H01L23/495 , H05K7/20
CPC分类号： H01L24/49 , H01L23/3128 , H01L23/4334 , H01L24/48 , H01L2224/05554 , H01L2224/48091 , H01L2224/48227 , H01L2224/48228 , H01L2224/49175 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01082 , H01L2924/15311 , H01L2924/181 , H01L2924/00 , H01L2224/45099 , H01L2224/05599 , H01L2924/00012
摘要： A wafer level package structure and a method for packaging said wafer level package structure are described. The wafer level package structure at least comprises a die, a heat slug covering said die, a carrier for supporting said heat slug and said die, a plurality of wires electrically connecting said die and said carrier, and a mould compound encapsulating said die, said carrier, said heat slug and said wires. The method comprises the steps of: (a)providing a heat slug metal with a plurality of openings; (b)mounting said heat slug metal onto a wafer to dispose said openings on corresponding bonding pads of the wafer so as to expose said bonding pads; (c)sawing said combined heat slug metal and wafer into a plurality of die units; (d)attaching said die unit onto a carrier; (e)electrically connecting a plurality of wires to said die unit and said carrier; (f)encapsulating said wired die unit and said carrier. In the present invention, the heat slug metal and wafer can be sawed into a plurality of die units at the same time to improve the defect of the complicated process of individually sawing heat slug metal and wafer and individually combining heat slug metal and wafer in the conventional method.
摘要翻译：描述了晶片级封装结构和用于封装晶片级封装结构的方法。晶片级封装结构至少包括一个管芯，一个覆盖所述管芯的散热片，一个用于支撑所述加热块和所述管芯的载体，多个电连接所述管芯和所述载体的电线以及封装所述管芯的模具化合物，载体，所述热塞和所述电线。该方法包括以下步骤：（a）提供具有多个开口的热块金属; （b）将所述加热块金属安装在晶片上以将所述开口布置在所述晶片的对应的焊盘上，以暴露所述焊盘; （c）将所述组合的热块金属和晶片锯切成多个模具单元; （d）将所述模具单元附接到载体上; （e）将多根电线电连接到所述模具单元和所述载体上; （f）封装所述有线芯片单元和所述载体。在本发明中，可以同时将散热块金属和晶片锯成多个模具单元，以改善单独锯切热芯金属和晶片的复杂工艺的缺陷，并且将热块金属和晶片分别组合在常规方法。

10. 发明申请

US20050189641A1 Semiconductor package 审中-公开
公开(公告)号：US20050189641A1
公开(公告)日：2005-09-01
申请号：US11115236
申请日：2005-04-27
申请人： Su Tao , Chi Chiu , Sung Wu
发明人： Su Tao , Chi Chiu , Sung Wu
IPC分类号： H01L21/56 , H01L21/58 , H01L23/31 , H01L23/66 , H01L25/065 , H01L23/02
CPC分类号： H01L23/66 , H01L21/563 , H01L23/3128 , H01L23/315 , H01L24/32 , H01L24/48 , H01L24/73 , H01L24/83 , H01L25/0657 , H01L2224/05599 , H01L2224/16225 , H01L2224/29011 , H01L2224/2919 , H01L2224/32145 , H01L2224/32225 , H01L2224/45099 , H01L2224/48091 , H01L2224/48145 , H01L2224/48227 , H01L2224/73203 , H01L2224/73204 , H01L2224/73265 , H01L2224/8319 , H01L2224/8385 , H01L2224/85399 , H01L2225/06506 , H01L2225/0651 , H01L2225/06568 , H01L2924/00014 , H01L2924/01006 , H01L2924/01033 , H01L2924/01082 , H01L2924/01087 , H01L2924/014 , H01L2924/0665 , H01L2924/07802 , H01L2924/15311 , H01L2924/181 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/00 , H01L2924/00012 , H01L2224/45015 , H01L2924/207
摘要： A semiconductor package comprises a first chip, a substrate, a middle layer, a second chip, and an encapsulant. The first chip has an active surface and a high-frequency element defining a high-frequency area on the active surface. The substrate supports the first chip and is electrically connected to the first chip. The middle layer is disposed on the first chip and has a recess corresponding to the high-frequency area. The second chip is disposed on the middle layer and electrically connected to either the first chip or the substrate. The encapsulant encapsulates the first chip, the middle layer, the second chip, and a part of the substrate.

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