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1. 发明申请

US20160035762A1 Methods for Manufacturing RFID Tags and Structures Formed Therefrom 审中-公开
标题翻译：制造RFID标签和结构的方法
公开(公告)号：US20160035762A1
公开(公告)日：2016-02-04
申请号：US14847999
申请日：2015-09-08
申请人： James Montague CLEEVES , J. Devin MACKENZIE , Arvind KAMATH
发明人： James Montague CLEEVES , J. Devin MACKENZIE , Arvind KAMATH
IPC分类号： H01L27/12 , H01L29/872 , H01L49/02 , G06K19/073 , H01L23/13 , H01L23/66 , H01L29/66 , G06K19/077 , H01L29/786 , H01L23/14
CPC分类号： H01L27/1255 , G06K19/073 , G06K19/07749 , H01F17/0006 , H01L23/13 , H01L23/142 , H01L23/66 , H01L27/127 , H01L27/1292 , H01L28/60 , H01L29/66143 , H01L29/66742 , H01L29/78696 , H01L29/872 , H01L2223/6611 , H01L2223/6677 , H01L2924/0002 , H01L2924/00
摘要： Radio frequency identification (RFID) tags and processes for manufacturing the same. The RFID device generally includes (1) a metal antenna and/or inductor; (2) a dielectric layer thereon, to support and insulate integrated circuitry from the metal antenna and/or inductor; (3) a plurality of diodes and a plurality of transistors on the dielectric layer, the diodes having at least one layer in common with the transistors; and (4) a plurality of capacitors in electrical communication with the metal antenna and/or inductor and at least some of the diodes, the plurality of capacitors having at least one layer in common with the plurality of diodes and/or with contacts to the diodes and transistors. The method preferably integrates liquid silicon-containing ink deposition into a cost effective, integrated manufacturing process for the manufacture of RFID circuits. Furthermore, the present RFID tags generally provide higher performance (e.g., improved electrical characteristics) as compared to tags containing organic electronic devices.
摘要翻译：射频识别（RFID）标签及其制造方法。 RFID设备通常包括（1）金属天线和/或电感器; （2）其上的介电层，用于支撑和绝缘来自金属天线和/或电感器的集成电路; （3）介电层上的多个二极管和多个晶体管，二极管具有至少一个与晶体管共同的层; 和（4）与金属天线和/或电感器以及至少一些二极管电连通的多个电容器，所述多个电容器具有与所述多个二极管共同的至少一个层和/或与所述多个二极管的触点二极管和晶体管。该方法优选将液态含硅油墨沉积物集成到用于制造RFID电路的成本有效的集成制造工艺中。此外，与包含有机电子器件的标签相比，本发明的RFID标签通常提供更高的性能（例如，改进的电气特性）。

2. 发明申请

US20140091909A1 Surveillance Devices with Multiple Capacitors 有权
标题翻译：具有多个电容器的监控设备
公开(公告)号：US20140091909A1
公开(公告)日：2014-04-03
申请号：US13632745
申请日：2012-10-01
申请人： Patrick SMITH , Criswell CHOI , James Montague CLEEVES , Vivek SUBRAMANIAN , Arvind KAMATH , Steven MOLESA
发明人： Patrick SMITH , Criswell CHOI , James Montague CLEEVES , Vivek SUBRAMANIAN , Arvind KAMATH , Steven MOLESA
IPC分类号： G06K7/01 , H01G7/00 , G06K19/077
CPC分类号： H01G4/40 , H01G4/38
摘要： The present invention relates to surveillance and/or identification devices having capacitors connected in parallel or in series, and methods of making and using such devices. Devices with capacitors connected in parallel, where one capacitor is fabricated with a relatively thick capacitor dielectric and another is fabricated with a relatively thin capacitor dielectric achieve both a high-precision capacitance and a low breakdown voltage for relatively easy surveillance tag deactivation. Devices with capacitors connected in series result in increased lateral dimensions of a small capacitor. This makes the capacitor easier to fabricate using techniques that may have relatively limited resolution capabilities.
摘要翻译：本发明涉及具有并联或串联连接的电容器的监视和/或识别装置以及制造和使用这些装置的方法。具有并联连接电容器的器件，其中一个电容器用相对较厚的电容器电介质制造，另一个电容器由相对薄的电容器电介质制成，实现了高精度电容和低击穿电压，以便相对容易的监视标签去激活。具有串联连接的电容器的装置增加了小电容器的横向尺寸。这使得使用可能具有相对有限的分辨能力的技术来制造电容器更容易。

3. 发明申请

US20120307569A1 Printed Non-Volatile Memory 有权
标题翻译：印刷非易失性存储器
公开(公告)号：US20120307569A1
公开(公告)日：2012-12-06
申请号：US13585673
申请日：2012-08-14
申请人： Arvind KAMATH , Patrick Smith , James Montague Cleeves
发明人： Arvind KAMATH , Patrick Smith , James Montague Cleeves
IPC分类号： H01L29/788 , G11C16/10 , G11C16/04 , H01L21/336
CPC分类号： H01L21/28518 , H01L21/288 , H01L21/76801 , H01L21/76895 , H01L27/115 , H01L27/11558 , H01L27/1292 , H01L29/66757 , H01L29/66825 , H01L29/7881
摘要： A nonvolatile memory cell is disclosed, having first and second semiconductor islands at the same horizontal level and spaced a predetermined distance apart, the first semiconductor island providing a control gate and the second semiconductor island providing source and drain terminals; a gate dielectric layer on at least part of the first semiconductor island; a tunneling dielectric layer on at least part of the second semiconductor island; a floating gate on at least part of the gate dielectric layer and the tunneling dielectric layer; and a metal layer in electrical contact with the control gate and the source and drain terminals. In one advantageous embodiment, the nonvolatile memory cell may be manufactured using an “all-printed” process technology.
摘要翻译：公开了一种非易失性存储器单元，其具有在相同水平位置处并且间隔开预定距离的第一和第二半导体岛，所述第一半岛具有提供控制栅极和所述第二半岛岛提供源极和漏极端子; 在所述第一半导体岛的至少一部分上的栅介质层; 在所述第二半导体岛的至少一部分上的隧道介电层; 至少部分栅极电介质层和隧道电介质层上的浮栅; 以及与控制栅极以及源极和漏极端子电接触的金属层。在一个有利的实施例中，非易失性存储单元可以使用全印刷工艺技术来制造。

4. 发明申请

US20100244133A1 Printed Dopant Layers 有权
标题翻译：印刷掺杂层
公开(公告)号：US20100244133A1
公开(公告)日：2010-09-30
申请号：US12797274
申请日：2010-06-09
申请人： Arvind KAMATH , James Montague Cleeves , Joerg Rockenberger , Patrick Smith , Fabio Zürcher
发明人： Arvind KAMATH , James Montague Cleeves , Joerg Rockenberger , Patrick Smith , Fabio Zürcher
IPC分类号： H01L29/786 , H01L21/336
CPC分类号： H01L21/316 , H01L21/02211 , H01L21/02288 , H01L21/02318 , H01L21/3165 , H01L27/1285 , H01L27/1292 , H01L29/66757 , H01L29/78621
摘要： A method for making an electronic device, such as a MOS transistor, including the steps of forming a plurality of semiconductor islands on an electrically functional substrate, printing a first dielectric layer on or over a first subset of the semiconductor islands and optionally a second dielectric layer on or over a second subset of the semiconductor islands, and annealing. The first dielectric layer contains a first dopant, and the (optional) second dielectric layer contains a second dopant different from the first dopant. The dielectric layer(s), semiconductor islands and substrate are annealed sufficiently to diffuse the first dopant into the first subset of semiconductor islands and, when present, the second dopant into the second subset of semiconductor islands.
摘要翻译：一种用于制造诸如MOS晶体管的电子器件的方法，包括以下步骤：在电功能衬底上形成多个半导体岛，在第一半导体岛子集上或第二子体上印刷第一电介质层，在半导体岛的第二子集上或之上，以及退火。第一介电层包含第一掺杂剂，并且（任选的）第二介电层包含不同于第一掺杂剂的第二掺杂剂。电介质层，半导体岛和衬底被充分退火以将第一掺杂剂扩散到半导体岛的第一子集中，并且当存在时将第二掺杂剂扩散到半导体岛的第二子集中。

5. 发明申请

US20090020829A1 PRINTING OF CONTACT METAL AND INTERCONNECT METAL VIA SEED PRINTING AND PLATING 有权
标题翻译：通过种子印刷和镀层印刷接触金属和互连金属
公开(公告)号：US20090020829A1
公开(公告)日：2009-01-22
申请号：US12175450
申请日：2008-07-17
申请人： Aditi CHANDRA , Arvind KAMATH , James Montague CLEEVES , Joerg ROCKENBERGER , Mao Takashima , Erik SCHER
发明人： Aditi CHANDRA , Arvind KAMATH , James Montague CLEEVES , Joerg ROCKENBERGER , Mao Takashima , Erik SCHER
IPC分类号： H01L21/768 , H01L21/28 , H01L29/78
CPC分类号： H01L21/288 , H01L21/28518 , H01L21/32051 , H01L21/32053 , H01L21/76838 , H01L21/76873 , H01L21/76895 , H01L27/1285 , H01L27/1292 , H01L29/458 , H01L29/78618 , H01L2924/0002 , H01L2924/00
摘要： Methods of forming contacts (and optionally, local interconnects) using an ink comprising a silicide-forming metal, electrical devices such as diodes and/or transistors including such contacts and (optional) local interconnects, and methods for forming such devices are disclosed. The method of forming contacts includes depositing an ink of a silicide-forming metal onto an exposed silicon surface, drying the ink to form a silicide-forming metal precursor, and heating the silicide-forming metal precursor and the silicon surface to form a metal silicide contact. Optionally, the metal precursor ink may be selectively deposited onto a dielectric layer adjacent to the exposed silicon surface to form a metal-containing interconnect. Furthermore, one or more bulk conductive metal(s) may be deposited on remaining metal precursor ink and/or the dielectric layer. Electrical devices, such as diodes and transistors may be made using such printed contact and/or local interconnects. A metal ink may be printed for contacts as well as for local interconnects at the same time, or in the alternative, the printed metal can act as a seed for electroless deposition of other metals if different metals are desired for the contact and the interconnect lines. This approach advantageously reduces the number of processing steps and does not necessarily require any etching.
摘要翻译：公开了使用包含硅化物形成金属的油墨形成触点（和任选的局部互连）的方法，诸如二极管和/或包括这种触点的晶体管的电气器件，（可选的）局部互连）以及用于形成这种器件的方法。形成接触的方法包括将硅化物形成金属的油墨沉积到暴露的硅表面上，干燥油墨以形成形成硅化物的金属前体，以及加热形成硅化物的金属前体和硅表面以形成金属硅化物联系。任选地，可以将金属前体油墨选择性地沉积到与暴露的硅表面相邻的电介质层上，以形成含金属互连。此外，一个或多个体导电金属可以沉积在剩余的金属前体油墨和/或介电层上。可以使用这种印刷的接触和/或局部互连来制造电子器件，例如二极管和晶体管。金属墨水可以同时印刷以用于接触以及局部互连，或者替代地，如果需要用于接触和互连线的不同金属，印刷金属可以用作其它金属的无电沉积的种子。这种方法有利地减少了处理步骤的数量，并且不一定需要任何蚀刻。

6. 发明申请

US20210320323A1 STACKED SOLID STATE BATTERIES AND METHODS OF MAKING THE SAME 有权
公开(公告)号：US20210320323A1
公开(公告)日：2021-10-14
申请号：US17185122
申请日：2021-02-25
申请人： Aditi CHANDRA , Richard VAN DER LINDE , Paul BUTLER , Mao ITO , Jon SIMMONS , Miki TRIFUNOVIC , Alex YAN , Arvind KAMATH , Shoba RAO
发明人： Aditi CHANDRA , Richard VAN DER LINDE , Paul BUTLER , Mao ITO , Jon SIMMONS , Miki TRIFUNOVIC , Alex YAN , Arvind KAMATH , Shoba RAO
IPC分类号： H01M10/0562 , H01M10/0583 , H01M50/178
摘要： A solid-state battery and a method of making the same are disclosed. The battery includes a base frame or support, first and second exterior contacts on the base frame/support, stacked solid-state battery unit cells, first and second electrical connections, and encapsulation in contact with the base frame/support and covering the solid-state battery unit cells and the electrical connections. Each stacked solid-state battery unit cell is on a metal substrate and has exposed cathode and anode current collectors. The electrical connections respectively electrically connect the exposed cathode and anode current collectors to the first and second exterior contacts. The method includes forming the stacked solid-state battery unit cells on the base frame/support, forming the exterior contacts on the base frame/support, electrically connecting the exposed cathode and anode current collectors to the respective exterior contacts, and encapsulating the solid-state battery unit cells and the electrical connections.

7. 发明申请

US20130344301A1 PRINT PROCESSING FOR PATTERNED CONDUCTOR, SEMICONDUCTOR AND DIELECTRIC MATERIALS 有权
标题翻译：图形导体，半导体和电介质材料的印刷加工
公开(公告)号：US20130344301A1
公开(公告)日：2013-12-26
申请号：US13975231
申请日：2013-08-23
申请人： Erik SCHER , Steven MOLESA , Joerg ROCKENBERGER , Arvind KAMATH , Ikuo MORI , Wenzhuo GUO , Dmitry KARSHTEDT , Vladimir DIOUMAEV
发明人： Erik SCHER , Steven MOLESA , Joerg ROCKENBERGER , Arvind KAMATH , Ikuo MORI , Wenzhuo GUO , Dmitry KARSHTEDT , Vladimir DIOUMAEV
IPC分类号： C09D5/24 , H01B3/02
CPC分类号： C09D5/24 , C09D11/101 , C09D11/322 , C09D11/36 , C09D11/54 , H01B3/02 , H01L21/02532 , H01L21/02601 , H01L21/02628 , H01L21/28008 , H01L27/1292 , H01L29/6675 , H01L29/78696 , Y10T428/24802
摘要： Embodiments relate to printing features from an ink containing a material precursor. In some embodiments, the material includes an electrically active material, such as a semiconductor, a metal, or a combination thereof. In another embodiment, the material includes a dielectric. The embodiments provide improved printing process conditions that allow for more precise control of the shape, profile and dimensions of a printed line or other feature. The composition(s) and/or method(s) improve control of pinning by increasing the viscosity and mass loading of components in the ink. An exemplary method thus includes printing an ink comprising a material precursor and a solvent in a pattern on the substrate; precipitating the precursor in the pattern to form a pinning line; substantially evaporating the solvent to form a feature of the material precursor defined by the pinning line; and converting the material precursor to the patterned material.
摘要翻译：实施例涉及从含有材料前体的油墨印刷特征。在一些实施例中，材料包括电活性材料，例如半导体，金属或其组合。在另一个实施例中，该材料包括电介质。这些实施例提供改进的印刷工艺条件，其允许更精确地控制印刷线或其它特征的形状，轮廓和尺寸。组合物和/或方法通过增加油墨中组分的粘度和质量负载来改善对钉扎的控制。因此，示例性方法包括在基板上以图案印刷包含材料前体和溶剂的油墨; 以图案沉淀前体以形成钉扎线; 基本上蒸发溶剂以形成由钉扎线限定的材料前体的特征; 并将材料前体转化成图案化材料。

8. 发明公开

US20240128498A1 MULTILAYER ELECTROLYTE, SOLID-STATE BATTERY INCLUDING THE SAME, AND METHOD(S) OF MAKING THE SAME 审中-公开
公开(公告)号：US20240128498A1
公开(公告)日：2024-04-18
申请号：US18314616
申请日：2023-05-09
申请人： Arvind KAMATH , Shahid PIRZADA , Zhongchun WANG , Hui YANG
发明人： Arvind KAMATH , Shahid PIRZADA , Zhongchun WANG , Hui YANG
IPC分类号： H01M10/0562 , H01M4/485 , H01M4/58 , H01M4/66 , H01M10/02
CPC分类号： H01M10/0562 , H01M4/485 , H01M4/5825 , H01M4/661 , H01M4/664 , H01M10/02 , H01M2004/028
摘要： A solid-state battery cell, a solid-state battery, and methods of making the same are disclosed. The solid-state battery cell includes a cathode current collector, a cathode on the cathode current collector, a low-impedance interface film on the cathode, a solid-state electrolyte on or over the low-impedance interface film, a lithiophilic layer on or over the solid-state electrolyte, and an anode current collector on or over the lithiophilic layer. The low-impedance interface film may include an oxide, a nitride or an oxynitride of lithium and a metal selected from aluminum, silicon and titanium, carbon, a metal oxide, fluoride, oxyfluoride or phosphate, or an alkali metal borate, and may have a thickness of 5-100 Å, for example. The lithiophilic layer may be or include a metal oxide, silicate, aluminate or fluoride, or an elemental metal or metalloid, and may have a thickness of 5 Å to 1 μm, for example.

9. 发明申请

US20200273719A1 Integrated Circuits for Flexible Electronics Applications and High-Speed, Stamping-Based Methods of Attaching the Same to an Antenna or Other Substrate 审中-公开
公开(公告)号：US20200273719A1
公开(公告)日：2020-08-27
申请号：US16802544
申请日：2020-02-26
申请人： Miki TRIFUNOVIC , Aditi CHANDRA , Anand DESHPANDE , Arvind KAMATH
发明人： Miki TRIFUNOVIC , Aditi CHANDRA , Anand DESHPANDE , Arvind KAMATH
IPC分类号： H01L21/48 , H01L21/78 , H01L23/495 , H01L23/66 , H01Q1/38
摘要： A method of attaching one or more active devices on one or more substrates to a metal carrier by “hot stamping” is disclosed. The method includes contacting the active device(s) on the substrate(s) with the metal carrier, and applying pressure to and heating the active device(s) on the substrate(s) and the metal carrier sufficiently to affix or attach the active device(s) on the substrate(s) to the metal carrier. The active device(s) may include an integrated circuit. The substrate(s) may include a metal substrate on the backside of the active device and a protective/carrier film on the frontside of the active device. The protective/carrier film may be or include an organic polymer. The metal carrier may be or include a metal foil. Various examples of the method further include thinning the metal substrate, dicing the active device(s) and a continuous substrate, and/or separating the active devices.

10. 发明公开

US20240113341A1 CYLINDRICAL SOLID-STATE BATTERY, AND METHODS OF MAKING AND USING THE SAME 审中-公开
公开(公告)号：US20240113341A1
公开(公告)日：2024-04-04
申请号：US18468606
申请日：2023-09-15
申请人： RICHARD VAN DER LINDE , Arvind KAMATH , Khanh TRAN , Yasumasa MORITA , Zhongchun WANG , Mihalis MICHAEL
发明人： RICHARD VAN DER LINDE , Arvind KAMATH , Khanh TRAN , Yasumasa MORITA , Zhongchun WANG , Mihalis MICHAEL
IPC分类号： H01M10/0587 , H01M4/13 , H01M4/66 , H01M50/107 , H01M50/109 , H01M50/548
CPC分类号： H01M10/0587 , H01M4/13 , H01M4/661 , H01M50/107 , H01M50/109 , H01M50/548
摘要： A cylindrical solid-state battery and methods of making the same are disclosed. The battery includes a solid-state battery cell wound, wrapped or rolled around a core or itself, first and second terminals on opposite ends of the battery, and packaging between the first and second terminals, sealing the cell therein. The cell comprises a cathode current collector (CCC), a cathode on the CCC, a solid-state electrolyte on the cathode, an anode current collector (ACC) on the electrolyte, an insulation film on the ACC with an opening therein exposing the ACC, and a conductive redistribution layer in the opening and on the insulation film and a first sidewall of the cell. One of the terminals is electrically connected to the ACC through the redistribution layer, and the other terminal is electrically connected to the cathode or CCC on the opposite end of the battery.

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