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1. 发明授权

US07555394B2 Measuring circuit and a method for determining a characteristic of the impedance of a complex impedance element for facilitating characterization of the impedance thereof 有权
标题翻译：测量电路和用于确定复阻抗元件的阻抗的特性以便于表征其阻抗的方法
公开(公告)号：US07555394B2
公开(公告)日：2009-06-30
申请号：US11492606
申请日：2006-07-24
申请人： James F. Caffrey , Colm F. Slattery , Albert C. O'Grady , Colin Gerard Lyden , Donal P. Geraghty , Sean Smith
发明人： James F. Caffrey , Colm F. Slattery , Albert C. O'Grady , Colin Gerard Lyden , Donal P. Geraghty , Sean Smith
IPC分类号： G01R25/00 , G01R27/28
CPC分类号： G01R27/02
摘要： A single chip integrated circuit measuring circuit (1) for determining a characteristic of the impedance of an external complex impedance circuit (2) for facilitating characterization of the impedance of the complex impedance circuit (2) comprises a signal generating circuit (7) for generating a variable frequency stimulus signal for applying to the complex impedance circuit (2). A first receiving circuit (10) receives a response signal from the complex impedance circuit (2) in response to the stimulus signal and conditions the response signal. A first analog-to-digital converter (68) converts the conditioned response signal to a first digital output signal, which is read from the first analog-to-digital converter (68) through a first digital output port (14). The response signal from the complex impedance circuit (2) is a current signal, and a current to voltage converter circuit (64) converts the response signal to a voltage signal. A first RMS to DC level converting circuit (70) converts the AC voltage of the response signal to a DC voltage level, and a fourth multiplexer (67) selectively applies the voltage response signal or the DC voltage level signal to the first analog-to-digital converter (68), depending on whether it is desired that the first digital output signal should be indicative of the phase shift or amplitude change in the response signal relative to the stimulus signal. A second receiving circuit (20) receives the stimulus signal, and similarly converts the stimulus signal to a second digital output signal for facilitating comparison of the response signal with the stimulus signal.
摘要翻译：一种单芯片集成电路测量电路（1），用于确定外部复阻抗电路（2）的阻抗特性，以便于表征复阻抗电路（2）的阻抗，其特征在于包括一个信号发生电路（7）用于施加到复阻抗电路（2）的可变频率刺激信号。第一接收电路（10）响应于激励信号接收来自复阻抗电路（2）的响应信号并且对响应信号进行调节。第一模数转换器（68）将经调节的响应信号转换成通过第一数字输出端口（14）从第一模数转换器（68）读取的第一数字输出信号。来自复阻抗电路（2）的响应信号是电流信号，并且电流 - 电压转换器电路（64）将响应信号转换为电压信号。第一RMS至DC电平转换电路（70）将响应信号的AC电压转换为DC电压电平，第四多路复用器（67）选择性地将电压响应信号或DC电压电平信号施加到第一模数转换器数字转换器（68），这取决于第一数字输出信号是否应当指示响应信号相对于激励信号的相移或幅度变化。第二接收电路（20）接收刺激信号，并且类似地将激励信号转换为第二数字输出信号，以便于响应信号与刺激信号的比较。

2. 发明授权

US07319261B1 Integrated MOS one-way isolation coupler and a semiconductor chip having an integrated MOS isolation one-way coupler located thereon 有权
标题翻译：集成MOS单向隔离耦合器和位于其上的集成MOS隔离单向耦合器的半导体芯片
公开(公告)号：US07319261B1
公开(公告)日：2008-01-15
申请号：US10721039
申请日：2003-11-21
申请人： James Anthony Power , Michael Anthony O'Neill , Colin Gerard Lyden
发明人： James Anthony Power , Michael Anthony O'Neill , Colin Gerard Lyden
IPC分类号： H01L29/82
CPC分类号： H01L27/22 , H01L23/5227 , H01L27/0617 , H01L28/10 , H01L2924/0002 , H01L2924/00
摘要： A MOS isolation coupler is formed on a semiconductor chip by a CMOS process and comprises an inductor coil for generating a magnetic field in response to an input signal applied to terminals thereof. A MAGFET having a split drain formed by respective drain portions is formed on the semiconductor chip below the inductor coil, so that a current difference is induced between the drain currents in the drain portions which is proportional to the strength of the magnetic field generated by the inductor coil resulting from the input signal. The MAGFET is formed prior to the inductor coil. An oxide isolating layer is provided over the MAGFET, and the inductor coil is formed on the oxide layer. The depth of the oxide layer is sufficient for providing the desired amount of electrical isolation, while at the same time locating the inductor coil sufficiently close to the MAGFET so that the magnetic field generated by the inductor coil, extending axially through the inductor coil cuts the channel of the MAGFET substantially perpendicularly.
摘要翻译： MOS隔离耦合器通过CMOS工艺在半导体芯片上形成，并且包括用于响应于施加到其端子的输入信号而产生磁场的电感线圈。在电感线圈下方的半导体芯片上形成具有由相应的漏极部分形成的分离漏极的MAGFET，从而在漏极部分中的漏极电流之间产生电流差异，该漏极电流与由由输入信号产生的电感线圈。在电感线圈之前形成MAGFET。在MAGFET上设置氧化物隔离层，在氧化物层上形成电感线圈。氧化物层的深度足以提供所需量的电隔离，同时将电感线圈定位成足够靠近MAGFET，使得由电感线圈产生的磁场沿轴向延伸穿过电感线圈切断 MAGFET的通道基本垂直。

3. 发明授权

US07286075B2 Analog to digital converter with dither 有权
标题翻译：具有抖动的模数转换器
公开(公告)号：US07286075B2
公开(公告)日：2007-10-23
申请号：US11273196
申请日：2005-11-14
申请人： Michael Hennessy , Christopher Peter Hurrell , Colin Gerard Lyden
发明人： Michael Hennessy , Christopher Peter Hurrell , Colin Gerard Lyden
IPC分类号： H03M1/12
CPC分类号： H03M1/0639 , H03M1/468
摘要： An analog to digital converter is provided comprising an array of capacitors for sampling an input, each capacitor having at least one associated switch for controllably connecting a terminal of the capacitor to a first reference voltage or to a second reference voltage; and a sequence generator for generating a sequence of bits, wherein during sampling of the input onto the array of capacitors an output of the sequence generator is supplied to the switches of a first group of capacitors to control whether a given capacitor within the first group is connected by its associated switch to the first reference voltage or to the second reference voltage.
摘要翻译：提供了一种模数转换器，包括用于对输入进行采样的电容器阵列，每个电容器具有至少一个相关联的开关，用于将电容器的端子可控地连接到第一参考电压或第二参考电压; 以及用于产生位序列的序列发生器，其中在对所述电容器阵列的输入进行采样期间，所述序列发生器的输出被提供给第一组电容器的开关，以控制所述第一组内的给定电容器是否为通过其相关联的开关连接到第一参考电压或第二参考电压。

4. 发明授权

US07419838B2 Method for one-way coupling an input signal to an integrated circuit 有权
标题翻译：将输入信号单向耦合到集成电路的方法
公开(公告)号：US07419838B2
公开(公告)日：2008-09-02
申请号：US11985541
申请日：2007-11-15
申请人： James Anthony Power , Michael Anthony O'Neill , Colin Gerard Lyden
发明人： James Anthony Power , Michael Anthony O'Neill , Colin Gerard Lyden
IPC分类号： H01L21/00
CPC分类号： H01L27/22 , H01L23/5227 , H01L27/0617 , H01L28/10 , H01L2924/0002 , H01L2924/00
摘要： A method for one-way coupling an input signal to an integrated circuit on a semiconductor chip with the integrated circuit electrically isolated from the input signal comprises forming a MOS isolation coupler on the semiconductor chip by a CMOS process. The MOS isolation coupler comprises an inductor coil for generating a magnetic field in response to an input signal applied to terminals thereof. A MAGFET having a split drain formed by respective drain portions is formed on the semiconductor chip below the inductor coil, so that a current difference is induced between the drain currents in the drain portions which is proportional to the strength of the magnetic field generated by the inductor coil resulting from the input signal. The MAGFET is formed prior to the inductor coil. An oxide isolating layer is provided over the MAGFET, and the inductor coil is formed on the oxide layer. The depth of the oxide layer is sufficient for providing the desired amount of electrical isolation, while at the same time locating the inductor coil sufficiently close to the MAGFET so that the magnetic field generated by the inductor coil, extending axially through the inductor coil cuts the channel of the MAGFET substantially perpendicularly.
摘要翻译：将输入信号单向耦合到具有与输入信号电隔离的集成电路的半导体芯片上的集成电路的方法包括通过CMOS工艺在半导体芯片上形成MOS隔离耦合器。 MOS隔离耦合器包括用于响应于施加到其端子的输入信号而产生磁场的电感线圈。在电感线圈下方的半导体芯片上形成具有由相应的漏极部分形成的分离漏极的MAGFET，从而在漏极部分中的漏极电流之间产生电流差异，该漏极电流与由由输入信号产生的电感线圈。在电感线圈之前形成MAGFET。在MAGFET上设置氧化物隔离层，在氧化物层上形成电感线圈。氧化物层的深度足以提供所需量的电隔离，同时将电感线圈定位成足够靠近MAGFET，使得由电感线圈产生的磁场沿轴向延伸穿过电感线圈切断 MAGFET的通道基本垂直。

5. 发明授权

US07348906B2 INL curve correction in a pipeline ADC 有权
标题翻译：管线ADC中的INL曲线校正
公开(公告)号：US07348906B2
公开(公告)日：2008-03-25
申请号：US11224432
申请日：2005-09-12
申请人： John J. O'Donnell , Colin Gerard Lyden , David G. Nairn
发明人： John J. O'Donnell , Colin Gerard Lyden , David G. Nairn
IPC分类号： H03M1/20
CPC分类号： H03M1/0641 , H03M1/069 , H03M1/167 , H03M3/424
摘要： The present invention relates to a method and system for reducing integral non linearity errors in a pipeline Analog to Digital Converter (ADC). The invention provides in a first embodiment a method comprising the steps of: adding an analog dither signal to the analog input signal of a pipeline Analog to Digital Converter, and converting the analog input signal to a digital output signal by means of the pipeline Analog to Digital Converter. The amplitude of the analog dither signal is determined by the architecture of the Analog to Digital Converter. The invention also provides in a second embodiment a circuit comprising a pipeline analog to digital converter for converting an analog input signal to a digital output signal and a feedback circuit coupled to the converter such that the digital output signal is adapted to have an average non linearity error value of about zero LSBs.
摘要翻译：本发明涉及用于减少管线模数转换器（ADC）中的积分非线性误差的方法和系统。本发明在第一实施例中提供了一种方法，包括以下步骤：将模拟抖动信号添加到流水线模数转换器的模拟输入信号，并通过管线将模拟输入信号转换为数字输出信号模拟到数字转换器模拟抖动信号的幅度由模数转换器的架构决定。本发明还在第二实施例中提供一种包括用于将模拟输入信号转换为数字输出信号的流水线模数转换器和耦合到转换器的反馈电路的电路，使得数字输出信号适于具有平均非线性度误差值约零LSB。

6. 发明授权

US07701256B2 Signal conditioning circuit, a comparator including such a conditioning circuit and a successive approximation converter including such a circuit 有权
标题翻译：信号调理电路，包括这种调理电路的比较器和包括这种电路的逐次逼近转换器
公开(公告)号：US07701256B2
公开(公告)日：2010-04-20
申请号：US11901304
申请日：2007-09-17
申请人： Christopher Peter Hurrell , Colin Gerard Lyden
发明人： Christopher Peter Hurrell , Colin Gerard Lyden
IPC分类号： G01R19/00 , G11C7/00 , H03F3/45
CPC分类号： H03M1/124 , H03F3/45188 , H03F3/45659 , H03F2200/264 , H03F2200/78 , H03F2203/45082 , H03F2203/45396 , H03F2203/45424 , H03F2203/45642 , H03M1/46
摘要： A signal conditioning circuit for a latching comparator comprising first and second transistors arranged in a long tail pair, the long tail pair having an active load and configured to act as an integrator.
摘要翻译：一种用于锁存比较器的信号调理电路，包括以长尾对布置的第一和第二晶体管，该长尾对具有有源负载并被配置为充当积分器。

7. 发明授权

US07339508B2 Digital to analog converter with shared calibration 有权
标题翻译：具有共享校准的数模转换器
公开(公告)号：US07339508B2
公开(公告)日：2008-03-04
申请号：US11474174
申请日：2006-06-23
申请人： Gavin Cosgrave , Colin Gerard Lyden , Roderick C. McLachlan , Dennis A. Dempsey , Tudor M. Vinereanu , Patrick Kirby
发明人： Gavin Cosgrave , Colin Gerard Lyden , Roderick C. McLachlan , Dennis A. Dempsey , Tudor M. Vinereanu , Patrick Kirby
IPC分类号： H03M1/06
CPC分类号： H03M1/1038 , H03M1/662 , H03M1/68
摘要： The invention provides a multi-channel DAC circuit which provides for correlation between selected ones of the multiple channels such that a single set of calibration coefficients may be used for calibration of multiple channels.
摘要翻译：本发明提供一种多通道DAC电路，其提供多个通道中的选定的通道之间的相关性，使得可以使用单组校准系数来校准多个通道。

8. 发明授权

US07435964B2 Thermal sensor with increased sensitivity 有权
标题翻译：热传感器灵敏度增加
公开(公告)号：US07435964B2
公开(公告)日：2008-10-14
申请号：US11584466
申请日：2006-10-20
申请人： William A. Lane , Colin Gerard Lyden , Eamon Hynes , Edward John Coyne
发明人： William A. Lane , Colin Gerard Lyden , Eamon Hynes , Edward John Coyne
IPC分类号： G01J5/02
CPC分类号： G01J5/06 , G01J1/04 , G01J1/0411 , G01J5/02 , G01J5/0225 , G01J5/024 , G01J5/045 , G01J5/08 , G01J5/0803 , G01J5/0806 , G01J5/0846 , G01J5/089 , G01J5/10 , G01J5/24 , G01J2005/068 , H01L31/0203 , H01L31/02325 , H01L2924/16235
摘要： The invention provides a thermal sensor having a first and second temperature sensing elements each being formed on a thermally isolated table in a first substrate.
摘要翻译：本发明提供一种热传感器，其具有第一和第二温度感测元件，每个温度感测元件形成在第一基底中的热隔离台上。

9. 发明授权

US07729890B2 Method for determining the change of a signal, and an apparatus including a circuit arranged to implement the method 有权
标题翻译：用于确定信号变化的方法，以及包括实现该方法的电路的装置
公开(公告)号：US07729890B2
公开(公告)日：2010-06-01
申请号：US11725261
申请日：2007-03-19
申请人： Robert John Brewer , Michael C. W. Coln , Colin Gerard Lyden , Alain V. Guery
发明人： Robert John Brewer , Michael C. W. Coln , Colin Gerard Lyden , Alain V. Guery
IPC分类号： H04B15/00
CPC分类号： G06F17/10 , H03M1/0626 , H03M1/12
摘要： A method of estimating a change of a variable over a measurement window, including the steps of taking multiple samples of the variable during the measurement window, defining a weight to be associated with each sample, the weight varying as a function of position of the sample within the measurement window, processing the samples taking account of their weight to form an estimate of the change in the variable.
摘要翻译：一种估计变量在测量窗口上的变化的方法，包括以下步骤：在测量窗口期间采取变量的多个样本，定义要与每个样本相关联的权重，该权重作为样本位置的函数而变化在测量窗口内，根据其重量来处理样本，以形成变量变化的估计。

10. 发明申请

US20080079474A1 Signal conditioning circuit, a comparator including such a conditioning circuit and a successive approximation converter including such a circuit 有权
标题翻译：信号调理电路，包括这种调理电路的比较器和包括这种电路的逐次逼近转换器
公开(公告)号：US20080079474A1
公开(公告)日：2008-04-03
申请号：US11901304
申请日：2007-09-17
申请人： Christopher Peter Hurrell , Colin Gerard Lyden
发明人： Christopher Peter Hurrell , Colin Gerard Lyden
IPC分类号： G06G7/18
CPC分类号： H03M1/124 , H03F3/45188 , H03F3/45659 , H03F2200/264 , H03F2200/78 , H03F2203/45082 , H03F2203/45396 , H03F2203/45424 , H03F2203/45642 , H03M1/46
摘要： A signal conditioning circuit for a latching comparator comprising first and second transistors arranged in a long tail pair, the long tail pair having an active load and configured to act as an integrator.
摘要翻译：一种用于锁存比较器的信号调理电路，包括以长尾对布置的第一和第二晶体管，该长尾对具有有源负载并被配置为充当积分器。

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