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1. 发明授权

US07286075B2 Analog to digital converter with dither 有权
标题翻译：具有抖动的模数转换器
公开(公告)号：US07286075B2
公开(公告)日：2007-10-23
申请号：US11273196
申请日：2005-11-14
申请人： Michael Hennessy , Christopher Peter Hurrell , Colin Gerard Lyden
发明人： Michael Hennessy , Christopher Peter Hurrell , Colin Gerard Lyden
IPC分类号： H03M1/12
CPC分类号： H03M1/0639 , H03M1/468
摘要： An analog to digital converter is provided comprising an array of capacitors for sampling an input, each capacitor having at least one associated switch for controllably connecting a terminal of the capacitor to a first reference voltage or to a second reference voltage; and a sequence generator for generating a sequence of bits, wherein during sampling of the input onto the array of capacitors an output of the sequence generator is supplied to the switches of a first group of capacitors to control whether a given capacitor within the first group is connected by its associated switch to the first reference voltage or to the second reference voltage.
摘要翻译：提供了一种模数转换器，包括用于对输入进行采样的电容器阵列，每个电容器具有至少一个相关联的开关，用于将电容器的端子可控地连接到第一参考电压或第二参考电压; 以及用于产生位序列的序列发生器，其中在对所述电容器阵列的输入进行采样期间，所述序列发生器的输出被提供给第一组电容器的开关，以控制所述第一组内的给定电容器是否为通过其相关联的开关连接到第一参考电压或第二参考电压。

2. 发明授权

US07701256B2 Signal conditioning circuit, a comparator including such a conditioning circuit and a successive approximation converter including such a circuit 有权
标题翻译：信号调理电路，包括这种调理电路的比较器和包括这种电路的逐次逼近转换器
公开(公告)号：US07701256B2
公开(公告)日：2010-04-20
申请号：US11901304
申请日：2007-09-17
申请人： Christopher Peter Hurrell , Colin Gerard Lyden
发明人： Christopher Peter Hurrell , Colin Gerard Lyden
IPC分类号： G01R19/00 , G11C7/00 , H03F3/45
CPC分类号： H03M1/124 , H03F3/45188 , H03F3/45659 , H03F2200/264 , H03F2200/78 , H03F2203/45082 , H03F2203/45396 , H03F2203/45424 , H03F2203/45642 , H03M1/46
摘要： A signal conditioning circuit for a latching comparator comprising first and second transistors arranged in a long tail pair, the long tail pair having an active load and configured to act as an integrator.
摘要翻译：一种用于锁存比较器的信号调理电路，包括以长尾对布置的第一和第二晶体管，该长尾对具有有源负载并被配置为充当积分器。

3. 发明申请

US20080079474A1 Signal conditioning circuit, a comparator including such a conditioning circuit and a successive approximation converter including such a circuit 有权
标题翻译：信号调理电路，包括这种调理电路的比较器和包括这种电路的逐次逼近转换器
公开(公告)号：US20080079474A1
公开(公告)日：2008-04-03
申请号：US11901304
申请日：2007-09-17
申请人： Christopher Peter Hurrell , Colin Gerard Lyden
发明人： Christopher Peter Hurrell , Colin Gerard Lyden
IPC分类号： G06G7/18
CPC分类号： H03M1/124 , H03F3/45188 , H03F3/45659 , H03F2200/264 , H03F2200/78 , H03F2203/45082 , H03F2203/45396 , H03F2203/45424 , H03F2203/45642 , H03M1/46
摘要： A signal conditioning circuit for a latching comparator comprising first and second transistors arranged in a long tail pair, the long tail pair having an active load and configured to act as an integrator.
摘要翻译：一种用于锁存比较器的信号调理电路，包括以长尾对布置的第一和第二晶体管，该长尾对具有有源负载并被配置为充当积分器。

4. 发明授权

US07274321B2 Analog to digital converter 有权
标题翻译：模数转换器
公开(公告)号：US07274321B2
公开(公告)日：2007-09-25
申请号：US11273220
申请日：2005-11-14
申请人： Christopher Peter Hurrell , Colin Gerard Lyden
发明人： Christopher Peter Hurrell , Colin Gerard Lyden
IPC分类号： H03M1/12
CPC分类号： H03M1/145 , H03M1/144 , H03M1/468
摘要： A analog to digital converter, comprising: an input for receiving an input signal to be digitized; a first converter core for performing a first part of an analog to digital conversion, and for outputting a first digital result; a first residue calculator for calculating a first residue as a difference between the input signal and the first digital result; a second converter core for performing a second part of the analog to digital conversion by converting the first residue; wherein at least one of the first and second converter cores comprises at least three analog to digital conversion engines and a controller for controlling the operation of the engines such that the engines collaborate to perform a successive approximation search, and wherein a plurality of bits can be determined during a single trial step of the successive approximation search.
摘要翻译：一种模数转换器，包括：用于接收要被数字化的输入信号的输入; 用于执行模数转换的第一部分并用于输出第一数字结果的第一转换器核心; 第一残差计算器，用于计算第一残差作为输入信号和第一数字结果之间的差; 第二转换器核，用于通过转换第一残差来执行模数转换的第二部分; 其中所述第一和第二转换器核心中的至少一个包括至少三个模数转换引擎和用于控制引擎的操作的控制器，使得引擎协同执行逐次逼近搜索，并且其中多个位可以是在逐次逼近搜索的单个试验步骤中确定。

5. 发明申请

US20080198056A1 Analog to digital converter 有权
标题翻译：模数转换器
公开(公告)号：US20080198056A1
公开(公告)日：2008-08-21
申请号：US12069216
申请日：2008-02-08
申请人： Christopher Peter Hurrell
发明人： Christopher Peter Hurrell
IPC分类号： H03M1/12
CPC分类号： H03M1/144 , H03M1/468 , H03M1/804
摘要： An analog to digital converter is provided in which the outputs of first and second digital to analog converters DAC1 and DAC2 are combined in a combining circuit so as to form a plurality of decision thresholds. This enables two or more bits to be determined in a single trial.
摘要翻译：提供了一种模数转换器，其中第一和第二数模转换器DAC 1和DAC 2的输出在组合电路中组合以便形成多个判定阈值。这可以在单个试验中确定两个或多个位。

6. 发明申请

US20080084340A1 Dither technique for improving dynamic non-linearity in an analog to digital converter, and an analog to digital converter having improved dynamic non-linearity 有权
标题翻译：用于改善模数转换器中的动态非线性的抖动技术，以及具有改善的动态非线性的模数转换器
公开(公告)号：US20080084340A1
公开(公告)日：2008-04-10
申请号：US11712879
申请日：2007-03-01
申请人： Christopher Peter Hurrell
发明人： Christopher Peter Hurrell
IPC分类号： H03M1/20
CPC分类号： H03M1/0641 , H03M1/46
摘要： An analog to digital converter comprising a conversion engine having redundancy therein; and a dither device for applying a dither to the conversion engine; and a controller adapted to operate the conversion engine to perform a successive approximation conversion of the analog input, and wherein the dither is removed prior to completion of the analog to digital conversion.
摘要翻译：一种模数转换器，包括其中具有冗余度的转换引擎; 以及用于将抖动施加到转换引擎的抖动装置; 以及控制器，其适于操作所述转换引擎以执行所述模拟输入的逐次近似转换，并且其中所述抖动在所述模数转换完成之前被去除。

7. 发明申请

US20180075925A1 Multiplexer Distortion Cancellation 有权
公开(公告)号：US20180075925A1
公开(公告)日：2018-03-15
申请号：US15266741
申请日：2016-09-15
申请人： Christopher Peter Hurrell , Rares Andrei Bodnar , Pasquale Delizia
发明人： Christopher Peter Hurrell , Rares Andrei Bodnar , Pasquale Delizia
IPC分类号： G11C27/02 , H03K17/693
CPC分类号： G11C27/02 , G11C7/02 , G11C27/024 , H03K17/693
摘要： Distortion in a combined sample and hold circuit and multiplexer can be reduced by dividing the sample and hold circuit and the multiplexer up into main and compensation signal channels, and considering the total error signal that arises during an acquire phase across both the switches of the multiplexer and the input switches of the sample and hold stage as a single error signal that has to be compensated. This compensation is then achieved by causing the same error voltages to be induced in both the main and compensation channels of the whole MUX and sample and hold circuit, such that errors can be made to cancel, thus improving the performance of the stage.

8. 发明申请

US20120007660A1 Bias Current Generator 审中-公开
标题翻译：偏置电流发生器
公开(公告)号：US20120007660A1
公开(公告)日：2012-01-12
申请号：US12832517
申请日：2010-07-08
申请人： Derek HUMMERSTON , Christopher Peter Hurrell
发明人： Derek HUMMERSTON , Christopher Peter Hurrell
IPC分类号： G11C5/14
CPC分类号： G11C5/147
摘要： A bias current generator comprising at least one field effect transistor operating as a current source or sink, a capacitive store for storing a first control voltage, and a first switch for selectively connecting the capacitive store to a gate of the at least one field effect transistor.
摘要翻译：一种偏置电流发生器，包括用作电流源或吸收器的至少一个场效应晶体管，用于存储第一控制电压的电容存储器，以及用于选择性地将电容存储器连接到至少一个场效应晶体管的栅极的第一开关。

9. 发明授权

US07936297B2 Analog to digital converter 有权
标题翻译：模数转换器
公开(公告)号：US07936297B2
公开(公告)日：2011-05-03
申请号：US12534392
申请日：2009-08-03
申请人： Christopher Peter Hurrell , Colin G Lyden , Ronald A. Kapusta
发明人： Christopher Peter Hurrell , Colin G Lyden , Ronald A. Kapusta
IPC分类号： H03M1/12
CPC分类号： H03M1/0626 , H03M1/164 , H03M1/44 , H03M1/466
摘要： An analog to digital converter comprising an Nth analog to digital converter and an N+1th analog to digital converter arranged in series such that a residue signal from the Nth analog to digital converter is provided as an input to the N+1th analog to digital converter, characterized in that a bandwidth control means is provided in a signal path for the residue signal and the bandwidth control means is controlled so as to have a first bandwidth during a first period following generation of a conversion result from the Nth analog to digital converter, and a second bandwidth less than the first bandwidth in a second period following the first period.
摘要翻译：一种包括第N模数转换器和N + 1模数转换器的模数转换器，其串联布置，使得来自第N模数转换器的残留信号被提供给第N + 1模数转换器其特征在于，在残留信号的信号路径中提供带宽控制装置，并且在产生来自第N模拟数字转换器的转换结果之后的第一周期期间，控制带宽控制装置以具有第一带宽，以及在所述第一周期之后的第二周期中小于所述第一带宽的第二带宽。

10. 发明授权

US07773020B2 Analog to digital converter 有权
标题翻译：模数转换器
公开(公告)号：US07773020B2
公开(公告)日：2010-08-10
申请号：US12069216
申请日：2008-02-08
申请人： Christopher Peter Hurrell
发明人： Christopher Peter Hurrell
IPC分类号： H03M1/12
CPC分类号： H03M1/144 , H03M1/468 , H03M1/804
摘要： An analog to digital converter is provided in which the outputs of first and second digital to analog converters DAC1 and DAC2 are combined in a combining circuit so as to form a plurality of decision thresholds. This enables two or more bits to be determined in a single trial.
摘要翻译：提供了一种模数转换器，其中第一和第二数模转换器DAC1和DAC2的输出在组合电路中组合以形成多个判定阈值。这可以在单个试验中确定两个或多个位。

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