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    • 1. 发明授权
    • Time-to-digital converter and operation method thereof
    • 时 - 数转换器及其操作方法
    • US08330637B2
    • 2012-12-11
    • US13089558
    • 2011-04-19
    • Jae-Sup LeeKang-Yoon LeeAn-Soo ParkYoung-Gun PuJoon-Sung Park
    • Jae-Sup LeeKang-Yoon LeeAn-Soo ParkYoung-Gun PuJoon-Sung Park
    • H03M1/50
    • G04F10/005
    • A Time-to-Digital Converter (TDC) is provided. The TDC includes a first TDC unit for receiving a first input signal and a second input signal, delaying the first input signal on a specific time basis using each of first delay blocks, generating first phase-divided signals by performing first phase division on signals of input/output nodes for each of the first delay blocks on a predefined Phase-Interpolation (PI) delay time basis, and outputting the second input signal and a phase-divided signal closest to the second input signal, among the first phase-divided signals, a time amplifier for independently time-amplifying the second input signal and the phase-divided signal closest to the second input signal, and a second TDC unit for delaying a phase-divided signal closest to the time-amplified second input signal on a specific time basis using each of second delay blocks, and generating second phase-divided signals by performing second phase division on signals of input/output nodes for each of the second delay blocks on a predefined PI delay time basis.
    • 提供了时间数字转换器(TDC)。 TDC包括用于接收第一输入信号和第二输入信号的第一TDC单元,使用每个第一延迟块在特定时间基础上延迟第一输入信号,通过对信号进行第一相位除法来产生第一相位分割信号 在预定义相位插值(PI)延迟时间的基础上,为每个第一延迟块输入/输出节点,并且在第一分相信号中输出第二输入信号和最接近第二输入信号的相分离信号 ,用于独立时间放大第二输入信号和最接近第二输入信号的分相信号的时间放大器,以及第二TDC单元,用于将最接近时间放大的第二输入信号的相分离信号延迟到特定 使用每个第二延迟块,并且通过对预定义的每个第二延迟块的输入/输出节点的信号执行第二相位除法来产生第二相位分割信号 d PI延迟时间基础。
    • 3. 发明授权
    • Digital phase locked loop device and method in wireless communication system
    • 无线通信系统中的数字锁相环装置及方法
    • US08604851B2
    • 2013-12-10
    • US13817816
    • 2011-08-19
    • Kang-Yoon LeeYoung-Gun PuAn-Soo ParkJoon-Sung ParkJae-Sup Lee
    • Kang-Yoon LeeYoung-Gun PuAn-Soo ParkJoon-Sung ParkJae-Sup Lee
    • H03L7/06
    • H03L7/089H03L7/085H03L7/18H03L2207/50
    • A digital Phase Locked Loop (PLL) in a wireless communication system is provided. The PLL includes a Digitally Controlled Oscillator (DCO), a divider, a Phase Frequency Detector (PFD), a Time to Digital Converter (TDC), a delay comparator, and a level scaler. The DCO generates a frequency signal depending on an input Digital Tuning Word (DTW). The divider divides the frequency signal at an integer ratio. The PFD generates a signal representing a phase difference between a divided frequency signal and a reference signal. The TDC measures a time interval of the phase difference using the signal representing the phase difference. The delay comparator calculates a time interval in the case where rising edges coincide from values measured by the TDC. The level scaler generates a DTW that operates the DCO using a digital code representing the time interval.
    • 提供了无线通信系统中的数字锁相环(PLL)。 PLL包括数字控制振荡器(DCO),分频器,相位频率检测器(PFD),时间到数字转换器(TDC),延迟比较器和电平定标器。 DCO根据输入数字调谐字(DTW)产生频率信号。 分频器以整数比除成频率信号。 PFD产生表示分频信号和参考信号之间的相位差的信号。 TDC使用表示相位差的信号来测量相位差的时间间隔。 延迟比较器计算上升沿与TDC测量值相符的时间间隔。 级别缩放器生成使用表示时间间隔的数字代码来操作DCO的DTW。
    • 6. 发明申请
    • Predistorter for power amplifier
    • 功率放大器预失真器
    • US20060197595A1
    • 2006-09-07
    • US11185107
    • 2005-07-20
    • Hyun-II KangYoung-Hwan KimJae-Sup LeeSang-Hyun Woo
    • Hyun-II KangYoung-Hwan KimJae-Sup LeeSang-Hyun Woo
    • H03F1/26
    • H03F1/3276
    • A predistorter that linearizes the nonlinearity of a power amplifier in a system supporting a multimode and a multiband (frequency band). The predistorter includes a field-effect transistor, an impedance transform unit, a first inductor, a first capacitor, and a second capacitor. The field-effect transistor has a source connected to the ground and uses a variable gate bias voltage. The impedance transform unit is connected to a drain of the field-effect transistor to perform impedance transform. The first inductor is connected between the impedance transform unit and a voltage provided to the field-effect transistor. The first capacitor is connected between a power input terminal and the impedance transform unit. The second capacitor is connected between a power output terminal and the impedance transform unit.
    • 一种预失真器,其将支持多模和多频带(频带)的系统中的功率放大器的非线性线性化。 预失真器包括场效应晶体管,阻抗变换单元,第一电感器,第一电容器和第二电容器。 场效应晶体管具有连接到地并且使用可变栅极偏置电压的源极。 阻抗变换单元连接到场效应晶体管的漏极,以进行阻抗变换。 第一电感器连接在阻抗变换单元和提供给场效应晶体管的电压之间。 第一电容器连接在电源输入端子和阻抗变换单元之间。 第二电容器连接在电力输出端子和阻抗变换单元之间。