专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明申请

US20080173936A1 ACCESS DEVICE HAVING VERTICAL CHANNEL AND RELATED SEMICONDUCTOR DEVICE AND A METHOD OF FABRICATING THE ACCESS DEVICE 有权
标题翻译：具有垂直通道和相关半导体器件的访问器件以及制造访问器件的方法
公开(公告)号：US20080173936A1
公开(公告)日：2008-07-24
申请号：US11954135
申请日：2007-12-11
申请人： Jae-Man YOON , Yong-Chul OH , Hui-Jung KIM , Hyun-Woo CHUNG
发明人： Jae-Man YOON , Yong-Chul OH , Hui-Jung KIM , Hyun-Woo CHUNG
IPC分类号： H01L27/088 , H01L29/78 , H01L21/336
CPC分类号： H01L29/0847 , H01L21/823487 , H01L21/84 , H01L27/10823 , H01L27/10885 , H01L29/42392 , H01L29/66666 , H01L29/7827 , H01L29/78642
摘要： An access device and a semiconductor device are disclosed. The access device includes a vertically oriented channel separating a lower source/drain region and an upper source/drain region, a gate dielectric disposed on the channel, and a unified gate electrode/connection line coupled to the channel across the gate dielectric, wherein the unified gate electrode/connection line comprises a descending lip portion disposed proximate to the gate dielectric and overlaying at least a portion of the lower source/drain region.
摘要翻译：公开了一种存取装置和半导体装置。进入装置包括分隔下部源极/漏极区域和上部源极/漏极区域的垂直取向的沟道，设置在沟道上的栅极电介质以及耦合到穿过栅极电介质的沟道的统一的栅电极/连接线，其中，统一的栅极电极/连接线包括靠近栅极电介质设置并覆盖下部源极/漏极区域的至少一部分的下降的唇部。

2. 发明申请

US20070190723A1 METHOD OF FABRICATING TRANSISTOR OF DRAM SEMICONDUCTOR DEVICE 有权
标题翻译：制造DRAM半导体器件晶体管的方法
公开(公告)号：US20070190723A1
公开(公告)日：2007-08-16
申请号：US11738620
申请日：2007-04-23
申请人： Yong-Chul OH , Wook-Je KIM , Nak-Jin SON , Se-Myeong JANG , Gyo-Young JIN
发明人： Yong-Chul OH , Wook-Je KIM , Nak-Jin SON , Se-Myeong JANG , Gyo-Young JIN
IPC分类号： H01L21/336
CPC分类号： H01L21/823878 , H01L21/28185 , H01L21/28202 , H01L21/823807 , H01L21/823842 , H01L21/823857 , H01L27/10873 , H01L27/10894 , H01L29/513 , H01L29/518
摘要： Embodiments prevent or substantially reduce diffusion of a P-type impurity into a channel region in a PMOS transistor having a dual gate. Some embodiments include forming a device isolation film on a semiconductor substrate, forming a channel impurity region in an active region of the semiconductor substrate, and forming a gate insulation layer including a silicon oxide layer and a silicon oxide nitride layer on the semiconductor substrate. Also, the embodiments can include forming a polysilicon layer containing an N-type impurity on the gate insulation layer, and forming a gate electrode by selectively ion-implanting a P-type impurity into the polysilicon layer formed in a PMOS transistor region of the circuit region. The embodiments further include forming a conductive metal layer and a gate upper insulation layer on the gate electrode, and forming a gate stack in a gate region.
摘要翻译：实施例防止或基本上减少P型杂质扩散到具有双栅极的PMOS晶体管中的沟道区域中。一些实施例包括在半导体衬底上形成器件隔离膜，在半导体衬底的有源区中形成沟道杂质区，并在半导体衬底上形成包括氧化硅层和氧化硅氮化物层的栅极绝缘层。此外，实施例可以包括在栅极绝缘层上形成含有N型杂质的多晶硅层，并且通过选择性地将P型杂质离子注入形成在电路的PMOS晶体管区域中的多晶硅层中来形成栅电极地区。实施例还包括在栅电极上形成导电金属层和栅极上绝缘层，以及在栅极区域中形成栅叠层。

3. 发明申请

US20100203695A1 METHOD OF MANUFACTURING SEMICONDUCTOR DEVICES 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US20100203695A1
公开(公告)日：2010-08-12
申请号：US12704233
申请日：2010-02-11
申请人： Yong-Chul OH , Kang-Uk Kim
发明人： Yong-Chul OH , Kang-Uk Kim
IPC分类号： H01L21/336
CPC分类号： H01L21/84 , H01L27/10876 , H01L27/10885 , H01L27/10894
摘要： A semiconductor device includes an insulation layer disposed on a substrate having a first area and a second area, a first wiring disposed on the insulation layer in the first area, a first active structure disposed on the first wiring, a first gate insulation layer enclosing the first upper portion, a first gate electrode disposed on the first gate insulation layer, a first impurity region disposed at the first lower portion, and a second impurity region disposed at the first upper portion. The first wiring may extend in a first direction. The first active structure includes a first lower portion extending in the first direction and a first upper portion protruding from the first lower portion. The first gate electrode may extend in a second direction. The first impurity region may be electrically connected to the first wiring.
摘要翻译：半导体器件包括设置在具有第一区域和第二区域的衬底上的绝缘层，设置在第一区域中的绝缘层上的第一布线，设置在第一布线上的第一有源结构，第一栅极绝缘层，第一上部，设置在第一栅极绝缘层上的第一栅极电极，设置在第一下部的第一杂质区域和设置在第一上部的第二杂质区域。第一布线可以沿第一方向延伸。第一主动结构包括沿第一方向延伸的第一下部部分和从第一下部部分突出的第一上部部分。第一栅电极可以在第二方向上延伸。第一杂质区域可以电连接到第一布线。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式