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1. 发明申请

US20110102968A1 MULTILAYER STRUCTURE, CAPACITOR INCLUDING THE MULTILAYER STRUCTURE AND METHOD OF FORMING THE SAME 审中-公开
标题翻译：多层结构，包括多层结构的电容器及其形成方法
公开(公告)号：US20110102968A1
公开(公告)日：2011-05-05
申请号：US12838296
申请日：2010-07-16
申请人： Jae-Hyoung CHOI , Youn-Soo Kim , Jung-Hyeon Kim , Wan-Don Kim , Jae-Soon Lim , Sang-Yeol Kang
发明人： Jae-Hyoung CHOI , Youn-Soo Kim , Jung-Hyeon Kim , Wan-Don Kim , Jae-Soon Lim , Sang-Yeol Kang
IPC分类号： H01G4/008 , B32B9/04 , B05D5/12 , C23C14/34
CPC分类号： H01L23/5223 , H01L23/53261 , H01L28/56 , H01L28/91 , H01L29/40114 , H01L29/40117 , H01L29/518 , H01L2924/0002 , H01L2924/00
摘要： In a multilayer structure and a method of forming the same, a conductive layer including a metal nitride and a dielectric layer positioned on a surface of the conductive layer and having a high dielectric constant. The metal nitride comprises one of niobium, vanadium and compositions thereof. Thus, the EOT and leakage current of the multilayer structure may be sufficiently improved.
摘要翻译：在多层结构及其形成方法中，包括位于导电层表面上并具有高介电常数的金属氮化物和电介质层的导电层。金属氮化物包括铌，钒及其组合物中的一种。因此，可以充分提高多层结构的EOT和漏电流。

2. 发明申请

US20100196592A1 METHODS OF FABRICATING CAPACITORS INCLUDING LOW-TEMPERATURE CAPPING LAYERS 审中-公开
标题翻译：制造电容器的方法，包括低温吸收层
公开(公告)号：US20100196592A1
公开(公告)日：2010-08-05
申请号：US12699576
申请日：2010-02-03
申请人： Wan-Don Kim , Kyu-Ho Cho , Jin-Yong Kim , Jae-Hyoung Choi , Jae-Soon Lim , Oh-Seong Kwon , Beom-Seok Kim , Yong-Suk Tak
发明人： Wan-Don Kim , Kyu-Ho Cho , Jin-Yong Kim , Jae-Hyoung Choi , Jae-Soon Lim , Oh-Seong Kwon , Beom-Seok Kim , Yong-Suk Tak
IPC分类号： B05D5/12
CPC分类号： H01G4/33 , H01G4/008 , H01G4/12 , H01G4/224 , H01L27/10852 , H01L28/91
摘要： In a method of fabricating a capacitor, a lower electrode is formed, and a dielectric layer is formed on the lower electrode. An upper electrode is foamed on the dielectric layer opposite the lower electrode. A low-temperature capping layer is formed on the upper electrode at a temperature of less than about 300° C. Related devices and fabrication methods are also discussed.
摘要翻译：在制造电容器的方法中，形成下电极，并且在下电极上形成电介质层。上电极在与下电极相对的电介质层上发泡。在小于约300℃的温度下，在上电极上形成低温覆盖层。还讨论了相关装置和制造方法。

3. 发明申请

US20090258470A1 Method of Manufacturing a Semiconductor Device Using an Atomic Layer Deposition Process 审中-公开
标题翻译：使用原子层沉积工艺制造半导体器件的方法
公开(公告)号：US20090258470A1
公开(公告)日：2009-10-15
申请号：US12423249
申请日：2009-04-14
申请人： Jae-Hyoung Choi , Jin-Hyuk Choi , Cha-Young Yoo , Kyu-Ho Cho , Wan-Don Kim , Kyoung-Ryul Yoon , Jae-Hyun Yeo , Yong-Suk Tak
发明人： Jae-Hyoung Choi , Jin-Hyuk Choi , Cha-Young Yoo , Kyu-Ho Cho , Wan-Don Kim , Kyoung-Ryul Yoon , Jae-Hyun Yeo , Yong-Suk Tak
IPC分类号： H01L21/02 , H01L21/28 , H01L21/31
CPC分类号： H01L21/28202 , C23C16/308 , C23C16/405 , C23C16/45531 , C23C16/45536 , H01L21/02189 , H01L21/022 , H01L21/0228 , H01L21/3141 , H01L21/31641 , H01L21/318 , H01L28/40 , H01L29/0673 , H01L29/40114 , H01L29/517
摘要： Methods of manufacturing a semiconductor device include forming an absorption layer on a surface of a substrate by exposing the surface of the substrate to a first reaction gas at a first temperature. A metal oxide layer is then formed on the surface of the substrate by exposing the absorption layer to a second reaction gas at a second temperature. The first reaction gas may include a precursor containing zirconium (e.g., tetrakis(ethylmethylamino)zirconium) and the second reaction gas may include an oxidizing agent.
摘要翻译：制造半导体器件的方法包括通过在第一温度下将衬底的表面暴露于第一反应气体来在衬底的表面上形成吸收层。然后通过在第二温度下将吸收层暴露于第二反应气体，在衬底的表面上形成金属氧化物层。第一反应气体可以包括含锆的前体（例如四（乙基甲基氨基）锆）），第二反应气体可以包括氧化剂。

4. 发明申请

US20090130457A1 DIELECTRIC STRUCTURE 审中-公开
标题翻译：电介质结构
公开(公告)号：US20090130457A1
公开(公告)日：2009-05-21
申请号：US12273360
申请日：2008-11-18
申请人： Wan-Don Kim , Jae-Hyoung Choi , Kyu-Ho Cho , Jung-Hee Chung , Jin-Yong Kim , Yong-Suk Tak
发明人： Wan-Don Kim , Jae-Hyoung Choi , Kyu-Ho Cho , Jung-Hee Chung , Jin-Yong Kim , Yong-Suk Tak
IPC分类号： B32B17/06
CPC分类号： H01G4/33 , H01G4/1218 , H01G4/20 , H01L28/56 , H01L28/91
摘要： A dielectric structure includes a first dielectric layer, a buffer oxide layer and a second dielectric layer. The lower dielectric layer has a material having a perovskite structure including titanium and is formed on a substrate. The buffer oxide layer is formed on the first dielectric layer. The second dielectric layer has a perovskite structure including titanium and is formed on the buffer oxide layer.
摘要翻译：电介质结构包括第一电介质层，缓冲氧化物层和第二电介质层。下介电层具有包含钛的钙钛矿结构并形成在基板上的材料。缓冲氧化物层形成在第一电介质层上。第二电介质层具有包含钛的钙钛矿结构，形成在缓冲氧化物层上。

5. 发明授权

US07416904B2 Method for forming dielectric layer of capacitor 失效
标题翻译：电容器介质层形成方法
公开(公告)号：US07416904B2
公开(公告)日：2008-08-26
申请号：US10293530
申请日：2002-11-12
申请人： Jae-Hyoung Choi , Cha-Young Yoo , Suk-Jin Chung , Wan-Don Kim
发明人： Jae-Hyoung Choi , Cha-Young Yoo , Suk-Jin Chung , Wan-Don Kim
IPC分类号： H01L21/00 , H01L21/8242 , H01L21/8222 , H01L21/20
CPC分类号： H01L21/02183 , H01L21/02271 , H01L21/02304 , H01L21/02356 , H01L21/31691 , H01L28/55
摘要： A fabrication method for forming a semiconductor device having a capacitor is provided. A capacitor dielectric layer is formed by depositing a first layer and a second layer. The second layer is a major portion of the capacitor dielectric layer. The first layer acts as a seed layer, while the second layer is expitaxially grown. The material of the second layer as deposited is partially crystal. Nuclear generation and crystal growth occur separately so that the crystalline characteristic of the capacitor dielectric layer and the capacitance characteristic of the capacitor are enhanced. Moreover, the capacitor dielectric layer is crystallized at a relatively low temperature or for a relatively short time, thereby reducing leakage current as well as reducing deformation in the lower electrode. Optionally, The material of the second layer as deposited is not partially crystal but amorphous.
摘要翻译：提供一种用于形成具有电容器的半导体器件的制造方法。通过沉积第一层和第二层形成电容器电介质层。第二层是电容器介电层的主要部分。第一层用作种子层，而第二层被外延生长。沉积的第二层的材料是部分晶体的。核生成和晶体生长分开发生，使得电容器介电层的晶体特性和电容器的电容特性得到增强。此外，电容器电介质层在相对较低的温度或相当短的时间内结晶，从而减少漏电流以及减小下电极的变形。任选地，沉积的第二层的材料不是部分晶体而是无定形的。

6. 发明申请

US20100209595A1 Methods of Forming Strontium Ruthenate Thin Films and Methods of Manufacturing Capacitors Including the Same 审中-公开
标题翻译：形成钌酸锶薄膜的方法和制造包括其的电容器的方法
公开(公告)号：US20100209595A1
公开(公告)日：2010-08-19
申请号：US12708704
申请日：2010-02-19
申请人： Oh-Seong Kwon , Kyu-Ho Cho , Jung-Hee Chung , Jin-Yong Kim , Wan-Don Kim , Youn-Soo Kim , Yong-Suk Tak
发明人： Oh-Seong Kwon , Kyu-Ho Cho , Jung-Hee Chung , Jin-Yong Kim , Wan-Don Kim , Youn-Soo Kim , Yong-Suk Tak
IPC分类号： B05D5/12 , C23C16/00
CPC分类号： C23C16/40 , C23C16/45531 , H01G4/008 , H01G4/1209 , H01G4/33 , H01L27/10852 , H01L27/11507 , H01L28/55 , H01L28/91
摘要： In a method of forming a strontium ruthenate thin film using water vapor as an oxidizing agent, a strontium source and a ruthenium source are used. The strontium source includes a cyclopentadienyl (Cp) ligand, an alkoxide ligand, an alkyl ligand, an amide ligand or a halide ligand, and the ruthenium source includes a beta diketonate ligand.
摘要翻译：在使用水蒸汽作为氧化剂形成钌酸锶薄膜的方法中，使用锶源和钌源。锶源包括环戊二烯基（Cp）配体，醇盐配体，烷基配体，酰胺配体或卤化物配体，钌源包括β-二酮配体。

7. 发明授权

US6090704A Method for fabricating a high dielectric capacitor 失效
标题翻译：高介电电容器制造方法
公开(公告)号：US6090704A
公开(公告)日：2000-07-18
申请号：US113142
申请日：1998-07-10
申请人： Wan-Don Kim , Byoung-Taek Lee
发明人： Wan-Don Kim , Byoung-Taek Lee
IPC分类号： H01L21/28 , H01L21/02 , H01L21/60 , H01L21/74 , H01L21/8242 , H01L21/4763 , H01L21/20 , H01L21/44
CPC分类号： H01L27/10894 , H01L21/743 , H01L21/76897 , H01L28/75 , H01L27/10852 , H01L28/55
摘要： A method for fabricating a semiconductor device using a high dielectric material as a dielectric film of a capacitor wherein an etch stopping layer such as BST having a good dry etch selectivity with respect to an interlayer insulating film is formed on the adhesion layer formed on an upper electrode. This etch stopping layer prevents the upper electrode of a capacitor from being exposed to be etched during forming a metal contact.
摘要翻译：一种制造使用高介电材料作为电容器的电介质膜的半导体器件的方法，其中在上层形成的粘合层上形成有相对于层间绝缘膜具有良好的干蚀刻选择性的诸如BST的蚀刻停止层，电极。该蚀刻停止层防止在形成金属接触期间电容器的上电极被暴露而被蚀刻。

8. 发明授权

US09812448B2 Semiconductor devices and methods for fabricating the same 有权
公开(公告)号：US09812448B2
公开(公告)日：2017-11-07
申请号：US14963271
申请日：2015-12-09
申请人： Oh-Seong Kwon , Jin-Kyu Jang , Wan-Don Kim , Hoon-Joo Na , Sang-Jin Hyun
发明人： Oh-Seong Kwon , Jin-Kyu Jang , Wan-Don Kim , Hoon-Joo Na , Sang-Jin Hyun
IPC分类号： H01L27/088 , H01L21/28 , H01L29/49 , H01L29/66 , H01L27/02 , H01L27/11 , H01L29/51 , H01L29/78 , H01L29/165 , H01L21/8234
CPC分类号： H01L27/088 , H01L21/28088 , H01L21/82345 , H01L27/0207 , H01L27/0886 , H01L27/1104 , H01L29/165 , H01L29/4966 , H01L29/517 , H01L29/66545 , H01L29/7848
摘要： Provided are a semiconductor device configured to block a physical diffusion path by forming an oxide layer between barrier layers to prevent impurities from being diffused through the physical diffusion path between the barrier layers, and a method for fabricating the semiconductor device. The semiconductor device includes a gate insulation layer formed on a substrate, a first barrier layer formed on the gate insulation layer, an oxide layer formed on the first barrier layer, the oxide layer including an oxide formed by oxidizing a material included in the first barrier layer, a second barrier layer formed on the oxide layer, a gate electrode formed on the second barrier layer, and source/drains disposed at opposite sides of the gate electrode in the substrate.

9. 发明申请

US20160181412A1 SEMICONDUCTOR DEVICES AND METHODS FOR FABRICATING THE SAME 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20160181412A1
公开(公告)日：2016-06-23
申请号：US14963271
申请日：2015-12-09
申请人： Oh-Seong Kwon , Jin-Kyu Jang , Wan-Don Kim , Hoon-Joo Na , Sang-Jin Hyun
发明人： Oh-Seong Kwon , Jin-Kyu Jang , Wan-Don Kim , Hoon-Joo Na , Sang-Jin Hyun
IPC分类号： H01L29/78 , H01L29/06 , H01L27/088
CPC分类号： H01L27/088 , H01L21/28088 , H01L21/82345 , H01L27/0207 , H01L27/0886 , H01L27/1104 , H01L29/165 , H01L29/4966 , H01L29/517 , H01L29/66545 , H01L29/7848
摘要： Provided are a semiconductor device configured to block a physical diffusion path by forming an oxide layer between barrier layers to prevent impurities from being diffused through the physical diffusion path between the barrier layers, and a method for fabricating the semiconductor device. The semiconductor device includes a gate insulation layer formed on a substrate, a first barrier layer formed on the gate insulation layer, an oxide layer formed on the first barrier layer, the oxide layer including an oxide formed by oxidizing a material included in the first barrier layer, a second barrier layer formed on the oxide layer, a gate electrode formed on the second barrier layer, and source/drains disposed at opposite sides of the gate electrode in the substrate.
摘要翻译：提供了一种半导体器件，其被配置为通过在阻挡层之间形成氧化物层来阻挡物理扩散路径，以防止杂质通过阻挡层之间的物理扩散路径扩散，以及制造半导体器件的方法。半导体器件包括：形成在基板上的栅极绝缘层，形成在栅极绝缘层上的第一势垒层，形成在第一势垒层上的氧化物层，氧化物层包括通过氧化包含在第一势垒中的材料形成的氧化物形成在氧化物层上的第二阻挡层，形成在第二阻挡层上的栅电极和设置在基板中的栅电极的相对侧的源极/漏极。

10. 发明申请

US20120086014A1 Semiconductor Device Having Glue Layer And Supporter 有权
标题翻译：具有胶层和支撑体的半导体器件
公开(公告)号：US20120086014A1
公开(公告)日：2012-04-12
申请号：US13182916
申请日：2011-07-14
申请人： Wan-Don Kim , Beom-Seok Kim , Yong-Suk Tak , Kyu-Ho Cho , Seung-Hwan Lee , Oh-Seong Kwon , Geun-Kyu Choi
发明人： Wan-Don Kim , Beom-Seok Kim , Yong-Suk Tak , Kyu-Ho Cho , Seung-Hwan Lee , Oh-Seong Kwon , Geun-Kyu Choi
IPC分类号： H01L29/12 , H01L23/48
CPC分类号： H01L28/60 , H01L24/32 , H01L28/90 , H01L2224/32225 , H01L2224/32245 , H01L2224/8385
摘要： A plurality of metal patterns are disposed on a substrate. A support structure is provided between the plurality of metal patterns. The support structure has a supporter and a glue layer. Each of the plurality of metal patterns has a greater vertical length than a horizontal length on the substrate when viewed from a cross-sectional view. The supporter has a band gap energy of at least 4.5eV. The glue layer is in contact with the plurality of metal patterns. The supporter and the glue layer are formed of different materials.
摘要翻译：多个金属图案设置在基板上。在多个金属图案之间提供支撑结构。支撑结构具有支撑体和胶层。当从横截面视图观察时，多个金属图案中的每一个具有比基板上的水平长度更大的垂直长度。支架具有至少4.5eV的带隙能量。胶层与多个金属图案接触。支撑体和胶层由不同的材料形成。

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