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1. 发明申请

US20120030639A1 COMPUTING DEVICE AND METHOD FOR CHECKING SIGNAL TRANSMISSION LINES 失效
标题翻译：用于检查信号传输线的计算装置和方法
公开(公告)号：US20120030639A1
公开(公告)日：2012-02-02
申请号：US12961908
申请日：2010-12-07
申请人： JIA-LU YE , SHI-PIAO LUO , CHIA-NAN PAI , SHOU-KUO HSU
发明人： JIA-LU YE , SHI-PIAO LUO , CHIA-NAN PAI , SHOU-KUO HSU
IPC分类号： G06F17/50
CPC分类号： G06F17/5081 , G06F2217/82
摘要： A computing device and a method selects a signal transmission line from a circuit board, computes an actual length of each line segment of the selected signal transmission line, and computes an actual distance between each line segment of the selected signal transmission line and a corresponding line segment of each neighboring signal transmission line. If each actual length is less than or equal to a corresponding reference length and each actual distance is more than or equal to a corresponding reference distance, the device and method determines a design of the selected signal transmission line satisfies the design standards. Otherwise, if any actual length is more than a corresponding reference length, or if any actual distance is less than a corresponding reference distance, the device and method determines the design of the signal transmission line does not satisfy the design standards.
摘要翻译：计算装置和方法从电路板选择信号传输线，计算所选择的信号传输线的每个线段的实际长度，并且计算所选信号传输线的每个线段与对应线之间的实际距离每个相邻信号传输线的段。如果每个实际长度小于或等于对应的参考长度，并且每个实际距离大于或等于相应的参考距离，则设备和方法确定所选信号传输线的设计满足设计标准。否则，如果任何实际长度大于相应的参考长度，或者如果任何实际距离小于相应的参考距离，则设备和方法确定信号传输线的设计不符合设计标准。

2. 发明申请

US20120026707A1 PRINTED CIRCUIT BOARD 失效
标题翻译：印刷电路板
公开(公告)号：US20120026707A1
公开(公告)日：2012-02-02
申请号：US12872652
申请日：2010-08-31
申请人： SHI-PIAO LUO , CHIA-NAN PAI , SHOU-KUO HSU
发明人： SHI-PIAO LUO , CHIA-NAN PAI , SHOU-KUO HSU
IPC分类号： H05K7/00
CPC分类号： H05K1/0245 , H05K1/0243
摘要： A printed circuit board includes first and second layers, a control chip, bonding pads, and several electronic elements. The bonding pads can be selectively applied to interconnect the first and second layers, and the control chip with any of the electronic elements in a simple layout.
摘要翻译：印刷电路板包括第一层和第二层，控制芯片，焊盘和几个电子元件。可以选择性地施加接合焊盘以以简单的布局将第一层和第二层以及控制芯片与任何电子元件互连。

3. 发明申请

US20120185819A1 SYSTEM AND METHOD FOR VERIFYING PCB LAYOUT 失效
标题翻译：用于验证PCB布局的系统和方法
公开(公告)号：US20120185819A1
公开(公告)日：2012-07-19
申请号：US13244625
申请日：2011-09-25
申请人： ZHENG SHAN , SHI-PIAO LUO , CHIA-NAN PAI , SHOU-KUO HSU
发明人： ZHENG SHAN , SHI-PIAO LUO , CHIA-NAN PAI , SHOU-KUO HSU
IPC分类号： G06F17/50
CPC分类号： G06F17/5077
摘要： In a method for verifying a printed circuit board (PCB) layout using a computing device, a PCB simulation file is obtained from a storage device of the computing device, and a PCB image is displayed on a display device according to the PCB simulation file. The PCB image includes multiple signal lines and switching voltage regulator nodes (SVRN). A SVRN to be checked is selected from the PCB image, and all signal lines around the SVRN are searched. The method calculates a layout distance between the selected SVRN and each of the searched signal lines, and generates a graphical window interface to position a signal line whose layout distance is equal to or less than the minimum distance. The method further modifies the layout of the positioned signal line to satisfy a layout design specification by increasing the layout distance to the minimum distance.
摘要翻译：在使用计算装置验证印刷电路板（PCB）布局的方法中，从计算装置的存储装置获得PCB模拟文件，并且根据PCB仿真文件在显示装置上显示PCB图像。 PCB图像包括多个信号线和开关电压调节器节点（SVRN）。从PCB图像中选择要检查的SVRN，并搜索SVRN周围的所有信号线。该方法计算所选择的SVRN与所搜索的信号线之间的布局距离，并且生成图形窗口界面以定位其布局距离等于或小于最小距离的信号线。该方法通过将布局距离增加到最小距离来进一步修改定位信号线的布局以满足布局设计规范。

4. 发明申请

US20120167027A1 ELECTRONIC DEVICE AND METHOD FOR CHECKING LAYOUT DISTANCE OF A PRINTED CIRCUIT BOARD 审中-公开
标题翻译：电子设备和检查印刷电路板布局距离的方法
公开(公告)号：US20120167027A1
公开(公告)日：2012-06-28
申请号：US13172858
申请日：2011-06-30
申请人： YA-LING HUANG , SHI-PIAO LUO , CHIA-NAN PAI , SHOU-KUO HSU
发明人： YA-LING HUANG , SHI-PIAO LUO , CHIA-NAN PAI , SHOU-KUO HSU
IPC分类号： G06F17/50
CPC分类号： G06F17/5081
摘要： An electronic device and a method for checking layout distance of a printed circuit board (PCB) including presetting a checking condition to determine a reference layer. A high speed signal path is selected from a PCB design file, and a layer where the selected high speed signal path is located can be determined A reference layer of the determined layer is determined according to the checking condition, and a split line of the reference layer is determined. A shortest distance between each segment of the selected high speed signal path and the split line is calculated. If the shortest distance between a segment and the split line is less than the standard distance, layout of the segment is determined to be invalid.
摘要翻译：一种用于检查印刷电路板（PCB）的布局距离的电子设备和方法，包括预设检查条件以确定参考层。可以从PCB设计文件中选择高速信号路径，并且可以确定所选择的高速信号路径所在的层。根据检查条件确定确定层的参考层，并且确定参考的分割线层被确定。计算所选择的高速信号路径的每个段与分割线之间的最短距离。如果段与分割线之间的最短距离小于标准距离，则段的布局被确定为无效。

5. 发明申请

US20120017191A1 COMPUTING DEVICE AND METHOD FOR CHECKING DISTANCES BETWEEN TRANSMISSION LINES AND ANTI-PADS ARRANGED ON PRINTED CIRCUIT BOARD 失效
标题翻译：用于检查传输线之间的距离的计算装置和方法以及在印刷电路板上安装的防平板
公开(公告)号：US20120017191A1
公开(公告)日：2012-01-19
申请号：US13085432
申请日：2011-04-12
申请人： HAN-LONG CHEN , SHI-PIAO LUO , CHENG-HSIEN LEE , CHIA-NAN PAI , SHOU-KUO HSU
发明人： HAN-LONG CHEN , SHI-PIAO LUO , CHENG-HSIEN LEE , CHIA-NAN PAI , SHOU-KUO HSU
IPC分类号： G06F17/50
CPC分类号： G06F17/5081
摘要： A computing device and a method involves selection of one or more transmission lines from a printed circuit board (PCB) layout file, reading a transmission line from the one or more selected transmission lines, and determining neighboring anti-pads of the read transmission line in the PCB layout file. The computing device and method further determine an actual distance between the read transmission line and a neighboring anti-pad. If the actual distance is less than a preset standard distance, the computing device and method determine that the read transmission line and the neighboring anti-pad do not satisfy design requirements, and highlight the read transmission line and the neighboring anti-pad, to prompt a user to amend design of the read transmission line and the neighboring anti-pad.
摘要翻译：计算装置和方法包括从印刷电路板（PCB）布局文件中选择一条或多条传输线，从一条或多条所选传输线读取传输线，以及确定读传输线的相邻抗焊盘 PCB布局文件。计算设备和方法进一步确定读取传输线与相邻反焊盘之间的实际距离。如果实际距离小于预设的标准距离，则计算设备和方法确定读取传输线路和相邻的反焊盘不满足设计要求，并突出显示读取传输线路和相邻的反焊盘，以提示用户修改读取传输线的设计和相邻的反焊盘。

6. 发明申请

US20130049461A1 CIRCUIT TOPOLOGY OF PRINTED CIRCUIT BOARD 审中-公开
标题翻译：印刷电路板电路拓扑
公开(公告)号：US20130049461A1
公开(公告)日：2013-02-28
申请号：US13336000
申请日：2011-12-23
申请人： SHI-PIAO LUO , HUA-LI ZHOU , CHIA-NAN PAI , SHOU-KUO HSU
发明人： SHI-PIAO LUO , HUA-LI ZHOU , CHIA-NAN PAI , SHOU-KUO HSU
IPC分类号： H02J4/00
CPC分类号： H05K1/0248 , H03K5/1534 , H03K19/00346 , H04L25/0278 , H05K1/0231 , H05K1/0246 , H05K2201/10015 , Y10T307/25
摘要： A circuit topology for multiple loads includes a driving terminal, first and second signal receiving terminals, and a capacitor. The driving terminal is connected to a node through a first transmission line. The node is connected to the first and second signal receiving terminals through second and third transmission lines. The second transmission line is longer than the third transmission line, and a difference between lengths of the second and third transmission lines is greater than a product of a transmission speed and a rise time of signals from the driving terminal. A first terminal of the capacitor is connected to the third transmission line. A second terminal of the capacitor is grounded. A distance between the capacitor and the second signal receiving terminal is less than a distance between the capacitor and the node.
摘要翻译：用于多个负载的电路拓扑包括驱动端子，第一和第二信号接收端子以及电容器。驱动终端通过第一传输线连接到节点。节点通过第二和第三传输线连接到第一和第二信号接收终端。第二传输线比第三传输线长，并且第二传输线和第三传输线的长度之间的差大于来自驱动终端的信号的传输速度和上升时间的乘积。电容器的第一端子连接到第三传输线。电容器的第二个端子接地。电容器和第二信号接收端子之间的距离小于电容器和节点之间的距离。

7. 发明申请

US20130097576A1 COMPUTING DEVICE AND METHOD FOR CHECKING VIA STUB 失效
标题翻译：计算机和通过STUB进行检查的方法
公开(公告)号：US20130097576A1
公开(公告)日：2013-04-18
申请号：US13327771
申请日：2011-12-16
申请人： JIA-LU YE , CHIA-NAN PAI , SHOU-KUO HSU
发明人： JIA-LU YE , CHIA-NAN PAI , SHOU-KUO HSU
IPC分类号： G06F17/50
CPC分类号： G06F17/5036
摘要： A computer-based method and a computing device for checking stub lengths of via stubs of a printed circuit board (PCB) layout are provided. The computing device displays a check interface, selects signal transmission line from a currently run PCB layout through the check interface, receives a reference stub length input through the check interface, and determines the actual stub length of each via stub of each via each selected signal transmission line connected to. The computing device further determines that a design of one via stub satisfies the design standards, if the actual stub length of the one stub via is less than or equal to the reference length, and determines that a design of one via stub does not satisfy the design standards if the actual stub length of the one via stub is greater than the reference stub length.
摘要翻译：提供了一种基于计算机的方法和用于检查印刷电路板（PCB）布局的通孔短截线的短截线长度的计算装置。计算装置显示检查接口，通过检查接口从当前运行的PCB布局中选择信号传输线，接收通过检查接口输入的参考短截线长度，并通过每个选定信号确定每个通孔短截线的实际短截线长度传输线连接。如果一个存根通孔的实际短截线长度小于或等于参考长度，则计算设备还确定一个通孔存根的设计满足设计标准，并且确定一个通孔存储体的设计不满足如果一个通过存根的实际存根长度大于参考短截线长度，则设计标准。

8. 发明申请

US20130254729A1 DEVICE AND METHOD FOR CHECKING SIGNAL TRANSMISSION LINES OF PCB LAYOUT FILES 审中-公开
标题翻译：检查PCB布局文件的信号传输线的装置和方法
公开(公告)号：US20130254729A1
公开(公告)日：2013-09-26
申请号：US13585855
申请日：2012-08-15
申请人： YA-LING HUANG , CHIA-NAN PAI , SHOU-KUO HSU
发明人： YA-LING HUANG , CHIA-NAN PAI , SHOU-KUO HSU
IPC分类号： G06F17/50
CPC分类号： G06F17/5081 , G06F2217/82
摘要： A device and a method reads a circuit printed circuit (PCB) layout file, extracts arrangement information of all the interference source components and signal transmission lines of the PCB layout file, and selects a interference source component from the PCB layout file, then determines if there is any signal transmission line is laid under the selected interference source component.
摘要翻译：一种设备和方法读取电路印刷电路（PCB）布局文件，提取PCB布局文件的所有干扰源组件和信号传输线的布置信息，并从PCB布局文件中选择干扰源组件，然后确定是否在所选择的干扰源组件下面有任何信号传输线。

9. 发明申请

US20130158925A1 COMPUTING DEVICE AND METHOD FOR CHECKING DIFFERENTIAL PAIR 审中-公开
标题翻译：计算设备和检查差异对的方法
公开(公告)号：US20130158925A1
公开(公告)日：2013-06-20
申请号：US13585856
申请日：2012-08-15
申请人： YA-LING HUANG , CHIA-NAN PAI , SHOU-KUO HSU
发明人： YA-LING HUANG , CHIA-NAN PAI , SHOU-KUO HSU
IPC分类号： G06F19/00 , G01N37/00
CPC分类号： G06F17/5081
摘要： A computer-based method and a computing device for checking differential pairs of a printed circuit board layout are provided. The computing device determines the via pitch between switching vias of a differential pair according to the coordinates of the centers of the switching vias, determines the via gap between the switching vias of adjacent two differential pairs according to the radius and the coordinates of the centers of the switching vias, and determines that the switching vias does not satisfy design standards if the via pitch does not fall in an input via pitch range, or the via gap does not fall in an input via gap range.
摘要翻译：提供了一种用于检查印刷电路板布局的差分对的基于计算机的方法和计算装置。计算装置根据切换通孔的中心坐标来确定差分对的切换通孔之间的经过间距，根据半径的中心确定相邻两个差分对的切换通孔之间的通孔间隙并且如果通孔间距没有通过间距范围落入输入，或者通孔间隙不通过间隙范围落入输入，则确定开关通孔不满足设计标准。

10. 发明申请

US20120273254A1 SOLDERING PAD 有权
标题翻译：焊接垫
公开(公告)号：US20120273254A1
公开(公告)日：2012-11-01
申请号：US13217626
申请日：2011-08-25
申请人： HUA-LI ZHOU , CHIA-NAN PAI , SHOU-KUO HSU
发明人： HUA-LI ZHOU , CHIA-NAN PAI , SHOU-KUO HSU
IPC分类号： H01B5/00
CPC分类号： H05K1/111 , H05K1/0242 , H05K1/025 , H05K2201/09736 , Y02P70/611
摘要： A pad includes a first mating section and a second mating section. The first mating section includes a first horizontal plane and a first inclined plane. The second mating section includes a second horizontal plane and a second inclined plane. The first mating section is a copper foil capable of being connected to a wire. The second mating section is made of insulating material. The first inclined plane and the second inclined plane are bonded together.
摘要翻译：垫包括第一配合部分和第二配合部分。第一配合部分包括第一水平面和第一倾斜平面。第二配合部分包括第二水平面和第二倾斜平面。第一配合部分是能够连接到电线的铜箔。第二配合部分由绝缘材料制成。第一倾斜平面和第二倾斜平面结合在一起。

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