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1. 发明授权

US07348827B2 Apparatus and methods for adjusting performance of programmable logic devices 有权
标题翻译：用于调节可编程逻辑器件性能的装置和方法
公开(公告)号：US07348827B2
公开(公告)日：2008-03-25
申请号：US10848953
申请日：2004-05-19
申请人： Irfan Rahim , Peter McElheny , Yow-Juang W. Liu , Bruce Pedersen
发明人： Irfan Rahim , Peter McElheny , Yow-Juang W. Liu , Bruce Pedersen
IPC分类号： G05F3/02
CPC分类号： H03K19/1731 , G06F17/5054 , H03K19/00369 , H03K2217/0018
摘要： A programmable logic device (PLD) includes mechanisms for adjusting or setting the body bias of one or more transistors. The PLD includes a body-bias generator. The body-bias generator is configured to set a body bias of one or more transistors within the programmable logic device. More specifically, the body-bias generator sets the body bias of the transistor(s) so as to trade off performance and power consumption of the transistor(s).
摘要翻译：可编程逻辑器件（PLD）包括用于调整或设置一个或多个晶体管的体偏置的机构。 PLD包括体偏置发生器。体偏置发生器被配置为设置可编程逻辑器件内的一个或多个晶体管的体偏置。更具体地，体偏置发生器设置晶体管的体偏置，以便折衷晶体管的性能和功耗。

2. 发明授权

US08138786B2 Apparatus and methods for adjusting performance of integrated circuits 有权
标题翻译：用于调整集成电路性能的装置和方法
公开(公告)号：US08138786B2
公开(公告)日：2012-03-20
申请号：US12534101
申请日：2009-07-31
申请人： David Lewis , Vaughn Betz , Irfan Rahim , Peter McElheny , Yow-Juang W. Liu , Bruce Pedersen
发明人： David Lewis , Vaughn Betz , Irfan Rahim , Peter McElheny , Yow-Juang W. Liu , Bruce Pedersen
IPC分类号： H03K19/173 , H03K3/01
CPC分类号： G06F17/5054 , H03K5/133 , H03K19/00369 , H03K2005/00058 , H03K2005/00156 , H03K2217/0018
摘要： A programmable logic device (PLD) includes a delay circuit and a body-bias generator. The delay circuit has a delay configured to represent a delay of user circuit implement in the PLD. The body-bias generator is configured to adjust the body bias of a transistor within the user circuit. The body-bias generator adjusts the body bias of the transistor in response to a level derived from the signal propagation delay of the delay circuit.
摘要翻译：可编程逻辑器件（PLD）包括延迟电路和体偏置发生器。延迟电路具有被配置为表示PLD中的用户电路实现的延迟的延迟。体偏置发生器被配置为调整用户电路内的晶体管的体偏置。体偏置发生器响应于从延迟电路的信号传播延迟导出的电平来调节晶体管的体偏置。

3. 发明申请

US20080164936A1 Apparatus and Methods for Adjusting Performance of Programmable Logic Devices 审中-公开
标题翻译：用于调整可编程逻辑器件性能的装置和方法
公开(公告)号：US20080164936A1
公开(公告)日：2008-07-10
申请号：US12054382
申请日：2008-03-24
申请人： Irfan Rahim , Peter McElheny , Yow-Juang W. Liu , Bruce Pedersen
发明人： Irfan Rahim , Peter McElheny , Yow-Juang W. Liu , Bruce Pedersen
IPC分类号： G05F3/02 , H03K19/177
CPC分类号： H03K19/1731 , G06F17/5054 , H03K19/00369 , H03K2217/0018
摘要： A programmable logic device (PLD) includes mechanisms for adjusting or setting the body bias of one or more transistors. The PLD includes a body-bias generator. The body-bias generator is configured to set a body bias of one or more transistors within the programmable logic device. More specifically, the body-bias generator sets the body bias of the transistor(s) so as to trade off performance and power consumption of the transistor(s).
摘要翻译：可编程逻辑器件（PLD）包括用于调整或设置一个或多个晶体管的体偏置的机构。 PLD包括体偏置发生器。体偏置发生器被配置为设置可编程逻辑器件内的一个或多个晶体管的体偏置。更具体地，体偏置发生器设置晶体管的体偏置，以便折衷晶体管的性能和功耗。

4. 发明申请

US20090289696A1 Apparatus and Methods for Adjusting Performance of Integrated Circuits 有权
标题翻译：用于调整集成电路性能的装置和方法
公开(公告)号：US20090289696A1
公开(公告)日：2009-11-26
申请号：US12534101
申请日：2009-07-31
申请人： David Lewis , Vaughn Betz , Irfan Rahim , Peter McElheny , Yow-Juang W. Liu , Bruce Pedersen
发明人： David Lewis , Vaughn Betz , Irfan Rahim , Peter McElheny , Yow-Juang W. Liu , Bruce Pedersen
IPC分类号： H03K3/01 , G06F17/50 , H03K19/177
CPC分类号： G06F17/5054 , H03K5/133 , H03K19/00369 , H03K2005/00058 , H03K2005/00156 , H03K2217/0018
摘要： A programmable logic device (PLD) includes a delay circuit and a body-bias generator. The delay circuit has a delay configured to represent a delay of user circuit implement in the PLD. The body-bias generator is configured to adjust the body bias of a transistor within the user circuit. The body-bias generator adjusts the body bias of the transistor in response to a level derived from the signal propagation delay of the delay circuit.
摘要翻译：可编程逻辑器件（PLD）包括延迟电路和体偏置发生器。延迟电路具有被配置为表示PLD中的用户电路实现的延迟的延迟。体偏置发生器被配置为调整用户电路内的晶体管的体偏置。体偏置发生器响应于从延迟电路的信号传播延迟导出的电平来调节晶体管的体偏置。

5. 发明授权

US07573317B2 Apparatus and methods for adjusting performance of integrated circuits 有权
标题翻译：用于调整集成电路性能的装置和方法
公开(公告)号：US07573317B2
公开(公告)日：2009-08-11
申请号：US11535065
申请日：2006-09-26
申请人： David Lewis , Vaughn Betz , Irfan Rahim , Peter McElheny , Yow-Juang W. Liu , Bruce Pedersen
发明人： David Lewis , Vaughn Betz , Irfan Rahim , Peter McElheny , Yow-Juang W. Liu , Bruce Pedersen
IPC分类号： H03K3/01
CPC分类号： G06F17/5054 , H03K5/133 , H03K19/00369 , H03K2005/00058 , H03K2005/00156 , H03K2217/0018
摘要： A programmable logic device (PLD) includes a delay circuit and a body-bias generator. The delay circuit has a delay configured to represent a delay of user circuit implement in the PLD. The body-bias generator is configured to adjust the body bias of a transistor within the user circuit. The body-bias generator adjusts the body bias of the transistor in response to a level derived from the signal propagation delay of the delay circuit.
摘要翻译：可编程逻辑器件（PLD）包括延迟电路和体偏置发生器。延迟电路具有被配置为表示PLD中的用户电路实现的延迟的延迟。体偏置发生器被配置为调整用户电路内的晶体管的体偏置。体偏置发生器响应于从延迟电路的信号传播延迟导出的电平来调节晶体管的体偏置。

6. 发明授权

US07129745B2 Apparatus and methods for adjusting performance of integrated circuits 有权
公开(公告)号：US07129745B2
公开(公告)日：2006-10-31
申请号：US10865402
申请日：2004-06-10
申请人： David Lewis , Vaughn Betz , Irfan Rahim , Peter McElheny , Yow-Juang W. Liu , Bruce Pedersen
发明人： David Lewis , Vaughn Betz , Irfan Rahim , Peter McElheny , Yow-Juang W. Liu , Bruce Pedersen
IPC分类号： H03K19/173
CPC分类号： G06F17/5054 , H03K5/133 , H03K19/00369 , H03K2005/00058 , H03K2005/00156 , H03K2217/0018
摘要： A programmable logic device (PLD) includes a delay circuit and a body-bias generator. The delay circuit has a delay configured to represent a delay of user circuit implement in the PLD. The body-bias generator is configured to adjust the body bias of a transistor within the user circuit. The body-bias generator adjusts the body bias of the transistor in response to a level derived from the signal propagation delay of the delay circuit.

7. 发明申请

US20050258862A1 Apparatus and methods for adjusting performance of programmable logic devices 有权
标题翻译：用于调节可编程逻辑器件性能的装置和方法
公开(公告)号：US20050258862A1
公开(公告)日：2005-11-24
申请号：US10848953
申请日：2004-05-19
申请人： Irfan Rahim , Peter McElheny , Yow-Juang Liu , Bruce Pedersen
发明人： Irfan Rahim , Peter McElheny , Yow-Juang Liu , Bruce Pedersen
IPC分类号： G06F17/50 , H03K19/00 , H03K19/003 , H03K19/173
CPC分类号： H03K19/1731 , G06F17/5054 , H03K19/00369 , H03K2217/0018
摘要： A programmable logic device (PLD) includes mechanisms for adjusting or setting the body bias of one or more transistors. The PLD includes a body-bias generator. The body-bias generator is configured to set a body bias of one or more transistors within the programmable logic device. More specifically, the body-bias generator sets the body bias of the transistor(s) so as to trade off performance and power consumption of the transistor(s).
摘要翻译：可编程逻辑器件（PLD）包括用于调整或设置一个或多个晶体管的体偏置的机构。 PLD包括体偏置发生器。体偏置发生器被配置为设置可编程逻辑器件内的一个或多个晶体管的体偏置。更具体地，体偏置发生器设置晶体管的体偏置，以便折衷晶体管的性能和功耗。

8. 发明申请

US20050280437A1 Apparatus and methods for adjusting performance of integrated circuits 有权
标题翻译：用于调整集成电路性能的装置和方法
公开(公告)号：US20050280437A1
公开(公告)日：2005-12-22
申请号：US10865402
申请日：2004-06-10
申请人： David Lewis , Vaughn Betz , Irfan Rahim , Peter McElheny , Yow-Juang Liu , Bruce Pedersen
发明人： David Lewis , Vaughn Betz , Irfan Rahim , Peter McElheny , Yow-Juang Liu , Bruce Pedersen
IPC分类号： G06F17/50 , H03K5/00 , H03K5/13 , H03K19/00 , H03K19/003 , H03K19/173
CPC分类号： G06F17/5054 , H03K5/133 , H03K19/00369 , H03K2005/00058 , H03K2005/00156 , H03K2217/0018
摘要： A programmable logic device (PLD) includes a delay circuit and a body-bias generator. The delay circuit has a delay configured to represent a delay of user circuit implement in the PLD. The body-bias generator is configured to adjust the body bias of a transistor within the user circuit. The body-bias generator adjusts the body bias of the transistor in response to a level derived from the signal propagation delay of the delay circuit.
摘要翻译：可编程逻辑器件（PLD）包括延迟电路和体偏置发生器。延迟电路具有被配置为表示PLD中的用户电路实现的延迟的延迟。体偏置发生器被配置为调整用户电路内的晶体管的体偏置。体偏置发生器响应于从延迟电路的信号传播延迟导出的电平来调节晶体管的体偏置。

9. 发明申请

US20070069764A1 APPARATUS AND METHODS FOR ADJUSTING PERFORMANCE OF INTEGRATED CIRCUITS 有权
标题翻译：调整集成电路性能的装置和方法
公开(公告)号：US20070069764A1
公开(公告)日：2007-03-29
申请号：US11535065
申请日：2006-09-26
申请人： David Lewis , Vaughn Betz , Irfan Rahim , Peter McElheny , Yow-Juang Liu , Bruce Pedersen
发明人： David Lewis , Vaughn Betz , Irfan Rahim , Peter McElheny , Yow-Juang Liu , Bruce Pedersen
IPC分类号： H03K19/173
CPC分类号： G06F17/5054 , H03K5/133 , H03K19/00369 , H03K2005/00058 , H03K2005/00156 , H03K2217/0018
摘要： A programmable logic device (PLD) includes a delay circuit and a body-bias generator. The delay circuit has a delay configured to represent a delay of user circuit implement in the PLD. The body-bias generator is configured to adjust the body bias of a transistor within the user circuit. The body-bias generator adjusts the body bias of the transistor in response to a level derived from the signal propagation delay of the delay circuit.
摘要翻译：可编程逻辑器件（PLD）包括延迟电路和体偏置发生器。延迟电路具有被配置为表示PLD中的用户电路实现的延迟的延迟。体偏置发生器被配置为调整用户电路内的晶体管的体偏置。体偏置发生器响应于从延迟电路的信号传播延迟导出的电平来调节晶体管的体偏置。

10. 发明授权

US07170308B1 On-chip voltage regulator using feedback on process/product parameters 有权
标题翻译：片上电压调节器，使用过程/产品参数反馈
公开(公告)号：US07170308B1
公开(公告)日：2007-01-30
申请号：US10628711
申请日：2003-07-28
申请人： Irfan Rahim , Peter McElheny , John Costello
发明人： Irfan Rahim , Peter McElheny , John Costello
IPC分类号： G01R31/00 , G01R31/28 , G05F1/00
CPC分类号： G11C5/147 , H03K19/177
摘要： The present invention optimizes the performance of integrated circuits by adjusting the circuit operating voltage using feedback on process/product parameters. To determine a desired value for the operating voltage of an integrated circuit, a preferred embodiment provides for on-wafer probing of one or more reference circuit structures to measure at least one electrical or operational parameter of the one or more reference circuit structures; determining an adjusted value for the operating voltage based on the measured parameter; and establishing the adjusted value as the desired value for the operating voltage. The reference circuit structures may comprise process control monitor structures or structures in other integrated circuits fabricated in the same production run. In an alternative embodiment, the one or more parameters are directly measured from the integrated circuit whose operating voltage is being adjusted.
摘要翻译：本发明通过使用对过程/产品参数的反馈来调节电路工作电压来优化集成电路的性能。为了确定集成电路的工作电压的期望值，优选实施例提供一个或多个参考电路结构的片上探测，以测量一个或多个参考电路结构的至少一个电或操作参数; 基于所测量的参数确定所述工作电压的调整值; 并将调整后的值建立为工作电压的期望值。参考电路结构可以包括在相同生产运行中制造的其它集成电路中的过程控制监视器结构或结构。在替代实施例中，一个或多个参数是直接从其工作电压正被调整的集成电路测量的。

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