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1. 发明公开

EP0614089A3 Method and apparatus for in-situ testing of integrated circuit chips 失效
标题翻译：剪辑的与集成电路在原位测试方法和设备。
公开(公告)号：EP0614089A3
公开(公告)日：1995-07-12
申请号：EP94102896.1
申请日：1994-02-25
申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION
发明人： Bhatt, Anilkumar Ch. , Buda, Leo Raymond , Edwards, Robert Douglas , Hart, Paul Joseph , Ingraham, Anthony P. , Markovich, Voya Rista , Molla, Jaynal A. , Murphy, Richard Gerald , Saxenmeyer Jr. George J. , Walker, George F. , Whalen, Bette J. , Zarr, Richard S.
IPC分类号： G01R31/28 , H01L21/66 , G01R1/04
CPC分类号： H01L24/81 , G01R31/2886 , H01L22/20 , H01L24/75 , H01L2224/0401 , H01L2224/05557 , H01L2224/13111 , H01L2224/75 , H01L2224/81801 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01023 , H01L2924/01024 , H01L2924/01029 , H01L2924/01033 , H01L2924/0105 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/12042 , H01L2924/14 , H01L2924/3011 , H01L2924/00
摘要： A method of testing semiconductor chips is disclosed. The individual semiconductor chips have I/O, power, and ground contacts. In the method of the invention a chip carrier is provided. The chip carrier has contacts corresponding to the contacts on the semiconductor chip. The carrier contacts have dendritic surfaces. The chip contacts are brought into conductive contact with the conductor pads on the chip carrier. Test signal input vectors are applied to the inputs of the semiconductor chip, and output signal vectors are recovered from the semiconductor chip. After testing, the chip may be removed from the substrate. Alternatively, the chip may be bonded through the dendritic conductor pads to the substrate after successful testing.

2. 发明公开

EP0480154A3 Thermally stable photoimaging composition 失效
标题翻译：热稳定的光电组合物
公开(公告)号：EP0480154A3
公开(公告)日：1992-10-28
申请号：EP91114325.3
申请日：1991-08-27
申请人： International Business Machines Corporation
发明人： Markovich, Voya Rista , Mehta, Ashit Arvind , Skarvinko, Eugene Roman , Wang, David Wei
IPC分类号： G03F7/038 , G03F7/32
CPC分类号： G03F7/0047 , H05K3/287
摘要： A thermally stable photoimaging composition and a method of using the same, especially on circuit boards as a solder mask is provided. The composition includes a polymerizable resin or resin system, a cationic photoinitiator, a solvent, and an optically transparent ceramic filler. Preferably, the composition has a coefficient of thermal expansion of about 28-40 ppm/°C, which closely matches the coefficient of thermal expansion of the solder used on the circuit board components.
摘要翻译：提供了一种热稳定的光成像组合物及其使用方法，特别是在作为焊接掩模的电路板上。该组合物包括可聚合树脂或树脂体系，阳离子光引发剂，溶剂和光学透明陶瓷填料。优选地，组合物具有约28-40ppm /℃的热膨胀系数，其与用于电路板部件上的焊料的热膨胀系数近似匹配。

3. 发明公开

EP0469308A1 Multilayered circuit board assembly and method of making same 失效
标题翻译：印刷电路板具有高密度和它们的制备方法。
公开(公告)号：EP0469308A1
公开(公告)日：1992-02-05
申请号：EP91110864.5
申请日：1991-07-01
申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION
发明人： Chang, Chi Shih , Hoffarth, Joseph Gerard , Markovich, Voya Rista , Snyder, Keith Alan , Wiley, John Pennock
IPC分类号： H05K3/46 , H05K3/42 , H05K1/00
CPC分类号： H05K3/429 , H05K1/115 , H05K3/0032 , H05K3/4614 , H05K3/462 , H05K3/4623 , H05K2201/0352 , H05K2201/09518 , H05K2201/09536 , H05K2201/096 , H05K2201/09845 , H05K2203/061 , Y10T29/49126
摘要： A multilayered circuit board assembly which includes a plurality of layered subassemblies (20, 40, 60, 80) each having electrically conducting wiring (81, 89) and at least one through hole (35, 55, 65, 85) therein. A first of these subassemblies possesses a greater wiring density than the others while a second subassembly possesses a lesser resistance (and wiring density) than the others.
摘要翻译：一种多层电路板组件，其包括层状子组件的多个（20，40，60，80）每个都具有导电布线（81，89）和至少一个通孔（35，55，65，85）在其中。第一-的合成子组件具有比其它更大的布线密度，而第二子组件具有较小的电阻比其他（和布线密度）。

4. 发明公开

EP0446666A2 Solder interconnection structure on organic substrates and process for making 失效
标题翻译： Lötverbindungsstrukturauf organischen Substraten und Herstellungsverfahren。
公开(公告)号：EP0446666A2
公开(公告)日：1991-09-18
申请号：EP91102393.5
申请日：1991-02-20
申请人： International Business Machines Corporation
发明人： Hsiao, Richard , McCreary, Jack Marlyn , Markovich, Voya Rista , Seraphim, Donald Phillip
IPC分类号： H01L23/29 , H01L21/60 , H01L21/58 , H01L23/556
CPC分类号： H01L24/81 , H01L21/563 , H01L23/145 , H01L23/295 , H01L2224/13111 , H01L2224/16 , H01L2224/16225 , H01L2224/16227 , H01L2224/32225 , H01L2224/73203 , H01L2224/73204 , H01L2224/81801 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01019 , H01L2924/01023 , H01L2924/01029 , H01L2924/0103 , H01L2924/0105 , H01L2924/01082 , H01L2924/01092 , H01L2924/014 , H01L2924/10253 , H01L2924/12042 , H01L2924/12044 , H01L2924/14 , Y10T29/49144 , Y10T29/49146 , H01L2924/00
摘要： Solder interconnection whereby the gap created by solder connections between an organic substrate (2) and semiconductor device (1) is filled with a composition (7) obtained from curing a thermosetting preparation containing a thermosetting binder; and filler having a maximum particle size of 50 microns.
摘要翻译：焊接互连，由有机基板（2）和半导体器件（1）之间的焊料连接产生的间隙填充有由固化含有热固性粘合剂的热固性制剂获得的组合物（7）和最大粒度为50微米的填料。

6. 发明公开

EP1233663A2 Via fill compositions for direct attach of devices and methods for applying same 失效
标题翻译：组合物用于通过对它们的使用的设备和方法的直接附接孔中填充
公开(公告)号：EP1233663A2
公开(公告)日：2002-08-21
申请号：EP02009112.0
申请日：1994-10-28
申请人： International Business Machines Corporation
发明人： Arldt, Roy Lynn , Boyko, Christina Marie , Cayson, Burtan Joe , Kozlowski, Richard Michael , Kulesza, Joseph Duane , Lauffer, John Matthew , Liu, Philip Chihchau , Markovich, Voya Rista , Mahmoud, Issa Said , Muska, James Francis , Papathomas, Kostas , Sabia, Joseph Gene
IPC分类号： H05K3/40 , H05K1/16
CPC分类号： H05K1/113 , B32B7/04 , H01B1/22 , H01B1/24 , H01L2224/16235 , H05K1/095 , H05K1/16 , H05K1/167 , H05K3/0023 , H05K3/0047 , H05K3/0094 , H05K3/4053 , H05K3/4069 , H05K2201/0347 , H05K2201/09563 , H05K2201/10734 , H05K2203/0126 , H05K2203/0191 , H05K2203/0207 , H05K2203/0278 , H05K2203/0338 , H05K2203/0763 , Y10S428/901 , Y10T29/49099 , Y10T29/49144 , Y10T29/49155 , Y10T29/49165 , Y10T428/24273 , Y10T428/24331 , Y10T428/24339 , Y10T428/24826 , Y10T428/24917 , Y10T428/24926 , Y10T428/25
摘要： The present invention permits solder joints to be made directly to via and through holes without the solder being wicked into the vias or through holes, by filling plated through holes with a cycloaliphatic epoxy fill composition. When cured and overplated, the fill composition provides support for the solder joint and provides a flat solderable surface for the interconnection. In certain embodiments, the cured fill compositions, offer a further advantage of being conductive. The invention also relates to several novel methods for filling through holes with such fill compositions, and to resistors located in through holes and vias.
摘要翻译：本发明允许焊点（22）直接通过贯通孔（14），而不焊料为芯吸到通孔或通孔（14），通过用导电酚醛环氧树脂填充孔（14）充填镀制成组合物（16）。当固化时，用镀覆（18），所述填充组合物（16）提供支持，为焊点和提供了用于互连（22）的平坦焊接表面（18）。因此，本发明涉及若干新颖方法，用于通过孔（14），求补的组合物（16）填充，并位于通孔（14）和通孔的电阻。

7. 发明公开

EP0726698A2 Process for selective application of solder to circuit packages 失效
标题翻译：焊料的选择性应用的方法到所述电路板
公开(公告)号：EP0726698A2
公开(公告)日：1996-08-14
申请号：EP96100324.1
申请日：1996-01-11
申请人： International Business Machines Corporation
发明人： Carey, Charles Francis , Fallon, Kenneth Michael , Markovich, Voya Rista , Powell, Douglas Oliver , Vlasak, Gary Paul , Zarr, Richard Stuart
IPC分类号： H05K3/34 , H01L21/48
CPC分类号： H01L24/81 , C25D5/022 , C25D5/08 , H01L21/4825 , H01L21/4853 , H01L2224/11849 , H01L2224/119 , H01L2224/81193 , H01L2224/81801 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01019 , H01L2924/01024 , H01L2924/01029 , H01L2924/01033 , H01L2924/01042 , H01L2924/01047 , H01L2924/01049 , H01L2924/0105 , H01L2924/01074 , H01L2924/01079 , H01L2924/01082 , H01L2924/01087 , H01L2924/01327 , H01L2924/014 , H01L2924/09701 , H01L2924/14 , H01L2924/15787 , H01L2924/30105 , H01L2924/3841 , H05K3/241 , H05K3/3473 , H05K2203/043 , H05K2203/054 , H01L2924/00
摘要： Small, closely spaced deposits of solder materials may be formed with high volumetric accuracy and uniformity of shape by depositing a layer of conductive material (20) over surfaces of a dielectric layer (16) having apertures or recesses (e.g. blind apertures) and conductors and/or pads (14) exposed by those apertures or recesses, masking regions of the conductive material with a further patterned dielectric layer (30), electroplating solder materials (40) onto regions of the conductive material exposed by the mask, removing the mask (30) and portions of the conductive material (20) by selective etching and reflowing solder (40) away from at least a portion of the surfaces of the apertured dielectric layer (16). Uniformity of electroplating within blind apertures is enhanced by a combination of fluid jet sparging and cathode agitation. Excess conductor material in the resulting solder deposit can be avoided by replacing conductor material (20) with a constituent component of a solder material in an immersion bath prior to electroplating.

8. 发明公开

EP0664664A1 Depositing a conductive metal onto a substrate 失效
标题翻译： Abscheidung einesleitfähigenMetalls auf einem Substrat。
公开(公告)号：EP0664664A1
公开(公告)日：1995-07-26
申请号：EP94120167.5
申请日：1994-12-20
申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION
发明人： Jimarez, Lisa Jeanine , Lawrence, William Howell , Markovich, Voya Rista , Owen, Robert John , Sambucetti, Carlos J.
IPC分类号： H05K3/38 , C23C18/22
CPC分类号： H05K3/38 , C23C18/22 , H05K3/181 , H05K3/381 , H05K2203/1105 , H05K2203/1152
摘要： A method for depositing a conductive metal onto a dielectric substrate is provided. The method includes obtaining a metal sheet having a roughened surface that has the following parameters:
R a = 1.25 - 2.0 µm (0.05 - 0.08 mil),
R max = 5.0 - 13.75 µm (0.20 - 0.55 mil),
S m = 25 - 75 µm (1.00 - 3.00 mil),
R p = 5 - 8.75 µm (0.20 - 0.35 mil), and
surface area = 562.5 - 781.25 µm² (0.90 - 1.20 square mils) wherein Ra is the average roughness and the arithmetic mean of the departures from horizontal mean line profile; R max is the maximum peak-to-valley height;
S m is the mean spacing between high spots at the mean line; R p is the maximum profile height from the mean line;
and surface area is the area under the surface profile from each measurement using a Talysurf S-120 profilometer.
The sheet is laminated to the dielectric substrate surface by pressing the roughened surface of the metal sheet against the surface of the substrate and then removed from the substrate. The substrate surface is seeded to render it active for electroless plating thereon; and then a metal from an electroless plating bath is plated thereon. In another method, the dielectric substrate is seeded to render it active for electroless plating thereon. A metal is then plated thereon from an electroless plating bath. The plated metal is subjected to temperature of at least about 100°C for a time sufficient to increase the adhesion of the metal to the substrate.
摘要翻译：提供了一种在电介质基片上沉积导电金属的方法。该方法包括获得具有以下参数的具有粗糙表面的金属片：Ra =1.25-2.0μm（0.05-0.08密耳），Rmax = 5.0-13.75μm（0.20-0.55密耳），Sm = 25-75 （1.00-300密耳），Rp =5-8.75μm（0.20-0.35密耳），表面积=562.5-781.25μm2（0.90-1.20平方密耳）其中Ra是平均粗糙度，与水平平均线轮廓偏离的算术平均值; Rmax是最大峰谷高度; Sm是平均线上高点之间的平均间距; Rp是距平均线的最大轮廓高度; 并且表面积是使用Talysurf S-120轮廓仪从每次测量的表面轮廓下的面积。通过将金属板的粗糙表面压在基板的表面上，然后从基板上去除，将薄片层压到电介质基片表面上。将基材表面接种以使其活性以在其上进行无电镀; 然后将来自化学镀浴的金属镀在其上。在另一种方法中，将电介质基底接种以使其在其上进行无电镀。然后将金属从化学镀浴镀在其上。使电镀金属经受至少约100℃的温度足以增加金属与基底的粘附性的时间。

9. 发明公开

EP0653904A2 Via fill compositions for direct attach of devices and methods for applying same 失效
标题翻译：组合物用于经由用于装置和方法及其附件的直接附接孔填充。
公开(公告)号：EP0653904A2
公开(公告)日：1995-05-17
申请号：EP94117078.9
申请日：1994-10-28
申请人： International Business Machines Corporation
发明人： Arldt, Roy Lynn , Boyko, Christina Marie , Cayson, Burtran Joe , Kozlowski, Richard Michael , Kulesza, Joseph Duane , Lauffer, John Matthew , Liu, Philip Chihchau , Markovich, Voya Rista , Mahmoud, Issa Said , Muska, James Francis , Papathomas, Kostas , Sabia, Joseph Gene
IPC分类号： H05K3/40 , H05K1/09 , H01B1/20
CPC分类号： H05K1/113 , B32B7/04 , H01B1/22 , H01B1/24 , H01L2224/16235 , H05K1/095 , H05K1/16 , H05K1/167 , H05K3/0023 , H05K3/0047 , H05K3/0094 , H05K3/4053 , H05K3/4069 , H05K2201/0347 , H05K2201/09563 , H05K2201/10734 , H05K2203/0126 , H05K2203/0191 , H05K2203/0207 , H05K2203/0278 , H05K2203/0338 , H05K2203/0763 , Y10S428/901 , Y10T29/49099 , Y10T29/49144 , Y10T29/49155 , Y10T29/49165 , Y10T428/24273 , Y10T428/24331 , Y10T428/24339 , Y10T428/24826 , Y10T428/24917 , Y10T428/24926 , Y10T428/25
摘要： The present invention permits solder joints to be made directly to via and through holes without the solder being wicked into the vias or through holes, by filling plated through holes (14) with an epoxy or cyanate fill composition (16). When cured and overplated, the fill composition (16) provides support for the solder joint (22) and provides a flat solderable surface (18) for the inter-connection. In certain embodiments, the cured fill compositions, offer a further advantage of being conductive. The invention also relates to several novel methods for filling through holes with such fill compositions, and to resistors located in through holes and vias.
摘要翻译：本发明允许焊点直接作出的通孔和通孔，而不焊料为芯吸到通孔或通孔，通过与环氧树脂或氰酸孔中填充电镀来填充组合物。当固化时，用镀覆，所述填充物组合物提供了对焊点并提供用于连接间的平坦焊接表面。在某些实施方案中，固化的填充物组合物，提供的是导电的进一步的优点。因此，本发明涉及若干新颖方法，用于通过与寻求填充物组合物填充通孔，和设在通孔和通孔的电阻。

10. 发明公开

EP1233663A3 Via fill compositions for direct attach of devices and methods for applying same 失效
标题翻译：组合物用于通过用于它们的连接装置和方法的直接附接孔中填充
公开(公告)号：EP1233663A3
公开(公告)日：2002-08-28
申请号：EP02009112.0
申请日：1994-10-28
申请人： International Business Machines Corporation
发明人： Arldt, Roy Lynn , Boyko, Christina Marie , Cayson, Burtan Joe , Kozlowski, Richard Michael , Kulesza, Joseph Duane , Lauffer, John Matthew , Liu, Philip Chihchau , Markovich, Voya Rista , Mahmoud, Issa Said , Muska, James Francis , Papathomas, Kostas , Sabia, Joseph Gene
IPC分类号： H05K3/40 , H05K1/16
CPC分类号： H05K1/113 , B32B7/04 , H01B1/22 , H01B1/24 , H01L2224/16235 , H05K1/095 , H05K1/16 , H05K1/167 , H05K3/0023 , H05K3/0047 , H05K3/0094 , H05K3/4053 , H05K3/4069 , H05K2201/0347 , H05K2201/09563 , H05K2201/10734 , H05K2203/0126 , H05K2203/0191 , H05K2203/0207 , H05K2203/0278 , H05K2203/0338 , H05K2203/0763 , Y10S428/901 , Y10T29/49099 , Y10T29/49144 , Y10T29/49155 , Y10T29/49165 , Y10T428/24273 , Y10T428/24331 , Y10T428/24339 , Y10T428/24826 , Y10T428/24917 , Y10T428/24926 , Y10T428/25
摘要： The present invention permits solder joints (22) to be made directly to via and through holes (14) without the solder being wicked into the vias or through holes (14), by filling plated through holes (14) with a conductive novolac epoxy fill composition (16). When cured and overplated (18), the fill composition (16) provides support for the solder joint and provides a flat solderable surface (18) for the interconnection (22). The invention also relates to several novel methods for filling through holes (14) with such fill compositions (16), and to resistors located in through holes (14) and vias.
摘要翻译：本发明允许焊点（22）直接通过贯通孔（14），而不焊料为芯吸到通孔或通孔（14），通过用导电酚醛环氧树脂填充孔（14）充填镀制成组合物（16）。当固化时，用镀覆（18），所述填充组合物（16）提供支持，为焊点和提供了用于互连（22）的平坦焊接表面（18）。因此，本发明涉及若干新颖方法，用于通过孔（14），求补的组合物（16）填充，并位于通孔（14）和通孔的电阻。

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