专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US10114643B2 Techniques for detecting return-oriented programming 有权
公开(公告)号：US10114643B2
公开(公告)日：2018-10-30
申请号：US14129531
申请日：2013-05-23
申请人： INTEL CORPORATION
发明人： Koichi Yamada , Palanivelra Shanmugavelayutham , Arvind Krishnaswamy , Jason M. Agron , Jiwei Lu
IPC分类号： G06F9/30 , G06F21/54 , G06F12/08 , G06F12/0875
摘要： Various embodiments are generally directed to techniques to detect a return-oriented programming (ROP) attack by verifying target addresses of branch instructions during execution. An apparatus includes a processor component, and a comparison component for execution by the processor component to determine whether there is a matching valid target address for a target address of a branch instruction associated with a translated portion of a routine in a table comprising valid target addresses. Other embodiments are described and claimed.

2. 发明授权

US10061609B2 Method and system using exceptions for code specialization in a computer architecture that supports transactions 有权
公开(公告)号：US10061609B2
公开(公告)日：2018-08-28
申请号：US15339418
申请日：2016-10-31
申请人： Intel Corporation
发明人： Arvind Krishnaswamy , Daniel M. Lavery
IPC分类号： G06F9/30 , G06F9/46 , G06F8/36
CPC分类号： G06F9/467 , G06F8/36
摘要： A method and system uses exceptions for code specialization in a system that supports transactions. The method and system includes inserting one or more branchless instructions into a sequence of computer instructions. The branchless instructions include one or more instructions that are executable if a commonly occurring condition is satisfied and include one or more instructions that are configured to raise an exception if the commonly occurring condition is not satisfied.

3. 发明授权

US10055585B2 Hardware and software execution profiling 有权
公开(公告)号：US10055585B2
公开(公告)日：2018-08-21
申请号：US14129246
申请日：2013-08-28
申请人： INTEL CORPORATION
发明人： Greg William Dalcher , Ravi L. Sahita , Palanivelra Shanmugavelayutham , Koichi Yamada , Arvind Krishnaswamy
IPC分类号： G06F21/54 , G06F21/56 , G06F21/55
CPC分类号： G06F21/566 , G06F21/554
摘要： Technologies for assembling an execution profile of an event are disclosed. The technologies may include monitoring the event for a branch instruction, generating a callback to a security module upon execution of the branch instruction, filtering the callback according to a plurality of event identifiers, and validating a code segment associated with the branch instruction, the code segment including code executed before the branch instruction and code executed after the branch instruction.

4. 发明授权

US09880842B2 Using control flow data structures to direct and track instruction execution 有权
公开(公告)号：US09880842B2
公开(公告)日：2018-01-30
申请号：US13834049
申请日：2013-03-15
申请人： Intel Corporation
发明人： Jayaram Bobba , Ruchira Sasanka , Jeffrey J. Cook , Abhinav Das , Arvind Krishnaswamy , David J. Sager , Jason M. Agron
IPC分类号： G06F9/30 , G06F11/07 , G06F9/45 , G06F11/34
CPC分类号： G06F9/3005 , G06F8/433 , G06F11/0715 , G06F11/0721 , G06F11/076 , G06F11/3466
摘要： A mechanism for tracking the control flow of instructions in an application and performing one or more optimizations of a processing device, based on the control flow of the instructions in the application, is disclosed. Control flow data is generated to indicate the control flow of blocks of instructions in the application. The control flow data may include annotations that indicate whether optimizations may be performed for different blocks of instructions. The control flow data may also be used to track the execution of the instructions to determine whether an instruction in a block of instructions is assigned to a thread, a process, and/or an execution core of a processor, and to determine whether errors have occurred during the execution of the instructions.

5. 发明申请

US20170046165A1 METHOD AND SYSTEM USING EXCEPTIONS FOR CODE SPECIALIZATION IN A COMPUTER ARCHITECTURE THAT SUPPORTS TRANSACTIONS 审中-公开
标题翻译：在支持交易的计算机架构中使用代码专用化的方法和系统
公开(公告)号：US20170046165A1
公开(公告)日：2017-02-16
申请号：US15339418
申请日：2016-10-31
申请人： Intel Corporation
发明人： Arvind Krishnaswamy , Daniel M. Lavery
IPC分类号： G06F9/38 , G06F9/30 , G06F9/46
CPC分类号： G06F9/467 , G06F8/36
摘要： A method and system uses exceptions for code specialization in a system that supports transactions. The method and system includes inserting one or more branchless instructions into a sequence of computer instructions. The branchless instructions include one or more instructions that are executable if a commonly occurring condition is satisfied and include one or more instructions that are configured to raise an exception if the commonly occurring condition is not satisfied.
摘要翻译：方法和系统在支持事务的系统中使用异常代码专门化。该方法和系统包括将一个或多个无分支指令插入到计算机指令序列中。无分支指令包括一个或多个可执行的指令，如果共同发生的条件被满足并且包括一个或多个指令，其被配置为在不满足共同发生的条件时引发异常。

6. 发明授权

US09171159B2 Performing security operations using binary translation 有权
标题翻译：使用二进制翻译执行安全操作
公开(公告)号：US09171159B2
公开(公告)日：2015-10-27
申请号：US13997411
申请日：2013-02-28
申请人： Intel Corporation
发明人： Palanivelrajan R. Shanmugavelayutham , Koichi Yamada , Ravi Sahita , Arvind Krishnaswamy
IPC分类号： G06F21/62 , G06F21/56
CPC分类号： G06F21/566 , G06F21/54 , G06F21/56 , G06F21/567
摘要： In an embodiment, a processor includes a binary translation engine to receive a code segment, to generate a binary translation of the code segment, and to store the binary translation in a translation cache, where the binary translation includes at least one policy check routine to be executed during execution of the binary translation on behalf of a security agent. Other embodiments are described and claimed.
摘要翻译：在一个实施例中，处理器包括二进制翻译引擎，用于接收代码段，生成代码段的二进制翻译，以及将二进制翻译存储在翻译高速缓存中，其中二进制翻译包括至少一个策略检查程序在代表安全代理的二进制翻译执行期间执行。描述和要求保护其他实施例。

7. 发明授权

US09135435B2 Binary translator driven program state relocation 有权
标题翻译：二进制翻译器驱动程序状态迁移
公开(公告)号：US09135435B2
公开(公告)日：2015-09-15
申请号：US13766233
申请日：2013-02-13
申请人： Intel Corporation
发明人： Ashish Venkat , Arvind Krishnaswamy , Koichi Yamada , Palanivelrajan Rajan Shanmugavelayutham
IPC分类号： G06F21/00 , G06F21/52 , G06F21/79
CPC分类号： G06F21/52 , G06F21/79
摘要： This disclosure is directed to binary translator driven program state relocation. In general, a device may protect vulnerable program functions by setting them as non-executable. If an attempt is made to execute a protected program function, the program may trap to a binary translator in the device that may be configured to relocate program state from what has already been established (e.g., on a stack register). Program state may include resources (e.g., memory locations) used by the program during the course of execution. The binary translator may then translate the program into an executable form based on the relocated program state, and may be executed accordingly. Intruding code that attempts to overcome normal program execution and implement hostile operations (e.g., based the program state that is reflected in the stack register) will not function as intended since the relocated program state will cause unexpected results.
摘要翻译：本公开涉及二进制转换器驱动的程序状态重定位。通常，设备可以通过将其设置为不可执行来保护易受攻击的程序功能。如果尝试执行受保护的程序功能，程序可能陷入设备中的二进制翻译器，该二进制翻译器可被配置为将程序状态从已经建立的位置重新定位（例如，在堆栈寄存器上）。程序状态可以包括程序在执行过程中使用的资源（例如，存储器位置）。然后，二进制翻译器可以基于重新定位的程序状态将程序转换成可执行形式，并且可以相应地执行。尝试克服正常程序执行和实施敌对操作（例如，基于反映在堆栈寄存器中的程序状态）的入侵代码将不会按预期运行，因为重新定位的程序状态将导致意外的结果。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式