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1. 发明授权

US07091104B2 Shallow trench isolation 失效
公开(公告)号：US07091104B2
公开(公告)日：2006-08-15
申请号：US10351472
申请日：2003-01-23
申请人： Inki Kim , Sang Yeon Kim , Min Paek , Ch'ng Toh Ghee , Ramakrishnan Rajagopal , Chiew Gie Lee , Wan Gie Lee , Choong Shiau Chien , Charlie Tay , Chang Gi Lee , Hitomi Watanabe , Naoto Inoue
发明人： Inki Kim , Sang Yeon Kim , Min Paek , Ch'ng Toh Ghee , Ramakrishnan Rajagopal , Chiew Gie Lee , Wan Gie Lee , Choong Shiau Chien , Charlie Tay , Chang Gi Lee , Hitomi Watanabe , Naoto Inoue
IPC分类号： H01L21/76
CPC分类号： H01L21/823481 , H01L21/76232 , H01L21/823462
摘要： A method for forming an isolation structure on a semiconductor substrate includes opening a portion of a pad oxide layer overlying the substrate using a process gas including an etchant gas and a polymer-forming gas. A portion of the substrate exposed by the opening step is etched to form a trench having a first slope and a second slope. The first slope is greater than 45 degrees, and the second slope is less than 45 degrees. The trench is filled to form the isolation structure.

2. 发明授权

US07241665B2 Shallow trench isolation 失效
标题翻译：浅沟隔离
公开(公告)号：US07241665B2
公开(公告)日：2007-07-10
申请号：US11485838
申请日：2006-07-12
申请人： Inki Kim , Sang Yeon Kim , Min Paek , Ch'ng Toh Ghee , Ramakrishnan Rajagopal , Chiew Sin Ping , Wan Gie Lee , Choong Shiau Chien , Charlie Tay , Chang Gi Lee , Hitomi Watanabe , Naoto Inoue
发明人： Inki Kim , Sang Yeon Kim , Min Paek , Ch'ng Toh Ghee , Ramakrishnan Rajagopal , Chiew Sin Ping , Wan Gie Lee , Choong Shiau Chien , Charlie Tay , Chang Gi Lee , Hitomi Watanabe , Naoto Inoue
IPC分类号： H01L21/76
CPC分类号： H01L21/823481 , H01L21/76232 , H01L21/823462
摘要： A method for forming an isolation structure on a semiconductor substrate includes opening a portion of a pad oxide layer overlying the substrate using a process gas including an etchant gas and a polymer-forming gas. A portion of the substrate exposed by the opening step is etched to form a trench having a first slope and a second slope. The first slope is greater than 45 degrees, and the second slope is less than 45 degrees. The trench is filled to form the isolation structure.
摘要翻译：在半导体衬底上形成隔离结构的方法包括使用包括蚀刻剂气体和聚合物形成气体的工艺气体来打开覆盖衬底的衬垫氧化物层的一部分。通过开口步骤曝光的基板的一部分被蚀刻以形成具有第一斜率和第二斜率的沟槽。第一斜坡大于45度，第二坡度小于45度。填充沟槽以形成隔离结构。

3. 发明授权

US07259071B2 Semiconductor device with dual gate oxides 失效
标题翻译：具有双栅极氧化物的半导体器件
公开(公告)号：US07259071B2
公开(公告)日：2007-08-21
申请号：US10973852
申请日：2004-10-25
申请人： Inki Kim , Sang Yeon Kim , Min Paek , Chiew Sin Ping , Wan Gie Lee , Choong Shiau Chien , Zadig Lam , Hitomi Watanabe , Naoto Inoue
发明人： Inki Kim , Sang Yeon Kim , Min Paek , Chiew Sin Ping , Wan Gie Lee , Choong Shiau Chien , Zadig Lam , Hitomi Watanabe , Naoto Inoue
IPC分类号： H01L21/336 , H01L21/8234 , H01L21/3205 , H01L21/4763 , H01L21/44
CPC分类号： H01L21/823462 , H01L21/823481 , Y10S438/981
摘要： A method for making a semiconductor device having a first active region and a second active region includes providing first and second isolation structures defining the first active region on a substrate. The first active region uses a first operational voltage, and the second active region uses a second operational voltage that is different from the first voltage. A nitride layer overlying the first and second active regions is formed. An oxide layer overlying the nitride layer is formed. A first portion of the oxide layer overlying the first active region is removed to expose a first portion of the nitride layer. The exposed first portion of the nitride layer is removed using a wet etch method while leaving a second portion of the nitride layer that is overlying the second active region intact. Thereafter, a first gate oxide having a first thickness is formed on the first active region, the first gate oxide having a first edge facing the first isolation structure and a second edge facing the second isolation structure. The first edge is separated from the first isolation structure by a first distance. The second edge is separated from the second isolation structure by a second distance. Thereafter, a second gate oxide having a second thickness is formed on the second active region, the second thickness being different than the first thickness.
摘要翻译：制造具有第一有源区和第二有源区的半导体器件的方法包括提供在衬底上限定第一有源区的第一和第二隔离结构。第一有源区域使用第一工作电压，而第二有源区域使用不同于第一电压的第二工作电压。形成覆盖第一和第二有源区的氮化物层。形成覆盖氮化物层的氧化物层。去除覆盖在第一有源区上的氧化物层的第一部分以露出氮化物层的第一部分。使用湿蚀刻方法去除氮化物层的暴露的第一部分，同时留下覆盖第二有源区域的氮化物层的第二部分完好无损。此后，在第一有源区上形成具有第一厚度的第一栅极氧化物，第一栅极氧化物具有面对第一隔离结构的第一边缘和面向第二隔离结构的第二边缘。第一边缘与第一隔离结构隔开第一距离。第二边缘与第二隔离结构隔开第二距离。此后，在第二有源区上形成具有第二厚度的第二栅极氧化物，第二厚度不同于第一厚度。

4. 发明授权

US06818514B2 Semiconductor device with dual gate oxides 有权
标题翻译：具有双栅极氧化物的半导体器件
公开(公告)号：US06818514B2
公开(公告)日：2004-11-16
申请号：US10377167
申请日：2003-02-26
申请人： Inki Kim , Sang Yeon Kim , Min Paek , Chiew Sin Ping , Wan Gie Lee , Choong Shiau Chien , Zadig Lam , Hitomi Watanabe , Naoto Inoue
发明人： Inki Kim , Sang Yeon Kim , Min Paek , Chiew Sin Ping , Wan Gie Lee , Choong Shiau Chien , Zadig Lam , Hitomi Watanabe , Naoto Inoue
IPC分类号： H01L218234
CPC分类号： H01L21/823462 , H01L21/823481 , Y10S438/981
摘要： A method for making a semiconductor device having a first active region and a second active region includes providing first and second isolation structures defining the first active region on a substrate. The first active region uses a first operational voltage, and the second active region uses a second operational voltage that is different from the first voltage. A nitride layer overlying the first and second active regions is formed. An oxide layer overlying the nitride layer is formed. A first portion of the oxide layer overlying the first active region is removed to expose a first portion of the nitride layer. The exposed first portion of the nitride layer is removed using a wet etch method while leaving a second portion of the nitride layer that is overlying the second active region intact. Thereafter, a first gate oxide having a first thickness is formed on the first active region, the first gate oxide having a first edge facing the first isolation structure and a second edge facing the second isolation structure. The first edge is separated from the first isolation structure by a first distance. The second edge is separated from the second isolation structure by a second distance. Thereafter, a second gate oxide having a second thickness is formed on the second active region, the second thickness being different than the first thickness.
摘要翻译：制造具有第一有源区和第二有源区的半导体器件的方法包括提供在衬底上限定第一有源区的第一和第二隔离结构。第一有源区域使用第一工作电压，而第二有源区域使用不同于第一电压的第二工作电压。形成覆盖第一和第二有源区的氮化物层。形成覆盖氮化物层的氧化物层。去除覆盖在第一有源区上的氧化物层的第一部分以露出氮化物层的第一部分。使用湿蚀刻方法去除氮化物层的暴露的第一部分，同时留下覆盖第二有源区域的氮化物层的第二部分完好无损。此后，在第一有源区上形成具有第一厚度的第一栅极氧化物，第一栅极氧化物具有面对第一隔离结构的第一边缘和面向第二隔离结构的第二边缘。第一边缘与第一隔离结构隔开第一距离。第二边缘与第二隔离结构隔开第二距离。此后，在第二有源区上形成具有第二厚度的第二栅极氧化物，第二厚度不同于第一厚度。

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