专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明申请

US20070094420A1 System and method for validating chip configuration data 失效
标题翻译：验证芯片配置数据的系统和方法
公开(公告)号：US20070094420A1
公开(公告)日：2007-04-26
申请号：US11252533
申请日：2005-10-18
申请人： Ingemar Holm , Ralph Koester , John Liberty , Mack Riley
发明人： Ingemar Holm , Ralph Koester , John Liberty , Mack Riley
IPC分类号： G06F3/00
CPC分类号： G06F21/71
摘要： A system and method for verifying configuration data for configuring a microprocessor or system-on-a-chip (SoC) are provided. With the system and method, during initialization, configuration data is shifted into the microprocessor or SoC through a configuration input. The configuration data is shifted to all of the on-chip processor units to provide initial settings for configuration latches in the design. While the configuration data is being shifted to the on-chip processor units, a copy of the configuration data is also stored in a local storage of a test control unit. A private interface is provided between the test control unit and the processor units. Via the private interface, a processor unit receives the current configuration data for the processor units. The current configuration data is compared against the original configuration data stored in the test control unit to verify the current configuration of the processor units.
摘要翻译：提供了一种用于验证用于配置微处理器或片上系统（SoC）的配置数据的系统和方法。利用系统和方法，在初始化期间，配置数据通过配置输入移入微处理器或SoC。配置数据转移到所有片上处理器单元，以便为设计中的配置锁存器提供初始设置。当配置数据被转移到片上处理器单元时，配置数据的副本也存储在测试控制单元的本地存储器中。在测试控制单元和处理器单元之间提供专用接口。通过专用接口，处理器单元接收处理器单元的当前配置数据。将当前配置数据与存储在测试控制单元中的原始配置数据进行比较，以验证处理器单元的当前配置。

2. 发明申请

US20060080583A1 Store scan data in trace arrays for on-board software access 审中-公开
标题翻译：将扫描数据存储在跟踪阵列中以进行板载软件访问
公开(公告)号：US20060080583A1
公开(公告)日：2006-04-13
申请号：US10960612
申请日：2004-10-07
申请人： John Liberty , Mack Riley , John Spannaus
发明人： John Liberty , Mack Riley , John Spannaus
IPC分类号： G01R31/28
CPC分类号： G01R31/318569 , G01R31/2815
摘要： In the present invention, register values are obtained by scanning, and are then written to one or more trace arrays on the chip. The scan data in the trace arrays is then read out by software. The register scan data can be recirculated among the registers, and addition scans can then be performed and written to the one or more trace arrays.
摘要翻译：在本发明中，通过扫描获得寄存器值，然后将其写入芯片上的一个或多个迹线阵列。然后通过软件读取跟踪数组中的扫描数据。寄存器扫描数据可以在寄存器之间循环，然后可以执行相加扫描并将其写入一个或多个跟踪数组。

3. 发明申请

US20060220753A1 Oscillator array with row and column control 有权
标题翻译：具有行和列控制的振荡器阵列
公开(公告)号：US20060220753A1
公开(公告)日：2006-10-05
申请号：US11095895
申请日：2005-03-31
申请人： David Boerstler , Eskinder Hailu , Harm Hofstee , John Liberty
发明人： David Boerstler , Eskinder Hailu , Harm Hofstee , John Liberty
IPC分类号： H03K3/03
CPC分类号： G06F7/588 , H03K3/0315 , H03K3/84
摘要： A circuit topology which can be used to create an array of individually tuned oscillators operating at different frequencies determined by common control inputs and an easily managed variation in design dimensions of several components is provided. An array of oscillators are provided arranged in columns and rows. Each oscillator in a column is unique from the other oscillators in the column based on number of stages in the oscillator and fanout so that each oscillator will operate at a unique frequency. Oscillators of different columns within the array may differ by a common setting of the selects to these oscillators and the physical ordering of the oscillators in the column to further reduce the possibility of injection locking. A base delay cell provides selects to each column of oscillators such that each column may be programmed to operate at a different frequency from its neighbors.
摘要翻译：提供了一种电路拓扑结构，可用于创建由通用控制输入确定的不同频率运行的单独调谐的振荡器阵列，以及易于管理的多个组件的设计尺寸变化。提供了一列列和列排列的振荡器阵列。列中的每个振荡器都基于列中的其他振荡器是独特的，基于振荡器和扇出的级数，使得每个振荡器将以唯一的频率工作。阵列中不同列的振荡器可能会通过对这些振荡器的选择的共同设置以及列中的振荡器的物理顺序而不同，以进一步降低注入锁定的可能性。基本延迟单元为每列振荡器提供选择，使得每列可被编程为以与其邻居不同的频率工作。

4. 发明申请

US20070043926A1 System and method for limiting the size of a local storage of a processor 失效
标题翻译：用于限制处理器的本地存储器的大小的系统和方法
公开(公告)号：US20070043926A1
公开(公告)日：2007-02-22
申请号：US11208376
申请日：2005-08-19
申请人： Adam Burns , Michael Day , Brian Flachs , H. Hofstee , Charles Johns , John Liberty
发明人： Adam Burns , Michael Day , Brian Flachs , H. Hofstee , Charles Johns , John Liberty
IPC分类号： G06F12/00
CPC分类号： G06F12/0661 , G06F12/0223
摘要： A system and method for limiting the size of a local storage of a processor are provided. A facility is provided in association with a processor for setting a local storage size limit. This facility is a privileged facility and can only be accessed by the operating system running on a control processor in the multiprocessor system or the associated processor itself. The operating system sets the value stored in the local storage limit register when the operating system initializes a context switch in the processor. When the processor accesses the local storage using a request address, the local storage address corresponding to the request address is compared against the local storage limit size value in order to determine if the local storage address, or a modulo of the local storage address, is used to access the local storage.
摘要翻译：提供了用于限制处理器的本地存储器的大小的系统和方法。与用于设置本地存储大小限制的处理器相关联地提供设施。该设施是一种特权设施，只能由在多处理器系统或相关处理器本身的控制处理器上运行的操作系统访问。当操作系统初始化处理器中的上下文切换时，操作系统设置存储在本地存储限制寄存器中的值。当处理器使用请求地址访问本地存储器时，将与请求地址相对应的本地存储地址与本地存储限制大小值进行比较，以便确定本地存储地址或本地存储地址的模数是否为用于访问本地存储。

5. 发明授权

US5432865A Method and apparatus for generating a plurality of parameters of an object in a field of view 失效
公开(公告)号：US5432865A
公开(公告)日：1995-07-11
申请号：US822190
申请日：1992-02-18
申请人： Harvey L. Kasdan , John Liberty
发明人： Harvey L. Kasdan , John Liberty
IPC分类号： G06T7/00 , G06K9/00
CPC分类号： G06T7/00
摘要： A method and an apparatus for generating a plurality of parameters of an object in a field of view is disclosed. An electrical image of the field of view is formed. The electrical image is processed to form a plurality of different representations of the electrical image where each different representation is a representation of a different parameter of the field of view. The positional information, which represents the boundary of the object, is generated. In response to the positional information that represents the boundary of the object being generated, corresponding locations in each of the different representations is traced. The different parameters from each of the different represents are calculated as the locations are traced in each of the different representations.

6. 发明申请

US20070040620A1 Method of functionality testing for a ring oscillator 失效
标题翻译：环形振荡器的功能测试方法
公开(公告)号：US20070040620A1
公开(公告)日：2007-02-22
申请号：US11204408
申请日：2005-08-16
申请人： David Boerstler , Eskinder Hailu , Harm Hofstee , John Liberty
发明人： David Boerstler , Eskinder Hailu , Harm Hofstee , John Liberty
IPC分类号： H03K3/03
CPC分类号： H03K3/0315 , H03K5/133
摘要： A method and apparatus is provided for testing the logic functionality and electrical continuity of a ring oscillator comprising an odd number of inverters connected to form a closed loop. In the method and apparatus, a known value is forced through the ring oscillator, to test the complete circuit path thereof. Thus, a low overhead deterministic test of the functionality of the ring oscillator is provided. In a useful embodiment of the invention, a method is provided for testing functionality and electrical continuity in a ring oscillator, wherein a first test device is inserted between the input of a first inverter and the output of an adjacent second inverter. The first test device is then operated to apply first and second test bits as input test signals to the first inverter input. The embodiment further comprises detecting the response to the applied first and second test bit signals at the output of the second inverter, and using the detected responses in providing an evaluation of functionality of the ring oscillator.
摘要翻译：提供了一种用于测试环形振荡器的逻辑功能和电连续性的方法和装置，该环形振荡器包括连接形成闭环的奇数个反相器。在该方法和装置中，通过环形振荡器强制已知的值，以测试其完整的电路路径。因此，提供了环形振荡器的功能的低开销确定性测试。在本发明的有用实施例中，提供了一种用于测试环形振荡器中的功能和电连续性的方法，其中第一测试装置插入在第一反相器的输入端和相邻的第二反相器的输出之间。然后操作第一测试装置以将第一和第二测试位作为输入测试信号施加到第一反相器输入。该实施例还包括检测在第二反相器的输出处对所施加的第一和第二测试位信号的响应，并且使用检测到的响应来提供环形振荡器的功能性的评估。

7. 发明申请

US20060005083A1 Performance count tracing 审中-公开
标题翻译：性能计数跟踪
公开(公告)号：US20060005083A1
公开(公告)日：2006-01-05
申请号：US10881971
申请日：2004-06-30
申请人： Michael Genden , John Liberty , John Spannaus
发明人： Michael Genden , John Liberty , John Spannaus
IPC分类号： G06F11/00
CPC分类号： G06F11/3466 , G06F11/3409 , G06F11/3476 , G06F2201/865 , G06F2201/88
摘要： The present invention provides for the hardware on-chip capturing and storage of performance count data about software programs running on the chip. Counters generate performance data about the programs, and the values of the counters are stored in a trace array. In an embodiment, instruction addresses and other data can be written along with the performance count data. In an embodiment, the data can be may be buffered and streamed to an external memory or device. In an embodiment, interval counters control the writing of the performance count data to the trace array.
摘要翻译：本发明提供硬件片上捕获和存储关于在芯片上运行的软件程序的性能计数数据。计数器生成有关程序的性能数据，计数器的值存储在跟踪数组中。在一个实施例中，可以与性能计数数据一起写入指令地址和其他数据。在一个实施例中，可以将数据缓冲并流式传输到外部存储器或设备。在一个实施例中，间隔计数器控制将性能计数数据写入跟踪阵列。

8. 发明申请

US20050021944A1 Security architecture for system on chip 有权
标题翻译：片上系统的安全架构
公开(公告)号：US20050021944A1
公开(公告)日：2005-01-27
申请号：US10601374
申请日：2003-06-23
申请人： David Craft , Michael Day , Harm Hofstee , Charles Johns , John Liberty
发明人： David Craft , Michael Day , Harm Hofstee , Charles Johns , John Liberty
IPC分类号： G06F12/14 , G06F21/22 , G06F21/24 , G09C1/00 , H04L9/08 , H04L9/00
CPC分类号： G06F21/53 , H04L9/3226 , H04L2209/56
摘要： The present invention provides for authenticating code and/or data and providing a protected environment for execution. The present invention provides for dynamically partitioning and un-partitioning a local store for the authentication of code or data. The local store is partitioned into an isolated and non-isolated section. Code or data is loaded into the isolated section. The code or data is authenticated in the isolated section of the local store. After authentication, the code is executed. After execution, the memory within the isolated region of the attached processor unit is erased, and the attached processor unit de-partitions the isolated section within the local store.
摘要翻译：本发明提供了验证代码和/或数据并提供受保护的环境以供执行。本发明提供了用于对代码或数据的认证的动态分区和分区本地存储。本地商店被划分成一个隔离和非隔离的部分。代码或数据被加载到隔离的部分。代码或数据在本地存储的隔离部分进行身份验证。认证后，执行代码。在执行之后，附着的处理器单元的隔离区域内的存储器被擦除，并且附加的处理器单元对本地存储器内的隔离部分进行分区。

9. 发明授权

US5121436A Method and apparatus for generating a plurality of parameters of an object in a field of view 失效
标题翻译：用于在视场中生成对象的多个参数的方法和装置
公开(公告)号：US5121436A
公开(公告)日：1992-06-09
申请号：US350400
申请日：1989-05-11
申请人： Harvey L. Kasdan , John Liberty
发明人： Harvey L. Kasdan , John Liberty
IPC分类号： G06T7/00
CPC分类号： G06T7/00
摘要： A method and an apparatus for generating a plurality of parameters of an object in a field of view is disclosed. An electrical image of the field of view is formed. The electrical image is processed to form a plurality of different representations of the electrical image where each different representation is a representation of a different parameter of the field of view. The positional information, which represents the boundary of the object, is generated. In response to the positional information that represents the boundary of the object being generated, corresponding locations in each of the different representations is traced. The different parameters from each of the different represents are calculated as the locations are traced in each of the different representations.
摘要翻译：公开了一种用于在视野中生成对象的多个参数的方法和装置。形成视野的电子图像。电图像被处理以形成电图像的多个不同表示，其中每个不同的表示是视场的不同参数的表示。生成表示对象边界的位置信息。响应于表示正在生成的对象的边界的位置信息，跟踪每个不同表示中的相应位置。每个不同表示中的不同参数被计算为在每个不同表示中跟踪位置。

10. 发明授权

US07730279B2 System for limiting the size of a local storage of a processor 失效
标题翻译：用于限制处理器的本地存储器的大小的系统
公开(公告)号：US07730279B2
公开(公告)日：2010-06-01
申请号：US12429676
申请日：2009-04-24
申请人： Adam P. Burns , Michael N. Day , Brian Flachs , H. Peter Hofstee , Charles R. Johns , John Liberty
发明人： Adam P. Burns , Michael N. Day , Brian Flachs , H. Peter Hofstee , Charles R. Johns , John Liberty
IPC分类号： G06F12/00
CPC分类号： G06F12/0661 , G06F12/0223
摘要： A system for limiting the size of a local storage of a processor is provided. A facility is provided in association with a processor for setting a local storage size limit. This facility is a privileged facility and can only be accessed by the operating system running on a control processor in the multiprocessor system or the associated processor itself. The operating system sets the value stored in the local storage limit register when the operating system initializes a context switch in the processor. When the processor accesses the local storage using a request address, the local storage address corresponding to the request address is compared against the local storage limit size value in order to determine if the local storage address, or a modulo of the local storage address, is used to access the local storage.
摘要翻译：提供了用于限制处理器的本地存储器的大小的系统。与用于设置本地存储大小限制的处理器相关联地提供设施。该设施是一种特权设施，只能由在多处理器系统或相关处理器本身的控制处理器上运行的操作系统访问。当操作系统初始化处理器中的上下文切换时，操作系统设置存储在本地存储限制寄存器中的值。当处理器使用请求地址访问本地存储器时，将与请求地址相对应的本地存储地址与本地存储限制大小值进行比较，以便确定本地存储地址或本地存储地址的模数是否为用于访问本地存储。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式