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1. 发明申请

US20110022767A1 DMA CONTROLLER WITH INTERRUPT CONTROL PROCESSOR 审中-公开
标题翻译：具有中断控制处理器的DMA控制器
公开(公告)号：US20110022767A1
公开(公告)日：2011-01-27
申请号：US12843801
申请日：2010-07-26
申请人： Ik Jae CHUN , Chun Gi Lyuh , Jung Hee Suk , Tae Moon Roh , Jong Kee Kwon , Jong Dae Kim
发明人： Ik Jae CHUN , Chun Gi Lyuh , Jung Hee Suk , Tae Moon Roh , Jong Kee Kwon , Jong Dae Kim
IPC分类号： G06F13/28 , G06F13/24
CPC分类号： G06F13/32
摘要： Provided is a direct memory access (DMA) controller having an interrupt control processor that can process DMA transmission-related interrupts according to a control program modifiable by a user. The DMA controller includes the interrupt control processor that can process a DMA transmission-related interrupt and a DMA request interrupt transmitted from peripheral devices and control the DMA channel through the control program that can be modified by the user, so that DMA channel control and relevant interrupt processing loads caused by a plurality of DMA data transmissions are reduced, and the flexibility of DMA channel control and interrupt processing in control of the DMA controller is provided to the user.
摘要翻译：提供了具有中断控制处理器的直接存储器访问（DMA）控制器，其可以根据用户可修改的控制程序来处理与DMA传输相关的中断。 DMA控制器包括可处理DMA传输相关中断的中断控制处理器和从外围设备发送的DMA请求中断，并通过可由用户修改的控制程序控制DMA通道，从而使DMA通道控制和相关减少由多个DMA数据传输引起的中断处理负载，并且向用户提供DMA控制的DMA通道控制和中断处理的灵活性。

2. 发明授权

US08407276B2 Apparatus for calculating absolute difference 有权
标题翻译：用于计算绝对差的装置
公开(公告)号：US08407276B2
公开(公告)日：2013-03-26
申请号：US12843550
申请日：2010-07-26
申请人： Chun Gi Lyuh , Ik Jae Chun , Jung Hee Suk , Tae Moon Roh , Jong Kee Kwon , Jong Dae Kim
发明人： Chun Gi Lyuh , Ik Jae Chun , Jung Hee Suk , Tae Moon Roh , Jong Kee Kwon , Jong Dae Kim
IPC分类号： G06F7/50
CPC分类号： G06F7/544
摘要： Provided is an apparatus for calculating an absolute difference capable of efficiently performing an absolute difference using an adder. The apparatus for calculating an absolute difference includes a comparator comparing values of two integers, first and second selectors each selecting and outputting one of the two integers according to the comparison results of the comparator, an inverter complementing the result value selected by the second selector; and an adder adding up the result value selected by the first selector, the value complemented by the inverter, and 1.
摘要翻译：提供了一种用于计算能够使用加法器有效地执行绝对差的绝对差的装置。用于计算绝对差的装置包括比较器，比较器比较两个整数的值，第一和第二选择器，每个选择器根据比较器的比较结果选择和输出两个整数中的一个;逆变器，补偿由第二选择器选择的结果值; 和加法器将由第一选择器选择的结果值相加，由逆变器补充的值，以及1。

3. 发明申请

US20110142345A1 APPARATUS AND METHOD FOR RECOGNIZING IMAGE 审中-公开
标题翻译：用于识别图像的装置和方法
公开(公告)号：US20110142345A1
公开(公告)日：2011-06-16
申请号：US12783180
申请日：2010-05-19
申请人： Sang Hun Yoon , Ik Jae Chun , Chun Gi Lyuh , Jung Hee Suk , Tae Moon Roh , Jong Kee Kwon , Jong Dae Kim
发明人： Sang Hun Yoon , Ik Jae Chun , Chun Gi Lyuh , Jung Hee Suk , Tae Moon Roh , Jong Kee Kwon , Jong Dae Kim
IPC分类号： G06K9/46
CPC分类号： G06K9/4614
摘要： Provided are an apparatus and method for recognizing an image. In the apparatus and method for recognizing an image, various features can be extracted by a Haar-like filter using 1st to nth order gradients of the x- and y-axis of an input image, and the input image is correctly classified as a true or false image using, in stages, the extracted features of the input image, multiple threshold values for a true image and multiple threshold values for a false image. Accordingly, the apparatus and method achieve a high recognition rate by performing a small amount of computation. Consequently, it is possible to rapidly and correctly recognize an image, enabling real-time image recognition.
摘要翻译：提供了一种用于识别图像的装置和方法。在用于识别图像的装置和方法中，可以通过输入图像的x轴和y轴的第1至n阶梯度的Haar样滤波器提取各种特征，并且输入图像被正确地分类为真或分别使用输入图像的提取特征，用于真实图像的多个阈值和用于假图像的多个阈值的假图像。因此，该装置和方法通过执行少量的计算来实现高识别率。因此，可以快速且正确地识别图像，从而实现图像识别。

4. 发明申请

US20110022647A1 APPARATUS FOR CALCULATING ABSOLUTE DIFFERENCE 有权
标题翻译：计算绝对差异的装置
公开(公告)号：US20110022647A1
公开(公告)日：2011-01-27
申请号：US12843550
申请日：2010-07-26
申请人： Chun Gi LYUH , Ik Jae Chun , Jung Hee Suk , Tae Moon Roh , Jong Kee Kwon , Jong Dae Kim
发明人： Chun Gi LYUH , Ik Jae Chun , Jung Hee Suk , Tae Moon Roh , Jong Kee Kwon , Jong Dae Kim
IPC分类号： G06F7/485
CPC分类号： G06F7/544
摘要： Provided is an apparatus for calculating an absolute difference capable of efficiently performing an absolute difference using an adder. The apparatus for calculating an absolute difference includes a comparator comparing values of two integers, first and second selectors each selecting and outputting one of the two integers according to the comparison results of the comparator, an inverter complementing the result value selected by the second selector; and an adder adding up the result value selected by the first selector, the value complemented by the inverter, and 1.
摘要翻译：提供了一种用于计算能够使用加法器有效地执行绝对差的绝对差的装置。用于计算绝对差的装置包括比较器，比较器比较两个整数的值，第一和第二选择器，每个选择器根据比较器的比较结果选择和输出两个整数中的一个;逆变器，补偿由第二选择器选择的结果值; 和加法器将由第一选择器选择的结果值相加，由逆变器补充的值，以及1。

5. 发明申请

US20110145549A1 PIPELINED DECODING APPARATUS AND METHOD BASED ON PARALLEL PROCESSING 审中-公开
标题翻译：基于并行处理的管道解码设备和方法
公开(公告)号：US20110145549A1
公开(公告)日：2011-06-16
申请号：US12862565
申请日：2010-08-24
申请人： Jung Hee SUK , Chun Gi Lyuh , Ik Jae Chun , Se Wan Heo , Soon II Yeo , Tae Moon Roh , Jong Kee Kwon , Jong Dae Kim
发明人： Jung Hee SUK , Chun Gi Lyuh , Ik Jae Chun , Se Wan Heo , Soon II Yeo , Tae Moon Roh , Jong Kee Kwon , Jong Dae Kim
IPC分类号： G06F9/30 , G06F9/38
CPC分类号： H04N19/436 , H04N19/44
摘要： An apparatus and method for decoding moving images based on parallel processing are provided. The apparatus for decoding images based on parallel processing can improve operational performance by pipelining massive-data transmission between processors while performing context-adaptive variable length decoding (CAVLD), inverse quantization (IQ), inverse transformation (IT), motion compensation (MC), intra prediction (IP) and deblocking filter (DF) operations in parallel in units of pluralities of macroblocks (MBs).
摘要翻译：提供了一种基于并行处理来解码运动图像的装置和方法。用于基于并行处理的图像解码装置可以通过在执行上下文自适应可变长度解码（CAVLD），逆量化（IQ），逆变换（IT），运动补偿（MC））之间流水线处理大规模数据传输来提高操作性能，，帧内预测（IP）和去块滤波器（DF）操作以多个宏块（MB）为单位并行。

6. 发明申请

US20110153878A1 MEMORY SYSTEM AND INTEGRATED MANAGEMENT METHOD FOR PLURALITY OF DMA CHANNELS 有权
标题翻译：用于DMA通道多重的存储系统和集成管理方法
公开(公告)号：US20110153878A1
公开(公告)日：2011-06-23
申请号：US12882141
申请日：2010-09-14
申请人： Ik Jae CHUN , Chun Gi Lyuh , Se Wan Heo , Sang Hun Yoon , Tae Moon Roh , Jong Kee Kwon , Jong Dae Kim
发明人： Ik Jae CHUN , Chun Gi Lyuh , Se Wan Heo , Sang Hun Yoon , Tae Moon Roh , Jong Kee Kwon , Jong Dae Kim
IPC分类号： G06F13/28
CPC分类号： G06F13/28
摘要： Provided are a memory system and an integrated management method for a plurality of direct memory access (DMA) channels. The memory system includes a memory controller exchanging data with a memory and having a plurality of channels physically separated from each other, and a DMA controller having a plurality of DMA channels physically separated from each other and in contact with the plurality of channels of the memory controller, and exchanging data with the memory via the plurality of DMA channels and the memory controller.
摘要翻译：提供了用于多个直接存储器访问（DMA）通道的存储器系统和集成管理方法。存储器系统包括存储器控制器，其与存储器交换数据并且具有物理上彼此分离的多个通道;以及DMA控制器，其具有彼此物理上彼此分离并与存储器的多个通道接触的多个DMA通道控制器，并且经由多个DMA通道和存储器控制器与存储器交换数据。

7. 发明申请

US20120226831A1 MEMORY SYSTEM AND INTEGRATED MANAGEMENT METHOD FOR PLURALITY OF DMA CHANNELS 审中-公开
标题翻译：用于DMA通道多重的存储系统和集成管理方法
公开(公告)号：US20120226831A1
公开(公告)日：2012-09-06
申请号：US13471236
申请日：2012-05-14
申请人： Ik Jae CHUN , Chun Gi Lyuh , Se Wan Heo , Sang Hun Yoon , Tae Moon Roh , Jong Kee Kwon , Jong Dae Kim
发明人： Ik Jae CHUN , Chun Gi Lyuh , Se Wan Heo , Sang Hun Yoon , Tae Moon Roh , Jong Kee Kwon , Jong Dae Kim
IPC分类号： G06F13/28
CPC分类号： G06F13/28
摘要： Provided are a memory system and an integrated management method for a plurality of direct memory access (DMA) channels. The memory system includes a memory controller exchanging data with a memory and having a plurality of channels physically separated from each other, and a DMA controller having a plurality of DMA channels physically separated from each other and in contact with the plurality of channels of the memory controller, and exchanging data with the memory via the plurality of DMA channels and the memory controller.
摘要翻译：提供了用于多个直接存储器访问（DMA）通道的存储器系统和集成管理方法。存储器系统包括存储器控制器，其与存储器交换数据并且具有物理上彼此分离的多个通道;以及DMA控制器，其具有彼此物理上彼此分离并与存储器的多个通道接触的多个DMA通道控制器，并且经由多个DMA通道和存储器控制器与存储器交换数据。

8. 发明授权

US08205021B2 Memory system and integrated management method for plurality of DMA channels 有权
标题翻译：用于多个DMA通道的存储系统和集成管理方法
公开(公告)号：US08205021B2
公开(公告)日：2012-06-19
申请号：US12882141
申请日：2010-09-14
申请人： Ik Jae Chun , Chun Gi Lyuh , Se Wan Heo , Sang Hun Yoon , Tae Moon Roh , Jong Kee Kwon , Jong Dae Kim
发明人： Ik Jae Chun , Chun Gi Lyuh , Se Wan Heo , Sang Hun Yoon , Tae Moon Roh , Jong Kee Kwon , Jong Dae Kim
IPC分类号： G06F13/28
CPC分类号： G06F13/28
摘要： Provided are a memory system and an integrated management method for a plurality of direct memory access (DMA) channels. The memory system includes a memory controller exchanging data with a memory and having a plurality of channels physically separated from each other, and a DMA controller having a plurality of DMA channels physically separated from each other and in contact with the plurality of channels of the memory controller, and exchanging data with the memory via the plurality of DMA channels and the memory controller.
摘要翻译：提供了用于多个直接存储器访问（DMA）通道的存储器系统和集成管理方法。存储器系统包括存储器控制器，其与存储器交换数据并且具有物理上彼此分离的多个通道;以及DMA控制器，其具有彼此物理上彼此分离并与存储器的多个通道接触的多个DMA通道控制器，并且经由多个DMA通道和存储器控制器与存储器交换数据。

9. 发明授权

US07180358B2 CMOS exponential function generating circuit with temperature compensation technique 失效
标题翻译：具有温度补偿技术的CMOS指数函数发生电路
公开(公告)号：US07180358B2
公开(公告)日：2007-02-20
申请号：US11004432
申请日：2004-12-03
申请人： Jong Kee Kwon , Mun Yang Park , Jong Dae Kim , Won Chul Song
发明人： Jong Kee Kwon , Mun Yang Park , Jong Dae Kim , Won Chul Song
IPC分类号： G06G7/20
CPC分类号： H03F3/45928 , H03F3/45179 , H03F3/45475 , H03F2203/45212 , H03F2203/45482 , H03F2203/45484 , H03F2203/45508 , H03G7/001
摘要： Provided is a CMOS exponential function generating circuit capable of compensating for the exponential function characteristic according to temperature variations. The exponential function generating circuit includes an voltage scaler scaling the value of an external gain control voltage signal, an exponential function generating unit generating exponential function current and voltage in response to a signal output from the voltage scaler, a reference voltage generator providing a reference voltage to the exponential function generating unit, and a temperature compensator compensating for the exponential function characteristic according to temperature variations.
摘要翻译：提供了能够根据温度变化补偿指数函数特性的CMOS指数函数发生电路。指数函数发生电路包括缩放外部增益控制电压信号的值的电压缩放器，响应于从电压调节器输出的信号产生指数函数电流和电压的指数函数产生单元，提供参考电压的参考电压发生器到指数函数产生单元，以及根据温度变化补偿指数函数特性的温度补偿器。

10. 发明授权

US08274269B2 Switching circuit and small-size high-efficiency DC-DC converter for portable devices including the same 失效
标题翻译：用于便携式设备的开关电路和小型高效率DC-DC转换器
公开(公告)号：US08274269B2
公开(公告)日：2012-09-25
申请号：US12487596
申请日：2009-06-18
申请人： Kwi Dong Kim , Jong Kee Kwon , Jong Dae Kim , Yong Seo Koo
发明人： Kwi Dong Kim , Jong Kee Kwon , Jong Dae Kim , Yong Seo Koo
IPC分类号： G05F1/00
CPC分类号： H02M1/08 , H02M2001/0032 , Y02B70/16
摘要： Provided are a switching circuit and a small-size high-efficiency direct current-to-direct current (DC-DC) converter for portable devices including the same. Using dynamic threshold-complementary metal oxide semiconductor (DT-CMOS) transistors having dynamic threshold voltages as a switching device, the switching circuit maintains a low threshold voltage in a normal mode to improve current drivability while reducing conduction loss, and maintains a high threshold voltage in a standby mode to minimize power consumption. When the switching circuit is employed in a DC-DC converter, power conversion efficiency can be improved by reducing conduction loss in the normal mode, and power consumption can be minimized in the standby mode. Consequently, the DC-DC converter can maximize a use time of a battery of a portable device and can be useful in power supplies of portable devices that are gradually being miniaturized.
摘要翻译：提供了一种用于包括其的便携式设备的开关电路和小尺寸高效率直流 - 直流（DC-DC）转换器。使用具有动态阈值电压的动态阈值互补金属氧化物半导体（DT-CMOS）晶体管作为开关器件，开关电路在正常模式下维持低阈值电压，从而改善电流驱动能力，同时降低导通损耗，并保持高阈值电压处于待机模式以最小化功耗。当在DC-DC转换器中采用开关电路时，可以通过降低正常模式下的导通损耗来提高功率转换效率，并且在待机模式下功耗可以最小化。因此，DC-DC转换器可以使便携式设备的电池的使用时间最大化，并且可以用于逐渐小型化的便携式设备的电源。

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