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1. 发明授权

US07180358B2 CMOS exponential function generating circuit with temperature compensation technique 失效
标题翻译：具有温度补偿技术的CMOS指数函数发生电路
公开(公告)号：US07180358B2
公开(公告)日：2007-02-20
申请号：US11004432
申请日：2004-12-03
申请人： Jong Kee Kwon , Mun Yang Park , Jong Dae Kim , Won Chul Song
发明人： Jong Kee Kwon , Mun Yang Park , Jong Dae Kim , Won Chul Song
IPC分类号： G06G7/20
CPC分类号： H03F3/45928 , H03F3/45179 , H03F3/45475 , H03F2203/45212 , H03F2203/45482 , H03F2203/45484 , H03F2203/45508 , H03G7/001
摘要： Provided is a CMOS exponential function generating circuit capable of compensating for the exponential function characteristic according to temperature variations. The exponential function generating circuit includes an voltage scaler scaling the value of an external gain control voltage signal, an exponential function generating unit generating exponential function current and voltage in response to a signal output from the voltage scaler, a reference voltage generator providing a reference voltage to the exponential function generating unit, and a temperature compensator compensating for the exponential function characteristic according to temperature variations.
摘要翻译：提供了能够根据温度变化补偿指数函数特性的CMOS指数函数发生电路。指数函数发生电路包括缩放外部增益控制电压信号的值的电压缩放器，响应于从电压调节器输出的信号产生指数函数电流和电压的指数函数产生单元，提供参考电压的参考电压发生器到指数函数产生单元，以及根据温度变化补偿指数函数特性的温度补偿器。

2. 发明授权

US06400932B1 Low offset automatic frequency tuning circuits for continuous-time filter 有权
标题翻译：低偏移自动频率调谐电路，用于连续时间滤波
公开(公告)号：US06400932B1
公开(公告)日：2002-06-04
申请号：US09454389
申请日：1999-12-03
申请人： Chang Jun Oh , Jong Kee Kwon , Jong Ryul Lee , Won Chul Song , Hee Bum Jung , Kyung Soo Kim , Han Jin Cho , Ook Kim
发明人： Chang Jun Oh , Jong Kee Kwon , Jong Ryul Lee , Won Chul Song , Hee Bum Jung , Kyung Soo Kim , Han Jin Cho , Ook Kim
IPC分类号： H04B118
CPC分类号： H03H11/0422 , H03L7/06
摘要： The present invention relates to a tuning circuit, more specifically to a tuning circuit for continuous-time filter capable of making exact the Gm value to minimize the variation of the cutoff frequency due to the variation of process in the Gm-C type of continuous-time filter. According to the invention, a frequency tuning circuit is provided which comprises integrating means for generating a signal discharging from a first reference voltage to a first predetermined value and a signal charging from a second reference voltage to a second predetermined value; offset sampling means for sampling the offset voltages of the Gm cells by receiving a current multiplied by the offset voltages from the Gm cells included in the integrating means and providing a feedback path between the output nodes and the input nodes of the included Gm cells; comparative signal generating means for generating a comparative signal by generating a reference signal by dividing a clock inputted from the external, receiving the signal discharging from the first reference voltage to the first predetermined value and the signal charging from the second reference voltage to the second predetermined value from the integrating means, and comparing the actual intersection and the target intersection of these signals; and control means for generating a control signal to regulate the Gm values of the integrating means and the offset sampling means by receiving the reference signal and the comparative signal from the comparative signal generating means and detecting the phase differences therebetween.
摘要翻译：调谐电路技术领域本发明涉及一种调谐电路，更具体地说涉及一种用于连续时间滤波器的调谐电路，其能够精确地确定Gm值，以使由于Gm-C型连续时间滤波器中的工艺变化引起的截止频率的变化最小化，时间过滤器。根据本发明，提供了一种频率调谐电路，其包括用于产生从第一参考电压放电到第一预定值的信号的积分装置和从第二参考电压到第二预定值的信号充电; 偏移采样装置，用于通过接收与积分装置中包括的Gm单元的偏移电压相乘的电流来对Gm单元的偏移电压进行采样，并在输出节点和所包括的Gm单元的输入节点之间提供反馈路径; 比较信号发生装置，用于通过将从外部输入的时钟分频，将从第一参考电压放电的信号接收到第一预定值和从第二参考电压到第二预定值的信号充电来产生参考信号，从积分装置获取值，并比较这些信号的实际交点和目标交点; 以及控制装置，用于通过从比较信号发生装置接收参考信号和比较信号并检测它们之间的相位差，产生控制信号以调节积分装置和偏移采样装置的Gm值。

3. 发明授权

US06259321B1 CMOS variable gain amplifier and control method therefor 有权
标题翻译： CMOS可变增益放大器及其控制方法
公开(公告)号：US06259321B1
公开(公告)日：2001-07-10
申请号：US09490732
申请日：2000-01-25
申请人： Won Chul Song , Chang Jun Oh , Hee Bum Jung
发明人： Won Chul Song , Chang Jun Oh , Hee Bum Jung
IPC分类号： H03F345
CPC分类号： H03G1/0029 , H03F3/45188 , H03F2203/45458 , H03F2203/45702
摘要： A CMOS high frequency variable gain amplifier with maximum high frequency operation and wide variable gain characteristics that is formed from an amplifier having a plurality of variable gain amplifier cells connected in series for continuously enabling wide gain variation; and a control voltage generator for generating and outputting the control voltage of the variable gain amplifier cells. By using both the saturation region and the linear region of input differential transistors constituting the variable gain amplifier cells in order to obtain wide gain variation characteristics, it is possible for the variable gain amplifier to operate in the saturation region when the input signal is small to obtain a high gain and to operate in the linear region when the input signal is large to obtain minimum distortion and a low gain. Also, it is possible for the gain to have the characteristics in the form of an exponential function to the gain control voltage.
摘要翻译：具有最大高频运算和宽可变增益特性的CMOS高频可变增益放大器，其由具有串联连接的多个可变增益放大器单元的放大器形成，以连续实现宽增益变化; 以及用于产生和输出可变增益放大器单元的控制电压的控制电压发生器。通过使用构成可变增益放大器单元的输入差分晶体管的饱和区域和线性区域，为了获得宽的增益变化特性，当输入信号小到等于可变增益放大器时，可以在饱和区域中工作获得高增益并且在输入信号大时在线性区域中操作以获得最小失真和低增益。此外，增益可以具有对增益控制电压的指数函数形式的特性。

4. 发明授权

US5600186A Capacitor voltage divider circuit 失效
标题翻译：电容分压电路
公开(公告)号：US5600186A
公开(公告)日：1997-02-04
申请号：US350020
申请日：1994-11-29
申请人： Won-Chul Song , Chang-Jun Oh , Jong-Ryul Lee , Hae-Wook Choi , Bang-Sup Song
发明人： Won-Chul Song , Chang-Jun Oh , Jong-Ryul Lee , Hae-Wook Choi , Bang-Sup Song
IPC分类号： G05F1/10 , H03M1/36 , H03M1/74 , H01H47/00
CPC分类号： H03M1/361 , Y10T307/826
摘要： A capacitor type voltage divider circuit is disclosed. The divider has a plurality of reference voltage signals applied from an external source. A plurality of switching sections are provided for switching the reference voltage signals from the source in response to first and second clock signals. A plurality of dividing sections are provided which are each comprised of two capacitors for dividing the voltage signals from the switching section into a predetermined value. With the dividing circuit, precise levels of reference voltage signals are obtained and power consumption is low without an increase in size or lowering of operational speed.
摘要翻译：公开了一种电容式分压电路。分压器具有从外部源施加的多个参考电压信号。多个开关部分被提供用于响应于第一和第二时钟信号从源极切换参考电压信号。提供多个分割部分，每个分割部分包括用于将来自切换部分的电压信号分成预定值的两个电容器。通过分频电路，可以获得精确的参考电压信号，并且功耗低，而不会增加尺寸或降低运行速度。

5. 发明授权

US6069537A Double mode modulator 失效
标题翻译：双模式调制器
公开(公告)号：US6069537A
公开(公告)日：2000-05-30
申请号：US124142
申请日：1998-07-29
申请人： Ook Kim , Jong Kee Kwon , Jong Ryul Lee , Chang Jun Oh , Won Chul Song , Kyung Soo Kim
发明人： Ook Kim , Jong Kee Kwon , Jong Ryul Lee , Chang Jun Oh , Won Chul Song , Kyung Soo Kim
IPC分类号： H04B1/00 , H04B1/40 , H04L27/00 , H04L27/20 , H04L27/32
CPC分类号： H04L27/0008 , H04B1/406 , H04L27/2071 , H04B1/00
摘要： A double mode modulator, particularly, for a portable telephone, which is adapted to realize both digital and analog modulations and have a low phase noise and a reduced locking time with a device readily integrated in an integrated circuit, including: a frequency synthesizer for synthesizing a particular frequency from an external reference clock signal; a digital modulator for performing a quadrature modulation for an output signal of the frequency synthesizer; and an analog modulator for performing a frequency modulation for the output signal of the frequency synthesizer.
摘要翻译：一种双模式调制器，特别是用于便携式电话，其适于实现数字和模拟调制，并且具有低相位噪声和减少的锁定时间，其中易于集成在集成电路中的器件包括：用于合成的频率合成器来自外部参考时钟信号的特定频率; 用于对频率合成器的输出信号执行正交调制的数字调制器; 以及用于对频率合成器的输出信号执行频率调制的模拟调制器。

6. 发明授权

US5838895A Fault detection and automatic recovery apparatus or write-read pointers in First-In First-Out 失效
标题翻译：故障检测和自动恢复设备或先进先出的读取指针
公开(公告)号：US5838895A
公开(公告)日：1998-11-17
申请号：US857045
申请日：1997-05-15
申请人： Seong-Do Kim , Hee-Bum Jung , Won-Chul Song
发明人： Seong-Do Kim , Hee-Bum Jung , Won-Chul Song
IPC分类号： G11C29/00 , G06F12/00 , G06F13/00
CPC分类号： G11C29/003
摘要： The present invention relates to a fault detection and automatic recovery apparatus of write-read pointers in FIFO. While storing effective data in a register in writing performance, the apparatus does not unconditionally enable a FULL.sub.-- FLAG signal allotted to the register but confirms the relation of write-read pointers at that time and the EMPTY.sub.-- FLAG signal of a register at which the read pointer is situated and detects the error of FIFO. By selectively enabling the FULL.sub.-- FLAG signal of the register according to the result of detection, it automatically restores the FIFO functions without unnecessary re-initialization or the discontinuation of data transmission attributable thereto.
摘要翻译：本发明涉及FIFO中写入指针的故障检测和自动恢复装置。在写入性能方面将有效数据存储在寄存器中时，该装置不能无条件地使能分配给寄存器的FULL-FLAG信号，而是确认该时刻的读 - 读指针与寄存器的EMPTY-FLAG信号的关系，读指针位于并检测FIFO的错误。通过根据检测结果有选择地启用寄存器的FULL-FLAG信号，它会自动恢复FIFO功能，而无需不必要的重新初始化或中止可归因于其的数据传输。

7. 发明授权

US6091289A Low pass filter 失效
标题翻译：低通滤波器
公开(公告)号：US6091289A
公开(公告)日：2000-07-18
申请号：US99388
申请日：1998-06-18
申请人： Won Chul Song , Jong Ryul Lee , Chang Jun Oh , Jong Kee Kwon , Ook Kim , Kyung Soo Kim
发明人： Won Chul Song , Jong Ryul Lee , Chang Jun Oh , Jong Kee Kwon , Ook Kim , Kyung Soo Kim
IPC分类号： H03H9/46 , H03H11/04 , H03K5/00
CPC分类号： H03H11/04
摘要： There is disclosed a low frequency filter. A low frequency cutoff filter includes a filter circuit having a capacitor connected between an input terminal and an output terminal and an active resistor connected to the output terminal, having a very large resistance, and a bias circuit having a negative feedback to set a biasing voltage of the active resistor to a desired value, thereby implementing the cutoff filter within a semiconductor chip as one set with the capacitor having a small capacitance. A low frequency pass filter includes an active resistor having a very large resistance, means for setting a biasing voltage of the active resistor to a desired value, and a capacitor connected between the output terminal and the ground. Therefore, the low pass filter can be integrated-circuited using even small capacitor.
摘要翻译：公开了一种低频滤波器。低频截止滤波器包括滤波器电路，其具有连接在输入端子和输出端子之间的电容器和连接到具有非常大电阻的输出端子的有源电阻器，以及具有负反馈以设置偏置电压的偏置电路将所述有源电阻器设置为期望值，从而在半导体芯片内实现截止滤波器作为一组，其中电容器具有小电容。低通滤波器包括具有非常大电阻的有源电阻器，用于将有源电阻器的偏置电压设置为期望值的装置，以及连接在输出端子和地之间的电容器。因此，低通滤波器可以使用甚至小的电容器集成。

8. 发明授权

US6011425A CMOS offset trimming circuit and offset generation circuit 失效
标题翻译： CMOS偏移调整电路和偏移生成电路
公开(公告)号：US6011425A
公开(公告)日：2000-01-04
申请号：US893459
申请日：1997-07-11
申请人： Chang-Jun Oh , Ook Kim , Jong-Kee Kwon , Jong-Ryul Lee , Won-Chul Song , Kyung-Soo Kim
发明人： Chang-Jun Oh , Ook Kim , Jong-Kee Kwon , Jong-Ryul Lee , Won-Chul Song , Kyung-Soo Kim
IPC分类号： H03K19/00 , G11C17/18 , H01H37/76
CPC分类号： G11C17/18
摘要： A CMOS offset trimming circuit and offset generation circuit for obtaining the corrected optimum offset value for correcting the offset generated in the CMOS analog circuit. An offset trimming circuit comprises a flip-flop for loading a data to be used for obtaining an optimum offset value or a data to be trimmed according to an input clock, a fuse circuit for setting the circuit with a corrected optimum offset value obtained in a corresponding mode by receiving the data loaded on the flip-flop and the mode selection signal as an input signal, and a selection logic circuit for outputting a selected signal as a trimming output signal by selecting one from the group consisting of the data loaded on the flip-flop and the data output from the fuse circuit according to the operation mode.
摘要翻译： CMOS偏移调整电路和偏移生成电路，用于获得用于校正在CMOS模拟电路中产生的偏移的校正的最佳偏移值。偏移修整电路包括用于根据输入时钟加载要用于获得最佳偏移值的数据或要修整的数据的触发器，用于设置具有校正的最佳偏移值的电路的熔丝电路，通过接收加载在触发器上的数据和模式选择信号作为输入信号的相应模式，以及选择逻辑电路，用于通过从由加载在所述触发器上的数据组合的组中选择一个来选择所选择的信号作为微调输出信号触发器和根据操作模式从熔丝电路输出的数据。

9. 发明授权

US5886550A Integrated circuit built-in type supply power delay circuit 失效
标题翻译：集成电路内置式电源延时电路
公开(公告)号：US5886550A
公开(公告)日：1999-03-23
申请号：US877408
申请日：1997-06-16
申请人： Jong-Kee Kwon , Gyu-Dong Kim , Ook Kim , Chang-Jun Oh , Jong-Ryul Lee , Won-Chul Song , Kyung-Soo Kim
发明人： Jong-Kee Kwon , Gyu-Dong Kim , Ook Kim , Chang-Jun Oh , Jong-Ryul Lee , Won-Chul Song , Kyung-Soo Kim
IPC分类号： G11C5/14 , H03K17/22
CPC分类号： H03K17/223
摘要： An integrated circuit built-in type power delay circuit which is capable of supplying a stable supply power to each circuit of the integrated circuit by generating a supply power control signal voltage after a predetermined time. The circuit includes a receiving unit for receiving a supply voltage VDD and charging the same, a supplying unit for supplying a current, an inverting unit for inverting an output value from the charging unit, a switching unit controlled in accordance with an output value from the inverting unit for switching an output from the current supply unit, a current regenerating unit for receiving a control of the switching unit and discharging an output value from the charging unit, an electric potential value conversion unit controlled by an output value from the inverting unit for converting an output value from the charging unit into a low level, and a buffering unit for receiving an output value from the inverting unit for buffering the output value and outputting a non-inverted signal.
摘要翻译：一种集成电路内置型功率延迟电路，其能够通过在预定时间之后产生电源功率控制信号电压来向集成电路的每个电路提供稳定的供电。该电路包括：接收单元，用于接收电源电压VDD并对其进行充电;提供单元，用于提供电流;反相单元，用于反转来自充电单元的输出值;开关单元，根据来自用于切换来自电流供应单元的输出的反相单元，用于接收开关单元的控制并从充电单元放电输出值的电流再生单元，由来自反相单元的输出值控制的电位值转换单元，将来自充电单元的输出值转换为低电平;以及缓冲单元，用于从反相单元接收输出值，用于缓冲输出值并输出非反相信号。

10. 发明授权

US5818306A Voltage control oscillation circuit using CMOS 失效
标题翻译：使用CMOS的电压控制振荡电路
公开(公告)号：US5818306A
公开(公告)日：1998-10-06
申请号：US892938
申请日：1997-07-15
申请人： Jong-Ryul Lee , Ook Kim , Jong-Kee Kwon , Chang-Jun Oh , Won-Chul Song , Kyung-Soo Kim
发明人： Jong-Ryul Lee , Ook Kim , Jong-Kee Kwon , Chang-Jun Oh , Won-Chul Song , Kyung-Soo Kim
IPC分类号： H03B5/00 , H03B1/00 , H03B1/04 , H03B5/12 , H03L5/00
CPC分类号： H03L5/00 , H03B5/1209 , H03B5/1215 , H03B5/1221 , H03B5/1228 , H03B5/1243 , H03B2200/0066 , H03B2200/0082 , H03B2200/0086 , H03B2200/0088 , H03B2200/0098 , H03B2201/0208 , H03B2202/012 , H03B2202/06
摘要： A voltage control oscillation circuit for a CMOS which is capable of reducing phase noise and power consumption by adapting a voltage amplitude control loop and a common mode feedback circuit to a conventional LC-tank circuit. The circuit includes an LC-tank oscillation unit for outputting an oscillation voltage, an output common mode feedback unit for receiving an output from the LC-tank oscillation unit and eliminating a common mode noise of the output, and a voltage amplitude control unit for controlling a bias current of the LC-tank oscillation unit in accordance with a voltage difference at both ends of an LC-tank oscillation terminal which voltage is applied thereto through the output common mode feedback unit, for thus controlling the amount of an oscillation voltage.
摘要翻译：一种用于CMOS的电压控制振荡电路，其能够通过使电压幅度控制回路和共模反馈电路适应于传统的LC槽电路来降低相位噪声和功耗。电路包括用于输出振荡电压的LC槽振荡单元，用于接收来自LC槽振荡单元的输出并消除输出的共模噪声的输出共模反馈单元和用于控制的电压幅度控制单元根据通过输出共模反馈单元向其施加电压的LC槽振荡端子的两端的电压差，LC槽振荡单元的偏置电流，从而控制振荡电压的量。

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