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1. 发明授权

US08601420B1 Equivalent waveform model for static timing analysis of integrated circuit designs 有权
标题翻译：集成电路设计静态时序分析的等效波形模型
公开(公告)号：US08601420B1
公开(公告)日：2013-12-03
申请号：US12960387
申请日：2010-12-03
申请人： Igor Keller , Joel R. Phillips , Jijun Chen
发明人： Igor Keller , Joel R. Phillips , Jijun Chen
IPC分类号： G06F17/50 , G06F9/455
CPC分类号： G06F17/50 , G06F17/5036 , G06F2217/84
摘要： In one embodiment, a method of constructing an equivalent waveform model for static timing analysis of integrated circuit designs is disclosed. The method includes fitting time point coefficients (qk) and known time delay values from a delay and slew model of a receiving gate from a timing library; determining waveform values (Ikj) for input waveforms from the timing library; determining timing values (dj) from a timing table in the timing library in response to the input waveforms of the timing library; and determining coefficients (qk) by minimizing a residual of a delay equation.
摘要翻译：在一个实施例中，公开了一种构建用于集成电路设计的静态时序分析的等效波形模型的方法。该方法包括从定时库中接收来自延迟和转换模型的时间点系数（qk）和已知的时间延迟值; 从定时库确定输入波形的波形值（Ikj）; 响应于定时库的输入波形从定时库中的定时表确定定时值（dj）; 以及通过使延迟方程的残差最小化来确定系数（qk）。

2. 发明授权

US08375343B1 Methods and apparatus for waveform based variational static timing analysis 有权
标题翻译：基于波形变分静态时序分析的方法和装置
公开(公告)号：US08375343B1
公开(公告)日：2013-02-12
申请号：US12331172
申请日：2008-12-09
申请人： Saurabh K. Tiwary , Joel R. Phillips , Igor Keller
发明人： Saurabh K. Tiwary , Joel R. Phillips , Igor Keller
IPC分类号： G06F17/50
CPC分类号： G06F17/5031
摘要： A system and method are disclosed for waveform based variational static timing analysis. A circuit is divided into its linear circuit parts and non-linear circuit parts and modeled together, by a combination of linear modeling techniques, into linear equations that may be represented by matrices. The linear equations in matrix form may be readily solved by a computer such that an input waveform to an input pin of the circuit can be sequentially “pushed” through the various interconnects and logic networks of the circuit to an output pin. Output voltage waveforms are obtained at each stage of the waveform pushing and may be used to perform static timing analysis.
摘要翻译：公开了一种基于波形变分静态时序分析的系统和方法。电路分为线性电路部分和非线性电路部分，并通过线性建模技术的组合建模在一起，形成可以由矩阵表示的线性方程组。矩阵形式的线性方程式可以由计算机容易地解决，使得可以将电路的输入引脚的输入波形顺序推送到电路的各种互连和逻辑网络到输出引脚。在波形推送的每个阶段获得输出电压波形，可用于执行静态时序分析。

3. 发明授权

US08245165B1 Methods and apparatus for waveform based variational static timing analysis 有权
标题翻译：基于波形变分静态时序分析的方法和装置
公开(公告)号：US08245165B1
公开(公告)日：2012-08-14
申请号：US12331072
申请日：2008-12-09
申请人： Saurabh K. Tiwary , Joel R. Phillips , Igor Keller
发明人： Saurabh K. Tiwary , Joel R. Phillips , Igor Keller
IPC分类号： G06F17/50
CPC分类号： G06F17/5031
摘要： A system and method are disclosed for waveform based variational static timing analysis. A circuit is divided into its linear circuit parts and non-linear circuit parts and modeled together, by a combination of linear modeling techniques, into linear equations that may be represented by matrices. The linear equations in matrix form may be readily solved by a computer such that an input waveform to an input pin of the circuit can be sequentially “pushed” through the various interconnects and logic networks of the circuit to an output pin. Output voltage waveforms are obtained at each stage of the waveform pushing and may be used to perform static timing analysis.
摘要翻译：公开了一种基于波形变分静态时序分析的系统和方法。电路分为线性电路部分和非线性电路部分，并通过线性建模技术的组合建模在一起，形成可以由矩阵表示的线性方程组。矩阵形式的线性方程可以由计算机容易地解决，使得到电路的输入引脚的输入波形可以顺序地“推动”到电路的各种互连和逻辑网络到输出引脚。在波形推送的每个阶段获得输出电压波形，可用于执行静态时序分析。

4. 发明授权

US08631369B1 Methods, systems, and apparatus for timing and signal integrity analysis of integrated circuits with semiconductor process variations 有权
标题翻译：具有半导体工艺变化的集成电路的定时和信号完整性分析的方法，系统和装置
公开(公告)号：US08631369B1
公开(公告)日：2014-01-14
申请号：US12981504
申请日：2010-12-30
申请人： Vinod Kariat , Joel R. Phillips , Igor Keller
发明人： Vinod Kariat , Joel R. Phillips , Igor Keller
IPC分类号： G06F17/50
CPC分类号： G06F17/5036
摘要： In one embodiment of the invention, a method of statically analyzing an integrated circuit with process and environment variations is provided. The method includes characterizing each circuit cell of a cell library for a sensitivity to process parameter variations within a predetermined range; creating a timing graph corresponding to a netlist representing an integrated circuit design; along nodes of the timing graph, computing delay values including sensitivities to process variations; for each selected output node of the netlist, propagating a full timing value function with the sensitivities to the selected output nodes; and generating a parameterized timing report including the sensitivities to the process variations.
摘要翻译：在本发明的一个实施例中，提供了一种静态分析具有过程和环境变化的集成电路的方法。该方法包括表征单元库的每个电路单元以便在预定范围内处理参数变化的灵敏度; 创建对应于表示集成电路设计的网表的时序图; 沿着定时图的节点计算包括对过程变化的敏感度的延迟值; 对于网表的每个选择的输出节点，传播具有对所选输出节点的灵敏度的完整定时值函数; 以及生成包括对所述过程变化的灵敏度的参数化定时报告。

5. 发明授权

US08782583B1 Waveform based variational static timing analysis 有权
标题翻译：基于波形的变分静态时序分析
公开(公告)号：US08782583B1
公开(公告)日：2014-07-15
申请号：US13549412
申请日：2012-07-13
申请人： Saurabh K Tiwary , Joel R. Phillips , Igor Keller
发明人： Saurabh K Tiwary , Joel R. Phillips , Igor Keller
IPC分类号： G06F9/455 , G06F17/50
CPC分类号： G06F17/5031
摘要： A system and method are disclosed for waveform based variational static timing analysis. A circuit is divided into its linear circuit parts and non-linear circuit parts and modeled together, by a combination of linear modeling techniques, into linear equations that may be represented by matrices. The linear equations in matrix form may be readily solved by a computer such that an input waveform to an input pin of the circuit can be sequentially “pushed” through the various interconnects and logic networks of the circuit to an output pin. Output voltage waveforms are obtained at each stage of the waveform pushing and may be used to perform static timing analysis.
摘要翻译：公开了一种基于波形变分静态时序分析的系统和方法。电路分为线性电路部分和非线性电路部分，并通过线性建模技术的组合建模在一起，形成可以由矩阵表示的线性方程组。矩阵形式的线性方程可以由计算机容易地解决，使得到电路的输入引脚的输入波形可以顺序地“推动”到电路的各种互连和逻辑网络到输出引脚。在波形推送的每个阶段获得输出电压波形，可用于执行静态时序分析。

6. 发明授权

US07882471B1 Timing and signal integrity analysis of integrated circuits with semiconductor process variations 有权
标题翻译：具有半导体工艺变化的集成电路的时序和信号完整性分析
公开(公告)号：US07882471B1
公开(公告)日：2011-02-01
申请号：US11560261
申请日：2006-11-15
申请人： Vinod Kariat , Joel R. Phillips , Igor Keller
发明人： Vinod Kariat , Joel R. Phillips , Igor Keller
IPC分类号： G06F17/50
CPC分类号： G06F17/5036
摘要： In one embodiment of the invention, a method of statically analyzing an integrated circuit with process and environment variations is provided. The method includes characterizing each circuit cell of a cell library for a sensitivity to process parameter variations within a predetermined range; creating a timing graph corresponding to a netlist representing an integrated circuit design; along nodes of the timing graph, computing delay values including sensitivities to process variations; for each selected output node of the netlist, propagating a full timing value function with the sensitivities to the selected output nodes; and generating a parameterized timing report including the sensitivities to the process variations.
摘要翻译：在本发明的一个实施例中，提供了一种静态分析具有过程和环境变化的集成电路的方法。该方法包括表征单元库的每个电路单元以便在预定范围内处理参数变化的灵敏度; 创建对应于表示集成电路设计的网表的时序图; 沿着定时图的节点计算包括对过程变化的敏感度的延迟值; 对于网表的每个选择的输出节点，传播具有对所选输出节点的灵敏度的完整定时值函数; 以及生成包括对所述过程变化的灵敏度的参数化定时报告。

7. 发明授权

US08533644B1 Multi-CCC current source models and static timing analysis methods for integrated circuit designs 有权
标题翻译：多CCC电流源模型和集成电路设计的静态时序分析方法
公开(公告)号：US08533644B1
公开(公告)日：2013-09-10
申请号：US12965886
申请日：2010-12-12
申请人： Vinod Kariat , Igor Keller , Joel R. Phillips , King Ho Tam
发明人： Vinod Kariat , Igor Keller , Joel R. Phillips , King Ho Tam
IPC分类号： G06F17/50
CPC分类号： G06F17/5081 , G06F17/5036 , G06F2217/84
摘要： In one embodiment of the invention, a multi-CCC current source model is disclosed to perform statistical timing analysis of an integrated circuit design. The multi-CCC current source model includes a voltage waveform transfer function, a voltage dependent current source, and an output capacitor. The voltage waveform transfer function receives an input voltage waveform and transforms it into an intermediate voltage waveform. The voltage dependent current source generates an output current in response to the intermediate voltage waveform. The output capacitor is coupled in parallel to the voltage dependent current source to generate an output voltage waveform for computation of a timing delay.
摘要翻译：在本发明的一个实施例中，公开了一种多CCC电流源模型来执行集成电路设计的统计时序分析。多CCC电流源模型包括电压波形传递函数，电压相关电流源和输出电容器。电压波形传递函数接收输入电压波形并将其转换为中间电压波形。电压相关电流源响应于中间电压波形产生输出电流。输出电容器并联到与电压相关的电流源，以产生用于计算定时延迟的输出电压波形。

8. 发明授权

US08516420B1 Sensitivity and static timing analysis for integrated circuit designs using a multi-CCC current source model 有权
标题翻译：使用多CCC电流源模型的集成电路设计的灵敏度和静态时序分析
公开(公告)号：US08516420B1
公开(公告)日：2013-08-20
申请号：US11849254
申请日：2007-08-31
申请人： Vinod Kariat , Igor Keller , Joel R. Phillips , King Ho Tam
发明人： Vinod Kariat , Igor Keller , Joel R. Phillips , King Ho Tam
IPC分类号： G06F17/50
CPC分类号： G06F17/5081 , G06F17/5036 , G06F2217/84
摘要： In one embodiment of the invention, a multi-CCC current source model is disclosed to perform statistical timing analysis of an integrated circuit design. The multi-CCC current source model includes a voltage waveform transfer function, a voltage dependent current source, and an output capacitor. The voltage waveform transfer function receives an input voltage waveform and transforms it into an intermediate voltage waveform. The voltage dependent current source generates an output current in response to the intermediate voltage waveform. The output capacitor is coupled in parallel to the voltage dependent current source to generate an output voltage waveform for computation of a timing delay.
摘要翻译：在本发明的一个实施例中，公开了一种多CCC电流源模型来执行集成电路设计的统计时序分析。多CCC电流源模型包括电压波形传递函数，电压相关电流源和输出电容器。电压波形传递函数接收输入电压波形并将其转换为中间电压波形。电压相关电流源响应于中间电压波形产生输出电流。输出电容器并联到与电压相关的电流源，以产生用于计算定时延迟的输出电压波形。

9. 发明授权

US08341572B1 Methods and apparatus for waveform based variational static timing analysis 有权
标题翻译：基于波形变分静态时序分析的方法和装置
公开(公告)号：US08341572B1
公开(公告)日：2012-12-25
申请号：US12331130
申请日：2008-12-09
申请人： Saurabh K. Tiwary , Joel R. Phillips , Igor Keller
发明人： Saurabh K. Tiwary , Joel R. Phillips , Igor Keller
IPC分类号： G06F9/455 , G06F17/50
CPC分类号： G06F17/5031
摘要： A system and method are disclosed for waveform based variational static timing analysis. A circuit is divided into its linear circuit parts and non-linear circuit parts and modeled together, by a combination of linear modeling techniques, into linear equations that may be represented by matrices. The linear equations in matrix form may be readily solved by a computer such that an input waveform to an input pin of the circuit can be sequentially “pushed” through the various interconnects and logic networks of the circuit to an output pin. Output voltage waveforms are obtained at each stage of the waveform pushing and may be used to perform static timing analysis.
摘要翻译：公开了一种基于波形变分静态时序分析的系统和方法。电路分为线性电路部分和非线性电路部分，并通过线性建模技术的组合建模在一起，形成可以由矩阵表示的线性方程组。矩阵形式的线性方程式可以由计算机容易地解决，使得可以将电路的输入引脚的输入波形顺序推送到电路的各种互连和逻辑网络到输出引脚。在波形推送的每个阶段获得输出电压波形，可用于执行静态时序分析。

10. 发明授权

US08195440B2 Method and apparatus for simulating quasi-periodic circuit operating conditions using a mixed frequency/time algorithm 有权
标题翻译：使用混合频率/时间算法模拟准周期性电路工作条件的方法和装置
公开(公告)号：US08195440B2
公开(公告)日：2012-06-05
申请号：US12372608
申请日：2009-02-17
申请人： Dan Feng , Joel R. Phillips , Kenneth Kundert
发明人： Dan Feng , Joel R. Phillips , Kenneth Kundert
IPC分类号： G06F17/50
CPC分类号： G06F17/5036
摘要： Described is a process for performing an improved mixed frequency-time algorithm to simulate responses of a circuit that receives a periodic sample signal and at least one information signal. The process selects a set of evenly spaced distinct time points and a set of reference time points. Each of the reference points is associated with a distinct time point, and a reference time point is a signal period away from its respective distinct time point. The process finds a first set of relationships between the values at the distinct time points and the values the reference time points. The process also finds a second set of relationships between the values at the distinct time points and the values at the reference time points. The process then combines the first and second sets of relationships to establish a system of nonlinear equations in terms of the values at the distinct time points only. By solving the system of nonlinear equations, the process finds simulated responses of the circuit in time domain. The process then converts the simulated circuit responses from time domain to frequency domain.
摘要翻译：描述了一种用于执行改进的混合频率 - 时间算法来模拟接收周期性采样信号的电路和至少一个信息信号的响应的过程。该过程选择一组均匀间隔不同的时间点和一组参考时间点。每个参考点与不同的时间点相关联，并且参考时间点是远离其各自的不同时间点的信号周期。该过程在不同时间点的值和参考时间点之间找到第一组关系。该过程还在不同时间点的值和参考时间点的值之间找到第二组关系。然后，该过程组合第一组和第二组关系，以仅在不同时间点处建立非线性方程组的系数。通过求解非线性方程组，该过程在时域中发现电路的仿真响应。然后，该过程将模拟电路响应从时域转换到频域。

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