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    • 9. 发明申请
    • Method for fabricating AIGaN/GaN-HEMT using selective regrowth
    • 使用选择性再生长制造AIGaN / GaN-HEMT的方法
    • US20080176366A1
    • 2008-07-24
    • US11984015
    • 2007-11-13
    • Juro MitaFumihiko TodaToshiharu Marui
    • Juro MitaFumihiko TodaToshiharu Marui
    • H01L21/338
    • H01L29/7786H01L29/2003H01L29/42316H01L29/66462
    • A semiconductor body includes, on a substrate, a stack of buffer layer, UID-GaN layer overlying the buffer layer, and UID-AlGaN layer overlying the UID-GaN layer. On the surface of the UID-AlGaN layer, an insulation film is deposited and patterned. An n+-GaN layer is selectively regrown directly on a region of the surface of the semiconductor body other than the insulation film using the patterned insulation film as a mask without etching the surface of the semiconductor body. A portion of the selectively regrown n+-GaN layer corresponding to a region reserved for an ohmic contact electrode is defined and the ohmic contact electrode is formed on the region. An opening exposing a region reserved for a gate electrode is defined and formed within the insulation SiO2 layer, and a gate electrode is formed in the region. An AlGaN/GaN-HEMT or MIS type of AlGaN/GaN-HEMT has lower contact resistance and uniform device characteristics.
    • 半导体本体在衬底上包括一叠缓冲层,覆盖缓冲层的UID-GaN层和覆盖在UID-GaN层上的UID-AlGaN层。 在UID-AlGaN层的表面上,淀积并图案化绝缘膜。 在不蚀刻半导体本体的表面的情况下,使用图案化的绝缘膜作为掩模,在半导体本体的除了绝缘膜之外的区域的区域上选择性地重新生长n + SUP / GaN。 限定与欧姆接触电极保留的区域对应的部分选择性再生长的n + S + GaN层,并且在该区域上形成欧姆接触电极。 在绝缘SiO 2层内限定并形成露出用于栅电极的区域的开口,并且在该区域中形成栅电极。 AlGaN / GaN-HEMT或MIS型AlGaN / GaN-HEMT具有较低的接触电阻和均匀的器件特性。
    • 10. 发明授权
    • Etching method, method of fabricating metal film structure, and etching structure
    • 蚀刻方法,金属膜结构的制造方法和蚀刻结构
    • US07393791B2
    • 2008-07-01
    • US11512341
    • 2006-08-30
    • Katsuaki KaifuJuro Mita
    • Katsuaki KaifuJuro Mita
    • H01L21/302
    • H01L21/31116H01L21/7688Y10T428/24174
    • There is provided an etching method in which a protective film existing in an etching-destined region of a substrate structure is removed by means of ICP-RIE to form an exposure region of the principal surface of the substrate. The substrate structure comprises a substrate, a protective film formed on the substrate, a photoresist layer formed on the protective film, and a hole formed throughout the photoresist layer. The hole comprises an opening formed in the photoresist layer surface and a hollow linked to the opening in the thickness direction of the photoresist layer and reaching the protective film. ICP-RIE is performed under conditions such that (1) ICP power is 20 to 100 W, (2) RIE power is 5 to 50 W, and (3) the pressure in the etching chamber is 1 to 100 mTorr.
    • 提供一种蚀刻方法,其中通过ICP-RIE去除存在于衬底结构的蚀刻目的地区域中的保护膜,以形成衬底的主表面的曝光区域。 衬底结构包括衬底,形成在衬底上的保护膜,形成在保护膜上的光致抗蚀剂层和在整个光致抗蚀剂层上形成的孔。 孔包括形成在光致抗蚀剂层表面中的开口和在光致抗蚀剂层的厚度方向上连接到开口的中空并到达保护膜。 ICP-RIE在(1)ICP功率为20〜100W的条件下进行,(2)RIE功率为5〜50W,(3)蚀刻室内的压力为1〜100mTorr。