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1. 发明授权

US6029197A Management information base (MIB) report interface for abbreviated MIB data 失效
标题翻译：管理信息库（MIB）报告接口，用于缩写MIB数据
公开(公告)号：US6029197A
公开(公告)日：2000-02-22
申请号：US992920
申请日：1997-12-18
申请人： Bahadir Erimli , Ian Lam
发明人： Bahadir Erimli , Ian Lam
IPC分类号： H04L13/08 , G06F11/26 , G06F12/00 , G06F13/00 , G06F13/10 , G06F13/16 , G06F13/24 , G06F15/00 , G06F15/16 , G08B5/00 , G11C11/412 , H04B7/14 , H04J3/02 , H04J3/12 , H04J3/22 , H04J3/24 , H04L12/18 , H04L12/24 , H04L12/28 , H04L12/413 , H04L12/44 , H04L12/46 , H04L12/50 , H04L12/54 , H04L12/66 , H04L12/861 , H04L12/863 , H04L12/879 , H04L12/931 , H04L12/933 , H04L12/935 , H04L12/937 , H04L12/939 , H04L12/947 , H04Q3/545 , H04Q11/00
CPC分类号： H04L49/3009 , G06F13/1605 , G06F13/24 , G11C11/412 , H04L12/4641 , H04L12/5693 , H04L41/0213 , H04L47/6225 , H04L49/103 , H04L49/201 , H04L49/25 , H04L49/255 , H04L49/30 , H04L49/3027 , H04L49/351 , H04L49/354 , H04L49/50 , H04L49/552 , H04L49/555 , H04L49/90 , H04L49/901 , H04L49/9047 , H04L49/9063 , H04L49/9073 , H04L49/9078 , H04L49/9084 , H04Q3/54591 , H04L12/1863 , H04L12/4645 , H04L12/467 , H04L49/3054 , H04L49/40 , H04Q2213/1316 , H04Q2213/13162
摘要： An integrated multiport switch (IMS) in which an on-chip management information base (MIB) accumulation processor enables monitoring of a significantly larger number of MIB objects to be stored in external memory while minimizing, media access controller (MAC) complexity. A MAC for each port in the IMS outputs a MIB report for each transmission or reception of data according to a specific compressed format to a MIB engine that can be centrally located on the chip. The compression of the data that represents the monitored events enables conservation of the capacity of MAC buffer elements. The MIB report is immediately dispatched to the MIB engine upon receipt or transmission of a data frame. The MIB engine decodes the MIB report into a plurality of associated MIB objects. which are temporarily accumulated until the external memory is updated. The MIB engine initiates the stored MIB value updating process by retrieving the values from the external memory and adding the accumulated MIB objects to the retrieved values. The updated MIB objects are then transmitted back to the external memory for storage therein and the MIB engyine object values are reset.
摘要翻译：集成多端口交换机（IMS），其中片上管理信息库（MIB）累积处理器能够监视要存储在外部存储器中的明显更大数量的MIB对象，同时最小化媒体访问控制器（MAC）复杂度。 IMS中的每个端口的MAC将根据特定压缩格式的数据的每个发送或接收的MIB报告输出到可以位于芯片上的MIB引擎。表示监视事件的数据的压缩使得能够保护MAC缓冲元件的容量。在收到或发送数据帧后，MIB报告将立即发送到MIB引擎。 MIB引擎将MIB报告解码成多个关联的MIB对象。其被暂时累积直到外部存储器被更新。 MIB引擎通过从外部存储器检索值并将累积的MIB对象添加到检索到的值来启动存储的MIB值更新过程。然后，更新的MIB对象被发送回外部存储器以便存储在其中，并且重置MIB工作对象值。

2. 发明授权

US6011799A Method and apparatus for managing external physical layer devices 失效
标题翻译：用于管理外部物理层设备的方法和装置
公开(公告)号：US6011799A
公开(公告)日：2000-01-04
申请号：US992926
申请日：1997-12-18
申请人： Denise Kerstein , Philip Simmons , Ian Lam
发明人： Denise Kerstein , Philip Simmons , Ian Lam
IPC分类号： H04L13/08 , G06F11/26 , G06F12/00 , G06F13/00 , G06F13/10 , G06F13/16 , G06F13/24 , G06F15/00 , G06F15/16 , G08B5/00 , G11C11/412 , H04B7/14 , H04J3/02 , H04J3/12 , H04J3/22 , H04J3/24 , H04L12/18 , H04L12/24 , H04L12/28 , H04L12/413 , H04L12/44 , H04L12/46 , H04L12/50 , H04L12/54 , H04L12/66 , H04L12/861 , H04L12/863 , H04L12/879 , H04L12/931 , H04L12/933 , H04L12/935 , H04L12/937 , H04L12/939 , H04L12/947 , H04Q3/545 , H04Q11/00 , G05B19/02 , H04L12/56
CPC分类号： H04L49/3009 , G06F13/1605 , G06F13/24 , G11C11/412 , H04L12/4641 , H04L12/5693 , H04L41/0213 , H04L47/6225 , H04L49/103 , H04L49/201 , H04L49/25 , H04L49/255 , H04L49/30 , H04L49/3027 , H04L49/351 , H04L49/354 , H04L49/50 , H04L49/552 , H04L49/555 , H04L49/90 , H04L49/901 , H04L49/9047 , H04L49/9063 , H04L49/9073 , H04L49/9078 , H04L49/9084 , H04Q3/54591 , H04L12/1863 , H04L12/4645 , H04L12/467 , H04L49/3054 , H04L49/40 , H04Q2213/1316 , H04Q2213/13162
摘要： Every external physical layer device coupled to a multiport data communication switch is polled in succession to determine status and control information relating to the external physical layer device. The polling procedure performed automatically at regular time intervals is interleaved with management accesses to the external PHYs initiated by a host processor. The host management access may be performed to write or read management data to or from a particular register in a particular external physical layer device.
摘要翻译：连接到多端口数据通信交换机的每个外部物理层设备被连续轮询以确定与外部物理层设备有关的状态和控制信息。以规则的时间间隔自动执行的轮询过程与对主机处理器发起的外部PHY的管理访问进行交织。可以执行主机管理访问以向特定外部物理层设备中的特定寄存器写入或读取管理数据。

3. 发明授权

US06701489B1 Method and apparatus for changing register implementation without code change 失效
标题翻译：用于更改寄存器实现而不进行代码更改的方法和设备
公开(公告)号：US06701489B1
公开(公告)日：2004-03-02
申请号：US09306458
申请日：1999-05-07
申请人： Ian Lam
发明人： Ian Lam
IPC分类号： G06F1750
CPC分类号： H04L49/351 , G06F17/5045 , H04L49/102 , H04L49/205 , H04L49/352 , H04L49/354 , H04L49/90
摘要： A network switch configured for switching data packets across multiple ports uses numerous digital registers to process signals in support of the switch's functionalities. The design parameters associated with these registers are readily modifiable by storing these parameters in a central storage system. These design parameters are automatically read into the source code of a hardware description language, whereby the values and definitions of the registers are modified without altering the source code. Accordingly, any source code requiring updated bit definition and default values is automatically initialized without concern over design mismatch.
摘要翻译：配置用于跨多个端口切换数据包的网络交换机使用许多数字寄存器来处理支持交换机功能的信号。通过将这些参数存储在中央存储系统中，与这些寄存器相关联的设计参数很容易修改。这些设计参数被自动读入硬件描述语言的源代码，由此修改寄存器的值和定义而不改变源代码。因此，任何需要更新的位定义和默认值的源代码都将自动初始化，而不用担心设计不匹配。

4. 发明授权

US06501734B1 Apparatus and method in a network switch for dynamically assigning memory interface slots between gigabit port and expansion port 有权
标题翻译：网络交换机中的装置和方法，用于在千兆端口和扩展端口之间动态分配存储器接口槽
公开(公告)号：US06501734B1
公开(公告)日：2002-12-31
申请号：US09317150
申请日：1999-05-24
申请人： Ching Yu , Xiaohua Zhuang , Bahadir Erimli , John M. Chiang , Shashank Merchant , Robert Williams , Edward Yang , Chandan Egbert , Vallath Nandakumar , Ian Lam , Eric Tsin-Ho Leung
发明人： Ching Yu , Xiaohua Zhuang , Bahadir Erimli , John M. Chiang , Shashank Merchant , Robert Williams , Edward Yang , Chandan Egbert , Vallath Nandakumar , Ian Lam , Eric Tsin-Ho Leung
IPC分类号： H04J116
CPC分类号： H04L49/103 , H04L49/254 , H04L49/3027 , H04L49/351 , H04L49/352 , H04L49/354 , H04L49/90 , H04L49/901
摘要： A network switch having switch ports for full-duplex communication of data packets with respective network nodes according to Ethernet (IEEE 802.3) protocol dynamically allocates external memory bandwidth slots between high data rate ports. An external memory interface determines if a high data rate port makes a request for a bandwidth slot and grants the request if made. The slot is taken from a selected group which is a subset of the total number of slots. If a request for the slot is not made, the external memory interface assigns the slot to another high data rate port. Lower data rate ports in the network switch are assigned fixed slots from those slots not from within the selected group of slots. The dynamic allocation of bandwidth slots between the high data rate port enables the efficient use of limited memory bandwidth resources.
摘要翻译：具有根据以太网（IEEE 802.3）协议的具有各个网络节点的数据分组全双工通信的交换机端口的网络交换机动态地在高数据速率端口之间分配外部存储器带宽时隙。外部存储器接口确定高数据速率端口是否对带宽槽进行请求，如果发出请求则确定该请求。时隙是从所选择的组中获取的，该组是总时隙数的子集。如果没有对插槽进行请求，则外部存储器接口将插槽分配给另一个高数据速率端口。网络交换机中的较低数据速率端口从这些时隙中分配固定时隙，而不是在所选择的时隙组内。高数据速率端口之间的带宽时隙的动态分配使得能够有效地利用有限的存储器带宽资源。

5. 发明授权

US06243020B1 Method and apparatus for programmably driving an LED display 失效
标题翻译：用于可编程地驱动LED显示器的方法和装置
公开(公告)号：US06243020B1
公开(公告)日：2001-06-05
申请号：US08992918
申请日：1997-12-18
申请人： Ian Lam , Philip Simmons , Denise Kerstein
发明人： Ian Lam , Philip Simmons , Denise Kerstein
IPC分类号： G08B500
CPC分类号： H04L49/3009 , G06F13/1605 , G06F13/24 , G11C11/412 , H04L12/1863 , H04L12/4641 , H04L12/4645 , H04L12/467 , H04L41/0213 , H04L47/50 , H04L47/6225 , H04L49/103 , H04L49/201 , H04L49/25 , H04L49/255 , H04L49/30 , H04L49/3027 , H04L49/3054 , H04L49/351 , H04L49/354 , H04L49/40 , H04L49/50 , H04L49/552 , H04L49/555 , H04L49/90 , H04L49/901 , H04L49/9047 , H04L49/9063 , H04L49/9073 , H04L49/9078 , H04L49/9084 , H04Q3/54591 , H04Q2213/1316 , H04Q2213/13162
摘要： A method and apparatus for programmably driving a light-emitting diode(LED) display stores a display configuration in a register. The register contains the information identifying for which conditions in the system will status information be provided to LED drivers. When used in a system such as an Ethernet network multiport switch, for example, the status information for only those conditions and those ports identified by the display configuration stored in the configuration register will be displayed, even though status is collected for more conditions in the system.
摘要翻译：用于可编程地驱动发光二极管（LED）显示器的方法和装置将显示配置存储在寄存器中。该寄存器包含识别系统将哪些条件将状态信息提供给LED驱动器的信息。例如，当在诸如以太网网络多端口交换机的系统中使用时，将显示仅存储在配置寄存器中的那些条件的状态信息和由存储在配置寄存器中的显示配置识别的那些端口，即使在更多的条件下收集状态系统。

6. 发明授权

US06957270B1 Method and apparatus for performing flow control across multiple network devices 有权
标题翻译：用于跨多个网络设备执行流量控制的方法和装置
公开(公告)号：US06957270B1
公开(公告)日：2005-10-18
申请号：US09760299
申请日：2001-01-16
申请人： Bahadir Erimli , Ian Lam
发明人： Bahadir Erimli , Ian Lam
IPC分类号： G08F15/16
CPC分类号： H04L47/10 , H04L47/11 , H04L47/122 , H04L47/26
摘要： A number of network devices that control the communication of data frames between stations in a network are cascaded together to support a number of network stations. When a first device receives a data frame destined for a port on a second device, the first device transfers the data frame to the second device. The second device stores receive port information transmitted with the data frame and processes the data frame. If the second device identifies a congestion condition associated with processing the data, the second device transmits the receive port information back to the first device. The first device then performs a flow control-related operation on the port identified by the receive port information.
摘要翻译：控制网络中的站之间的数据帧的通信的多个网络设备被级联在一起以支持多个网络站。当第一设备接收去往第二设备上的端口的数据帧时，第一设备将数据帧传送到第二设备。第二设备存储与数据帧一起发送的接收端口信息并处理该数据帧。如果第二设备识别与处理数据相关联的拥塞状况，则第二设备将接收端口信息发送回第一设备。然后，第一设备对由接收端口信息标识的端口执行流控制相关操作。

7. 发明授权

US06442137B1 Apparatus and method in a network switch for swapping memory access slots between gigabit port and expansion port 失效
标题翻译：用于交换千兆端口和扩展端口之间的存储器访问槽的网络交换机中的装置和方法
公开(公告)号：US06442137B1
公开(公告)日：2002-08-27
申请号：US09317143
申请日：1999-05-24
申请人： Ching Yu , Xiaohua Zhuang , Bahadir Erimli , John M. Chiang , Shashank Merchant , Robert Williams , Edward Yang , Chandan Egbert , Vallath Nandakumar , Ian Lam , Eric Tsin-Ho Leung
发明人： Ching Yu , Xiaohua Zhuang , Bahadir Erimli , John M. Chiang , Shashank Merchant , Robert Williams , Edward Yang , Chandan Egbert , Vallath Nandakumar , Ian Lam , Eric Tsin-Ho Leung
IPC分类号： H04L522
CPC分类号： H04L49/901 , H04L49/103 , H04L49/3027 , H04L49/351 , H04L49/352 , H04L49/90 , H04L49/9031 , H04L49/9078
摘要： A network switch having switch ports for full-duplex communication of data packets with respective network nodes according to Ethernet (IEEE 802.3) protocol that allocates a prescribed number of external memory bandwidth slots between high data rate ports based on the compared amount of network traffic on the respective ports. A scheduler within an external memory interface initially assigns memory access slots to the respective high data rate ports according to a prescribed sequence. If the scheduler subsequently detects that the network data traffic on a port having less slots is higher than the traffic on a port having more slots, the slots are swapped between the high data rate ports. Additionally, a clock multiplexer in one of the high data rate ports adjusts the data rate of the port dependent upon the number of slots assigned to that port. The swapping of bandwidth slots between the high data rate ports along with the adjustment of the port clock rate enables the efficient use of limited memory bandwidth resources.
摘要翻译：网络交换机具有用于根据以太网（IEEE 802.3）协议的具有各网络节点的数据分组全双工通信的交换机端口，该协议基于网络流量的比较量在高数据速率端口之间分配规定数量的外部存储器带宽时隙各个端口。外部存储器接口中的调度器根据规定的顺序，初始地将存储器访问时隙分配给相应的高数据速率端口。如果调度器随后检测到具有较少时隙的端口上的网络数据流量高于具有更多时隙的端口上的流量，则这些时隙在高数据速率端口之间交换。此外，高数据速率端口之一中的时钟多路复用器根据分配给该端口的时隙数来调整端口的数据速率。在高数据速率端口之间交换带宽时隙以及端口时钟速率的调整使得能够有效地使用有限的存储器带宽资源。

8. 发明授权

US06345371B1 Method of performing diagnostic procedures on a queue structure 有权
标题翻译：在队列结构上执行诊断程序的方法
公开(公告)号：US06345371B1
公开(公告)日：2002-02-05
申请号：US09304958
申请日：1999-05-05
申请人： Ian Lam
发明人： Ian Lam
IPC分类号： G11C2900
CPC分类号： G06F11/2273 , G06F11/25 , G11C29/003 , H04L43/50
摘要： A method and apparatus are disclosed for testing the functionality of a queue structure. An input circuit is provided for inputting data into an input portion of the queue structure, while an output circuit is provided for retrieving data from an output portion of the queue structure. A comparison logic circuit compares the retrieved data with the input data to determine the integrity of the data that was stored in the queue structure and verify that the data from the output portion is identical to the data input to the queue. Various embodiments are disclosed for testing queue structure both in real time and in a test mode.
摘要翻译：公开了一种用于测试队列结构的功能的方法和装置。提供输入电路用于将数据输入队列结构的输入部分，同时提供输出电路用于从队列结构的输出部分检索数据。比较逻辑电路将检索到的数据与输入数据进行比较，以确定存储在队列结构中的数据的完整性，并验证来自输出部分的数据是否与输入队列的数据相同。公开了用于在实时和测试模式下测试队列结构的各种实施例。

9. 发明授权

US07031305B1 Apparatus and method for programmable memory access slot assignment 有权
标题翻译：可编程存储器存取槽分配的装置和方法
公开(公告)号：US07031305B1
公开(公告)日：2006-04-18
申请号：US09317156
申请日：1999-05-24
申请人： Ching Yu , Xiaohua Zhuang , Bahadir Erimli , John M. Chiang , Shashank Merchant , Robert Williams , Edward Yang , Chandan Egbert , Vallath Nandakumar , Ian Lam , Eric Tsin-Ho Leung
发明人： Ching Yu , Xiaohua Zhuang , Bahadir Erimli , John M. Chiang , Shashank Merchant , Robert Williams , Edward Yang , Chandan Egbert , Vallath Nandakumar , Ian Lam , Eric Tsin-Ho Leung
IPC分类号： H04L12/28
CPC分类号： H04L49/351 , H04L49/205 , H04L49/3027 , H04L49/354
摘要： A network switch having switch ports for full-duplex communication of data packets with respective network nodes according to Ethernet (IEEE 802.3) protocol that flexibly assigns memory access slots to access an external memory according to programmable information. A scheduler within an external memory interface assigns the memory access slots to the respective network switch ports according to a programmed sequence written into an assignment table memory from an external programmable data storage device.
摘要翻译：根据以太网（IEEE 802.3）协议，具有根据可编程信息灵活地分配存储器访问时隙以访问外部存储器的数据分组与各网络节点全双工通信的交换机端口的网络交换机。外部存储器接口中的调度器根据从外部可编程数据存储设备写入指配表存储器的编程序列，将存储器访问时隙分配给相应的网络交换机端口。

10. 发明授权

US06553027B1 Apparatus and method for cascading multiple network switch devices 有权
标题翻译：用于级联多个网络交换设备的装置和方法
公开(公告)号：US06553027B1
公开(公告)日：2003-04-22
申请号：US09315971
申请日：1999-05-21
申请人： Ian Lam , Eric Tsin-Ho Leung
发明人： Ian Lam , Eric Tsin-Ho Leung
IPC分类号： H04Q1100
CPC分类号： H04L49/352 , H04L49/30 , H04L49/3054 , H04L49/354 , H04L49/45
摘要： An arrangement and method of operating a network switch arrangement in a packet switched network connects a plurality of multiport network switches which is in a circular, serial manner so that data is transferable between the network switches only unidirectionally. When it is determined that data is to be transmitted from a first network switch to a port in a second network switch, the data is transmitted over an expansion bus from the first network switch to the second network switch in a continuous stream of data bursts. This extremely fast transmission between the networks switches allows multiple multiport network switches to be cascaded together to effectively form a single network switch with at least twice as many ports.
摘要翻译：在分组交换网络中操作网络交换机配置的布置和方法连接多个多端口网络交换机，它们是循环的串行方式，从而数据只能单向传输到网络交换机之间。当确定数据将从第一网络交换机发送到第二网络交换机中的端口时，数据通过扩展总线从数据突发的连续流中从第一网络交换机传输到第二网络交换机。网络交换机之间的这种非常快速的传输允许多个多端口网络交换机级联在一起，以有效地形成具有至少两倍的端口的单个网络交换机。

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