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1. 发明申请

WO2021254241A1 PHASE CHANGE DEVICE 审中-公开
公开(公告)号：WO2021254241A1
公开(公告)日：2021-12-23
申请号：PCT/CN2021/099344
申请日：2021-06-10
申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION , IBM (CHINA) CO., LIMITED
发明人： LI, Ning , SADANA, Devendra, K.
IPC分类号： H01L45/00 , G11C11/5678 , G11C13/0004 , G11C13/0069 , G11C13/0097 , G11C2013/0092 , G11C2213/50 , H01L45/06 , H01L45/1233 , H01L45/128 , H01L45/14 , H01L45/1608
摘要： A phase change device (PCD) has a first and second semiconductor layer. The first semiconductor layer made of a first semiconductor material and has a first semiconductor thickness, a first interface surface, and a first electrode surface. The first interface surface and first electrode surface are on opposite sides of the first semiconductor layer. The first semiconductor material can transition between a first amorphous state and a first crystalline state at one or more first conditions. The second semiconductor layer is made of a second semiconductor material and has a second semiconductor thickness, a second interface surface, and a second electrode surface. The second interface surface and second electrode surface are on opposite sides of the second semiconductor layer. The first interface surface and the second interface surface are in electrical, physical, and chemical contact with one another at an interface. The second semiconductor material can transition between a second amorphous state and a second crystalline state at one or more second conditions. A first electrode in physical and electrical contact with the first electrode surface of the first semiconductor layer and a second electrode in physical and electrical contact with the second electrode surface of the second semiconductor layer. The first conditions and second conditions are different. Therefore, the first and second semiconductor materials can be in different amorphous and/or crystalline states. The layers can have split amorphous/crystalline states. By controlling how the layers are split, the PCD can be in different resistive states.

2. 发明申请

WO2012173816A1 UNIFORMLY DISTRIBUTED SELF-ASSEMBLED CONE-SHAPED PILLARS FOR HIGH EFFICIENCY SOLAR CELLS 审中-公开
标题翻译：用于高效太阳能电池的均匀分布自组装式锥形支架
公开(公告)号：WO2012173816A1
公开(公告)日：2012-12-20
申请号：PCT/US2012/040878
申请日：2012-06-05
申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION , DIMITRAKOPOULOS, Christos , HONG, Augustin, J. , KIM, Jeehwan , SADANA, Devendra, K. , SHIU, Kuen-ting
发明人： DIMITRAKOPOULOS, Christos , HONG, Augustin, J. , KIM, Jeehwan , SADANA, Devendra, K. , SHIU, Kuen-ting
IPC分类号： H01L31/00
CPC分类号： G06F3/061 , G06F3/064 , G06F3/0647 , G06F3/0653 , G06F3/0689 , G06F11/0727 , G06F11/1076 , G06F12/02 , H01L31/02366 , H04L67/1002 , H04W8/04 , H04W8/065 , Y02E10/50
摘要： A method for fabricating a photovoltaic device includes applying (206) a diblock copolymer layer on a substrate and removing a first polymer material from the diblock copolymer layer to form a plurality of distributed pores. A pattern forming layer is deposited (212) on a remaining surface of the diblock copolymer layer and in the pores in contact with the substrate. The diblock copolymer layer is lifted off (214) and portions of the pattern forming layer are left in contact with the substrate. The substrate is etched (216) using the pattern forming layer to protect portions of the substrate to form pillars in the substrate such that the pillars provide a radiation absorbing structure in the photovoltaic device.
摘要翻译：制造光伏器件的方法包括将二嵌段共聚物层施加（206）到基底上，并从二嵌段共聚物层除去第一聚合物材料以形成多个分布孔。在二嵌段共聚物层的剩余表面和与基材接触的孔中沉积图案形成层（212）。将二嵌段共聚物层剥离（214），并且图案形成层的部分与基材保持接触。使用图案形成层来蚀刻（216）衬底，以保护衬底的部分以在衬底中形成柱状，使得柱在光伏器件中提供辐射吸收结构。

3. 发明申请

WO2009108479A1 POROUS SILICON QUANTUM DOT PHOTODETECTOR 审中-公开
标题翻译：多孔硅量子点光源
公开(公告)号：WO2009108479A1
公开(公告)日：2009-09-03
申请号：PCT/US2009/033517
申请日：2009-02-09
申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION , HOVEL, Harold, J. , DE SOUZA, Joel, P. , SADANA, Devendra, K.
发明人： HOVEL, Harold, J. , DE SOUZA, Joel, P. , SADANA, Devendra, K.
IPC分类号： H01L31/00
CPC分类号： H01L31/035281 , B82Y20/00 , H01L31/022425 , H01L31/0296 , H01L31/0304 , H01L31/18 , Y02E10/544 , Y02P70/521
摘要： Embodiments of the present invention provide a solar energy converter, which includes a silicon layer having at least two regions of a first and a second conductivity type that form a P-N junction, at least a portion of the silicon layer being porous, and pores in the portion of porous silicon containing a semiconductor material, the semiconductor material being different from silicon; and a first and a second electrode being placed at a bottom and a top surface of the silicon layer respectively. Methods of manufacturing the same are also provided.
摘要翻译：本发明的实施例提供了一种太阳能转换器，其包括具有形成PN结的至少两个第一和第二导电类型的区域的硅层，至少一部分硅层是多孔的，并且孔中的孔含有半导体材料的多孔硅的部分，所述半导体材料与硅不同; 以及分别设置在硅层的底部和顶面的第一和第二电极。还提供了制造方法。

4. 发明申请

WO2006017640A1 METHOD OF FORMING STRAINED SILICON MATERIALS WITH IMPROVED THERMAL CONDUCTIVITY 审中-公开
标题翻译：形成具有改善的导热性的应变硅材料的方法
公开(公告)号：WO2006017640A1
公开(公告)日：2006-02-16
申请号：PCT/US2005/027691
申请日：2005-08-04
申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION , BEDELL, Stephen, W. , CHEN, Huajie , FOGEL, Keith , MITCHELL, Ryan, M. , SADANA, Devendra, K.
发明人： BEDELL, Stephen, W. , CHEN, Huajie , FOGEL, Keith , MITCHELL, Ryan, M. , SADANA, Devendra, K.
IPC分类号： H01L21/36
CPC分类号： H01L29/1054 , H01L21/02381 , H01L21/0245 , H01L21/02507 , H01L21/02532
摘要： A method is disclosed for forming a strained Si layer on SiGe, where the SiGe layer has improved thermal conductivity. A first layer (41) of Si or Ge is deposited on a substrate (10) in a first depositing step; a second layer (42) of the other element is deposited on the first layer in a second depositing step; and the first and second depositing steps are repeated so as to form a combined SiGe layer (50) having a plurality of Si layers and a plurality of Ge layers (41-44). The respective thicknesses of the Si layers and Ge layers are in accordance with a desired composition ratio of the combined SiGe layer. The combined SiGe layer (50) is characterized as a digital alloy of Si and Ge having a thermal conductivity greater than that of a random alloy of Si and Ge. This method may further include the step of depositing a Si layer (61) on the combined SiGe layer (50); the combined SiGe layer is characterized as a relaxed SiGe layer, and the Si layer (61) is a strained Si layer. For still greater thermal conductivity in the SiGe layer, the first layer and second layer may be deposited so that each layer consists essentially of a single isotope.
摘要翻译：公开了一种在SiGe上形成应变Si层的方法，其中SiGe层具有改善的导热性。在第一沉积步骤中，在衬底（10）上沉积Si或Ge的第一层（41）另一元件的第二层（42）在第二沉积步骤中沉积在第一层上; 并且重复第一和第二沉积步骤以形成具有多个Si层和多个Ge层（41-44）的组合SiGe层（50）。 Si层和Ge层的各自的厚度根据组合的SiGe层的期望组成比。组合的SiGe层（50）的特征在于具有大于Si和Ge的随机合金的热导率的Si和Ge的数字合金。该方法还可以包括在组合SiGe层（50）上沉积Si层（61）的步骤。组合的SiGe层被表征为弛豫的SiGe层，并且Si层（61）是应变Si层。对于SiGe层中的更高的热导率，可以沉积第一层和第二层，使得每层基本上由单一同位素组成。

5. 发明申请

WO2014008409A1 FLEXIBLE III-V SOLAR CELL STRUCTURE 审中-公开
标题翻译：柔性III-V太阳能电池结构
公开(公告)号：WO2014008409A1
公开(公告)日：2014-01-09
申请号：PCT/US2013/049343
申请日：2013-07-03
申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION
发明人： BEDELL, Stephen, W. , CHENG, Cheng-Wei , HEKMATSHOARTABARI, Bahman , LI, Ning , SADANA, Devendra, K. , SHAHRJERDI, Davood
IPC分类号： H01L31/00
CPC分类号： H01L31/06875 , H01L21/02381 , H01L21/02433 , H01L21/02461 , H01L21/02463 , H01L21/02505 , H01L21/02543 , H01L21/02546 , H01L21/02664 , H01L31/03042 , H01L31/0735 , H01L31/1844 , Y02E10/544 , Y02P70/521
摘要： Solar cell structures include stacked layers in reverse order on a germanium substrate wherein a n++ (In)GaAs buffer layer plays dual roles as buffer and contact layers in the inverted structures. The absorbing layers employed in such exemplary structures are III-V layers such as (In)GaAs. Controlled spalling may be employed as part of the fabrication process for the solar cell structures, which may be single or multi- junction. The requirement for etching a buffer layer is eliminated, thereby facilitating the manufacturing process of devices using the disclosed structures.
摘要翻译：太阳能电池结构在锗衬底上以相反的顺序包括堆叠层，其中n ++（In）GaAs缓冲层在倒置结构中起缓冲层和接触层的双重作用。在这种示例性结构中采用的吸收层是III-V层，例如（In）GaAs。可以采用受控的剥落作为太阳能电池结构的制造过程的一部分，其可以是单结或多结。消除了蚀刻缓冲层的要求，从而便于使用公开的结构的器件的制造过程。

6. 发明申请

WO2012173814A1 TANDEM SOLAR CELL WITH IMPROVED TUNNEL JUNCTION 审中-公开
标题翻译： TANDEM太阳能电池与改进的隧道结
公开(公告)号：WO2012173814A1
公开(公告)日：2012-12-20
申请号：PCT/US2012/040873
申请日：2012-06-05
申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION , ABOU-KANDIL, Ahmed , FOGEL, Keith, E. , HONG, Augustin, J. , KIM, Jeehwan , SADANA, Devendra, K.
发明人： ABOU-KANDIL, Ahmed , FOGEL, Keith, E. , HONG, Augustin, J. , KIM, Jeehwan , SADANA, Devendra, K.
IPC分类号： H01L31/00
CPC分类号： H01L31/077 , H01L31/075 , H01L31/1812 , H01L31/1824 , Y02E10/545 , Y02E10/548 , Y02P70/521
摘要： A photovoltaic device and method for fabricating a photovoltaic device include forming a light-absorbing semiconductor structure on a transmissive substrate including a first doped layer (406) and forming an intrinsic layer (410) on the first doped layer, wherein the intrinsic layer includes an amorphous material. The intrinsic layer is treated (412) with a plasma to form seed sites. A first tunnel junction layer is formed (414) on the intrinsic layer by growing microcrystals from the seed sites.
摘要翻译：一种用于制造光伏器件的光电器件和方法包括在包括第一掺杂层（406）的透射衬底上形成光吸收半导体结构，并在第一掺杂层上形成本征层（410），其中本征层包括无定形材料。用等离子体处理（412）本征层以形成种子位点。通过从种子位点生长微晶，在本征层上形成第一隧道结层（414）（414）。

7. 发明申请

WO2010016956A1 CRYSTALLINE SILICON SUBSTRATES WITH IMPROVED MINORITY CARRIER LIFETIME 审中-公开
标题翻译：具有改进的少数载体寿命的晶体硅衬底
公开(公告)号：WO2010016956A1
公开(公告)日：2010-02-11
申请号：PCT/US2009/041506
申请日：2009-04-23
申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION , DE SOUZA, Joel, P. , HOVEL, Harold, John , INNS, Daniel, A. , SADANA, Devendra, K. , SHAHIDI, Ghavam, G.
发明人： DE SOUZA, Joel, P. , HOVEL, Harold, John , INNS, Daniel, A. , SADANA, Devendra, K. , SHAHIDI, Ghavam, G.
IPC分类号： H01L21/322
CPC分类号： H01L21/3225 , H01L21/02032
摘要： A method for improving the minority lifetime of silicon containing wafer having metallic contaminants therein is described incorporating annealing at 1200°C or greater and providing a gaseous ambient of oxygen, an inert gas and a chlorine containing gas such as HCl.
摘要翻译：描述了一种用于改善其中具有金属污染物的含硅晶片的少数寿命的方法，其包括在1200℃或更高温度下退火并提供氧气，惰性气体和含氯气体如HCl的气态环境。

8. 发明申请

WO2012118577A1 TANDEM SOLAR CELL WITH IMPROVED ABSORPTION MATERIAL 审中-公开
标题翻译：具有改进吸收材料的TANDEM太阳能电池
公开(公告)号：WO2012118577A1
公开(公告)日：2012-09-07
申请号：PCT/US2012/022708
申请日：2012-01-26
申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION , GUNAWAN, Oki , KIM, Jeehwan , MITZI, David, B. , SADANA, Devendra, K. , TODOROV, Teodor, K.
发明人： GUNAWAN, Oki , KIM, Jeehwan , MITZI, David, B. , SADANA, Devendra, K. , TODOROV, Teodor, K.
IPC分类号： H01L31/0256
CPC分类号： H01L31/0326 , C23C14/34 , C25D7/12 , H01L31/076 , H01L31/078 , H01L31/18 , H01L31/20 , Y02E10/548
摘要： A photosensitive device and method includes a top cell (102) having an N-type layer, a P-type layer and a top intrinsic layer therebetween. A bottom cell (104) includes an N-type layer, a P-type layer and a bottom intrinsic layer therebetween. The bottom intrinsic layer includes a Cu-Zn-Sn containing chalcogenide (116).
摘要翻译：感光装置和方法包括具有N型层的顶层单元（102），P型层和其间的顶层本征层。底部单元（104）包括N型层，P型层和底层本征层。底部本征层包括含有Cu-Zn-Sn的硫族化物（116）。

9. 发明申请

WO2006003061A1 STRAINED SILICON-ON-INSULATOR BY ANODIZATION OF A BURIED p+ SILICON GERMANIUM LAYER 审中-公开
标题翻译：通过阳极氧化P +硅锗层的分级制备的绝缘硅绝缘体
公开(公告)号：WO2006003061A1
公开(公告)日：2006-01-12
申请号：PCT/EP2005/052424
申请日：2005-05-27
申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION , Compagnie IBM France , ADAM, Thomas, N , BEDELL, Stephen, W. , DE SOUZA, Joel, P. , FOGEL, Keith, E. , REZNICEK, Alexander , SADANA, Devendra, K. , SHAHIDI, Ghavam
发明人： ADAM, Thomas, N , BEDELL, Stephen, W. , DE SOUZA, Joel, P. , FOGEL, Keith, E. , REZNICEK, Alexander , SADANA, Devendra, K. , SHAHIDI, Ghavam
IPC分类号： H01L21/762
CPC分类号： H01L21/76259 , Y10S438/967
摘要： A cost efficient and manufacturable method of fabricating strained semiconductor-on-insulator (SSOI) substrates is provided that avoids wafer bonding. The method includes growing various epitaxial semiconductor layers on a substrate, wherein at least one of the semiconductor layers is a doped and relaxed semiconductor layer underneath a strained semiconductor layer; converting the doped and relaxed semiconductor layer into a porous semiconductor via an electrolytic anodization process, and oxidizing to convert the porous semiconductor layer into a buried oxide layer. The method provides a SSOI substrate that includes a relaxed semiconductor layer on a substrate; a high-quality buried oxide layer on the relaxed semiconductor layer; and a strained semiconductor layer on the high-quality buried oxide layer. In accordance with the present invention, the relaxed semiconductor layer and the strained semiconductor layer have identical crystallographic orientations.
摘要翻译：提供了制造应变半导体绝缘体（SSOI）衬底的成本有效和可制造的方法，其避免晶片接合。该方法包括在衬底上生长各种外延半导体层，其中半导体层中的至少一个是在应变半导体层下面的掺杂和弛豫半导体层; 通过电解阳极氧化处理将掺杂和松弛的半导体层转化成多孔半导体，并氧化以将多孔半导体层转化为掩埋氧化物层。该方法提供了在衬底上包括松弛半导体层的SSOI衬底; 在松弛的半导体层上形成高质量的掩埋氧化物层; 以及在高质量掩埋氧化物层上的应变半导体层。根据本发明，松弛半导体层和应变半导体层具有相同的晶体取向。

10. 发明申请

WO2005031810A2 FORMULATION OF A SILICON GERMANIUM-ON INSULATOR STRUCTURE BY OXIDATION OF A BURIED POROUS SILICON LAYER 审中-公开
标题翻译：通过氧化多孔硅层制备硅锗绝缘体结构
公开(公告)号：WO2005031810A2
公开(公告)日：2005-04-07
申请号：PCT/US2004/029378
申请日：2004-09-10
申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION , BEDELL, Stephen, W. , CHOE, Kwang, Su , FOGEL, Keith, F. , SADANA, Devendra, K.
发明人： BEDELL, Stephen, W. , CHOE, Kwang, Su , FOGEL, Keith, F. , SADANA, Devendra, K.
IPC分类号： H01L21/00
CPC分类号： H01L21/76227 , C22F1/10 , H01L21/02378 , H01L21/02381 , H01L21/0245 , H01L21/02532 , H01L21/02667 , H01L21/76245 , H01L29/78603
摘要： A simple and direct method of forming a SiGe-on-insulator that relies on the oxidation of a porous silicon layer (or region) that is created beneath a Ge-containing layer is provided. The method includes the steps of providing a structure comprising a Si-containing substrate having a hole-rich region formed therein and a Ge-containing layer atop the Si-containing substrate; converting the hole-rich region into a porous region; and annealing the structure including the porous region to provide a substantially relaxed SiGe-on-insulator material.
摘要翻译：提供一种形成依赖于在含Ge层下形成的多孔硅层（或区域）的氧化的绝缘体上硅的简单且直接的方法。该方法包括以下步骤：提供包括其中形成有富空穴的含Si衬底和含Si衬底顶部的含Ge层的结构; 将富含孔的区域转化为多孔区域; 并退火包括多孔区域的结构，以提供基本上松弛的绝缘体上的SiGe。

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