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1. 发明申请

WO2009006134A1 A METHOD OF FORMING A SUBSTRATE CORE STRUCTURE USING MICROVIA LASER DRILLING AND CONDUCTIVE LAYER PRE-PATTERNING AND SUBSTRATE CORE STRUCTURE FORMED ACCORDING TO THE METHOD 审中-公开
标题翻译：使用MICROVIA激光钻孔和导电层预先形成的基板结构的方法和根据该方法形成的基板结构
公开(公告)号：WO2009006134A1
公开(公告)日：2009-01-08
申请号：PCT/US2008/068111
申请日：2008-06-25
申请人： INTEL CORPORATION , LI, Yonggang , SALAMA, Islam , GURUMURTHY, Charan , AZIMI, Hamid
发明人： LI, Yonggang , SALAMA, Islam , GURUMURTHY, Charan , AZIMI, Hamid
IPC分类号： H05K3/46 , H05K3/00
CPC分类号： H05K1/115 , H05K1/0298 , H05K1/0306 , H05K1/18 , H05K3/0032 , H05K3/0035 , H05K3/0038 , H05K3/426 , H05K3/427 , H05K3/429 , H05K3/4644 , H05K3/4652 , H05K2201/0394 , H05K2201/09563 , H05K2201/0959 , H05K2201/0969 , Y10T29/49126 , Y10T29/49155 , Y10T29/49165
摘要： A method of fabricating a substrate core structure comprises: providing first and second patterned conductive layers defining openings therein on each side of a starting insulating layer; providing a first and a second supplemental insulating layers onto respective ones of a first and a second patterned conductive layer; laser drilling a set of via openings extending through at least some of the conductive layer openings of the first and second patterned conductive layers; filling the set of via openings with a conductive material to provide a set of conductive vias; and providing a first and a second supplemental patterned conductive layer onto respective ones of the first and the second supplemental insulating layers, the set of conductive vias contacting the first supplemental patterned conductive layer at one side thereof, and the second supplemental patterned conductive layer at another side thereof.
摘要翻译：制造衬底芯结构的方法包括：在起始绝缘层的每一侧上提供限定开口的第一和第二图案化导电层; 在第一和第二图案化导电层的相应的一个上提供第一和第二辅助绝缘层; 激光钻孔延伸穿过第一和第二图案化导电层的至少一些导电层开口的一组通孔; 用导电材料填充该组通孔开口以提供一组导电通路; 以及将第一和第二辅助图案化导电层提供到第一和第二辅助绝缘层的相应的第一和第二补充绝缘层上，该导电通孔的一侧接触第一补充图案化导电层，另一侧接触第二补充图案化导电层侧。

2. 发明申请

WO2009006065A1 A METHOD OF FORMING A MULTILAYER SUBSTRATE CORE STRUCTURE USING SEQUENTIAL MICROVIA LASER DRILLING AND SUBSTRATE CORE STRUCTURE FORMED ACCORDING TO THE METHOD 审中-公开
标题翻译：使用顺序的微晶激光钻孔形成多层底物核心结构的方法和根据该方法形成的基底核心结构
公开(公告)号：WO2009006065A1
公开(公告)日：2009-01-08
申请号：PCT/US2008/067847
申请日：2008-06-23
申请人： INTEL CORPORATION , LI, Yonggang , SALAMA, Islam , GURUMURTHY, Charan
发明人： LI, Yonggang , SALAMA, Islam , GURUMURTHY, Charan
IPC分类号： H05K3/46 , H05K3/00
CPC分类号： H05K3/422 , H05K3/0035 , H05K3/4602 , H05K3/4652 , H05K2201/0394 , H05K2201/09563 , Y10T29/49128 , Y10T29/49165
摘要： A method of fabricating a substrate core structure, and a substrate core structure formed according to the method. The method includes: laser drilling a first set of via openings through a starting insulating layer; filling the first set of via openings with a conductive material to provide a first set of conductive vias; providing first and second patterned conductive layers on opposite sides of the starting insulating layer; providing a supplemental insulating layer onto the first patterned conductive layer; laser drilling a second set of via openings through the supplemental insulating layer; filling the second set of via openings with a conductive material to provide a second set of conductive vias; and providing a supplemental patterned conductive layer onto an exposed side of the supplemental insulating layer, the second set of conductive vias contacting the first patterned conductive layer and the supplemental patterned conductive layer at opposite sides thereof.
摘要翻译：一种制造衬底芯结构的方法，以及根据该方法形成的衬底芯结构。该方法包括：通过起始绝缘层激光钻探第一组通路孔; 用导电材料填充第一组通孔开口以提供第一组导电通孔; 在起始绝缘层的相对侧上提供第一和第二图案化导电层; 在所述第一图案化导电层上提供补充绝缘层; 激光钻穿通过补充绝缘层的第二组通孔; 用导电材料填充第二组通孔开口以提供第二组导电通路; 以及在所述补充绝缘层的暴露侧上提供补充图案化导电层，所述第二组导电通孔在其相对侧与所述第一图案化导电层和所述补充图案化导电层接触。

3. 发明申请

WO2013095556A1 CONFIGURATION OF ACOUSTO-OPTIC DEFLECTORS FOR LASER BEAM SCANNING 审中-公开
标题翻译：用于激光光束扫描的光学反射器的配置
公开(公告)号：WO2013095556A1
公开(公告)日：2013-06-27
申请号：PCT/US2011/067001
申请日：2011-12-22
申请人： INTEL CORPORATION , LI, Yonggang , SALAMA, Islam , ZHANG, Chong
发明人： LI, Yonggang , SALAMA, Islam , ZHANG, Chong
IPC分类号： G02B26/10
CPC分类号： G02B26/10 , B23K2201/42 , G02F1/33 , G02F2001/291 , G02F2201/16
摘要： A first acousto-optic deflector receives a laser beam. The first acousto-optic deflector diffracts the received laser beam along a first axis. A second acousto-optic deflector receives the diffracted laser beam. The second acousto-optic deflector diffracts the received diffracted laser beam along a second axis.
摘要翻译：第一声光偏转器接收激光束。第一声光偏转器沿着第一轴衍射接收的激光束。第二声光偏转器接收衍射激光束。第二声光偏转器沿着第二轴衍射所接收的衍射激光束。

4. 发明申请

WO2012078335A2 HYBRID-CORE THROUGH HOLES AND VIAS 审中-公开
标题翻译：通过孔和VIAS的混合核心
公开(公告)号：WO2012078335A2
公开(公告)日：2012-06-14
申请号：PCT/US2011/061239
申请日：2011-11-17
申请人： INTEL CORPORATION , ROY, Mihir K. , SALAMA, Islam A. , LI, Yonggang
发明人： ROY, Mihir K. , SALAMA, Islam A. , LI, Yonggang
IPC分类号： H05K3/46 , H05K3/40 , H01L23/12 , H01L23/045 , H01L23/055
CPC分类号： H05K3/422 , G06F1/183 , H01L23/492 , H01L23/49822 , H01L23/49827 , H01L23/49838 , H01L2924/0002 , Y10T29/49165 , H01L2924/00
摘要： A semiconductor device substrate includes a front section and back section that are laminated cores disposed on a front- and back surfaces of a first core. The first core has a cylindrical plated through hole that has been metal plated and filled with air-core material. The front- and back sections have laser-drilled tapered vias that are filled with conductive material and that are coupled to the plated through hole. The back section includes an integral inductor coil that communicates to the front section. The first core and the laminated-cores form a hybrid-core semiconductor device substrate with an integral inductor coil.
摘要翻译：半导体器件衬底包括布置在第一芯的前表面和后表面上的层压芯的前部和后部。第一个铁芯有一个镀有金属的圆柱形电镀通孔，并填充有空芯材料。前部和后部有激光钻孔的锥形过孔，充满导电材料并与镀通孔相连。后部包括一个与前部连通的整体感应线圈。第一个核心和叠层核心形成一个带有整体电感线圈的混合核心半导体器件衬底。

5. 发明申请

WO2009042741A3 METHOD OF ENABLING SELECTIVE AREA PLATING ON A SUBSTRATE 审中-公开
公开(公告)号：WO2009042741A3
公开(公告)日：2009-04-02
申请号：PCT/US2008/077612
申请日：2008-09-25
申请人： INTEL CORPORATION , BCHIR, Omar J. , JOMAA, Houssam , SALAMA, Islam A. , LI, Yonggang
发明人： BCHIR, Omar J. , JOMAA, Houssam , SALAMA, Islam A. , LI, Yonggang
IPC分类号： H01L21/306 , H01L21/304
摘要： A method of enabling selective area plating on a substrate includes forming a first electrically conductive layer (310) over substantially all of the substrate, covering sections of the first electrically conductive layer with a mask (410) such that the first electrically conductive layer has a masked portion and an unmasked portion, forming a second electrically conductive layer (710, 1210), the second electrically conductive layer forming only over the unmasked portion of the first electrically conductive layer, and removing the mask and the masked portion of the first electrically conductive layer. In an embodiment, the mask covering sections of the first electrically conductive layer is a non-electrically conductive substance (1010) applied with a stamp (1020). In an embodiment, the mask is a black oxide layer.

6. 发明申请

WO2010078058A3 METHOD OF FORMING A PATTERN ON A WORK PIECE, METHOD OF SHAPING A BEAM OF ELECTROMAGNETIC RADIATION FOR USE IN SAID METHOD, AND APERTURE FOR SHAPING A BEAM OF ELECTROMAGNETIC RADIATION 审中-公开
公开(公告)号：WO2010078058A3
公开(公告)日：2010-07-08
申请号：PCT/US2009/068578
申请日：2009-12-17
申请人： INTEL CORPORATION , LI, Yonggang , SALAMA, Islam
发明人： LI, Yonggang , SALAMA, Islam
IPC分类号： B23K26/06 , H01L21/027
摘要： A method of forming a pattern (700) on a work piece (1260) includes placing a pattern mask (1210) over the work piece, placing an aperture (100, 500, 600, 1220) over the pattern mask, and placing the work piece in a beam of electromagnetic radiation (1240). The aperture includes three adjacent sections. A first section (310) has a first side (311), a second side (312), and a first length (313). A second section (320) has a third side (321) adjacent to the second side, a fourth side (322), a second length (323), and a first width (324). A third section (330) has a fifth side (331) adjacent to the fourth side, a sixth side (332), and a third length (333). The first and third lengths are substantially equal. The first and third sections are complementary shapes, as defined herein.

7. 发明申请

WO2010065301A3 METHOD OF ENABLING SELECTIVE AREA PLATING ON A SUBSTRATE 审中-公开
公开(公告)号：WO2010065301A3
公开(公告)日：2010-06-10
申请号：PCT/US2009/064898
申请日：2009-11-18
申请人： INTEL CORPORATION , LI, Yonggang , SALAMA, Islam
发明人： LI, Yonggang , SALAMA, Islam
IPC分类号： H01L21/60
摘要： A method of enabling selective area plating on a substrate (201) includes forming a first electrically conductive layer (310) on the substrate, covering the electrically conductive layer with an anti-electroless plating layer (410), patterning the substrate in order to form therein a feature (510, 520) extending through the anti-electroless plating layer and the first electrically conductive layer, forming a second electrically conductive layer (610) adjoining and electrically connected to the first electrically conductive layer, forming a third electrically conductive layer (710) over the second electrically conductive layer, and removing the anti-electroless plating layer and the first electrically conductive layer.

8. 发明申请

WO2009032390A2 METHOD OF PROVIDING PATTERNED EMBEDDED CONDUCIVE LAYER USING LASER AIDED ETCHING OF DIELECTRIC BUILD-UP LAYER 审中-公开
标题翻译：使用激光辅助蚀刻构建层提供图案化嵌入的有源层的方法
公开(公告)号：WO2009032390A2
公开(公告)日：2009-03-12
申请号：PCT/US2008/068149
申请日：2008-06-25
申请人： INTEL CORPORATION , LI, Yonggang
发明人： LI, Yonggang
CPC分类号： H05K3/0032 , H05K3/0035 , H05K3/0055 , H05K3/107 , H05K3/465 , H05K2203/0796
摘要： A method of providing a patterned conductive layer. The method includes: providing a build-up layer comprising an insulating material; laser irradiating selected portions of the build-up layer according to a predetermined pattern of the patterned conductive layer to be provided, laser irradiating comprising using a laser beam having a photon energy higher than a bonding energy of at least some of the chemical bonds of the insulating material to yield predetermined laser-weakened portions of the build-up layer according to the predetermined pattern; removing the laser-weakened portions of the build-up layer to yield recesses according to the predetermined pattern; and filling the recesses with a conductive material to yield the patterned conductive layer.
摘要翻译：一种提供图案化导电层的方法。该方法包括：提供包含绝缘材料的积层; 根据待提供的图案化导电层的预定图案，激光照射构建层的选定部分;激光照射包括使用光子能量高于光子能量的至少一些化学键的键能的激光束; 以根据预定图案产生积层的预定激光削弱部分; 根据预定图案去除积聚层的激光削弱部分以产生凹陷; 并用导电材料填充凹槽以产生图案化的导电层。

9. 发明申请

WO2018063398A1 METAL BASED CERAMIC FILLERS AS CATALYSTS FOR SELECTIVE ELECTROLESS METAL PLATING 审中-公开
标题翻译：金属基陶瓷填料作为选择性化学镀金属的催化剂
公开(公告)号：WO2018063398A1
公开(公告)日：2018-04-05
申请号：PCT/US2016/055019
申请日：2016-09-30
申请人： INTEL CORPORATION , RAGHUNATHAN, Vivek , LI, Yonggang
发明人： RAGHUNATHAN, Vivek , LI, Yonggang
IPC分类号： H01L21/768
摘要： Embodiments include methods for selective electroless plating of dielectric layers and devices formed by such processes. According to an embodiment, patterned surfaces are formed in a dielectric layer that includes metallic ceramic fillers. In some embodiments, the patterned surfaces form a line opening and a via opening that exposes a conductive pad. In an embodiment, the metallic ceramic fillers are activated to form activated surfaces over the patterned surfaces. A first metal is then deposited into the via opening with a first electroless solution that is a bottom-up deposition process. Thereafter, embodiments include forming a seed layer over exposed portions of the activated surfaces. In an embodiment, mid-gap states of the activated surfaces have an energy level approximately equal to a reduction potential of metal ions in a second electroless solution. Embodiments may then include depositing a second metal into the via opening with a third electroless solution.
摘要翻译：实施方式包括用于选择性无电镀电介质层和通过这些工艺形成的器件的方法。根据一个实施例，图案化表面形成在包括金属陶瓷填料的介电层中。在一些实施例中，图案化表面形成暴露导电垫的线开口和通孔开口。在一个实施例中，金属陶瓷填料被激活以在图案化表面上形成活化表面。然后用第一种无电解决方案将第一种金属沉积到通孔开口中，该第一种无电解决方案是自底向上沉积工艺。此后，实施例包括在激活表面的暴露部分上形成种子层。在一个实施例中，激活表面的中间隙状态具有与第二无电解决方案中的金属离子的还原电位近似相等的能级。然后，实施例可以包括利用第三无电解决方案将第二金属沉积到通孔开口中。

10. 发明申请

WO2010047977A3 SAME LAYER MICROELECTRONIC CIRCUIT PATTERNING USING HYBRID LASER PROJECTION PATTERNING (LPP) AND SEMI-ADDITIVE PATTERNING (SAP) 审中-公开
公开(公告)号：WO2010047977A3
公开(公告)日：2010-04-29
申请号：PCT/US2009/060216
申请日：2009-10-09
申请人： INTEL CORPORATION , GUZEK, John , LI, Yonggang
发明人： GUZEK, John , LI, Yonggang
IPC分类号： H01L21/027
摘要： In some embodiments, same layer microelectronic circuit patterning using hybrid laser projection patterning (LPP) and semi-additive patterning (SAP) is presented. In this regard, a method is introduced including patterning a first density region of a laminated substrate surface using LPP, patterning a second density region of the laminated substrate surface using SAP, and plating the first and second density regions of the laminated substrate surface, wherein features spanning the first and second density regions are directly coupled. Other embodiments are also disclosed and claimed.

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