专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明申请

WO2013101235A1 GRAPHICS LIGHTING ENGINE INCLUDING LOG AND ANTI-LOG UNITS 审中-公开
标题翻译：图形照明发动机，包括日志和防盗单元
公开(公告)号：WO2013101235A1
公开(公告)日：2013-07-04
申请号：PCT/US2011/068265
申请日：2011-12-31
申请人： INTEL CORPORATION , SHEIKH, Farhana , MATHEW, Sanu , KRISHNAMURTHY, Ram
发明人： SHEIKH, Farhana , MATHEW, Sanu , KRISHNAMURTHY, Ram
IPC分类号： G06F17/00
CPC分类号： G06T15/50 , G06T15/506
摘要： Disclosed is an apparatus and method for generating a lighting value based on a number of lighting factors. A lighting accelerator first converts an ambient portion, a diffuse light portion, and a specular light portion of the lighting factors into the log domain. Then, data combination units operate on the lighting factors after they have been converted. Then, the lighting factors are converted back from the log domain using anti-log processing. Converting the lighting factors into the log domain is accomplished by using a series of linear equations using coefficients that are all based on powers of two, and are therefore easily calculable. Further, while in the log domain, the specular light portion of the lighting factor is operated on by a special purpose multiplier that uses a truncated partial product tree, saving area and power with only a negligible amount of error.
摘要翻译：公开了一种基于多个照明因素产生照明值的装置和方法。照明加速器首先将照明因素的环境部分，漫射光部分和镜面光部分转换成对数域。然后，数据组合单元在转换后对照明因素进行操作。然后，使用反日志处理将照明因素从日志域转换回来。将照明因子转换为对数域是通过使用一系列线性方程来实现的，这些方程全部基于二次幂，因此易于计算。此外，在对数域中，照明因子的镜面光部分由专用乘法器操作，该专用乘法器使用截断的部分乘积树，仅以可忽略的误差量来节省面积和功率。

2. 发明申请

WO2019133039A1 POLAR ENCODING AND POLAR DECODING SYSTEMS AND METHODS 审中-公开
公开(公告)号：WO2019133039A1
公开(公告)日：2019-07-04
申请号：PCT/US2018/025610
申请日：2018-03-31
申请人： INTEL CORPORATION
发明人： QIAN, Xiaoshu , TALWAR, Shilpa , SHEIMAN, Arthur , SHEIKH, Farhana , TOWNER, Daniel , TETZLAFF, Thomas , LIPKA, Dietmar , CHENG, Hong , YONA, Yair , BHARKHADA, Bharat , LUO, Lin , CHANDRASEKARAN, Ashwin , WOOD, Steven , NIKOPOUR, Hosein , XU, Tao , CHELLAKUTTIGOUNDER KULANDAIVEL, Sathishkumar , RAMACHANDRAN, Vineeth , YU, Liwen , ZHOU, Di , CHEN, Yajing
IPC分类号： G06K9/36
摘要： In encoding systems and methods, data or information is encoded using one or more encoding methodologies to generate encoded data or information corresponding to the data or information. Similarly, in decoding systems and methods, encoded data or information is decoded using one or more decoding methodologies to generate the data or information corresponding to the encoded data or information. The encoding/decoding systems and methods can include polar encoding/decoding systems and methods operable for encoding data or information to generate polar codes and for decoding polar codes to generate the corresponding data or information. The information or data can be control information and application data for communication over networks. The networks can include wireless and wireline networks, and network segments, links or channels, including mixed wireline and wireless networks.

3. 发明申请

WO2017111881A1 FAST FOURIER TRANSFORM ARCHITECTURE 审中-公开
标题翻译：快速傅立叶变换结构
公开(公告)号：WO2017111881A1
公开(公告)日：2017-06-29
申请号：PCT/US2015/066963
申请日：2015-12-21
申请人： INTEL CORPORATION
发明人： SHEIKH, Farhana , SHARMA, Ankit , KULKARNI, Jaydeep
IPC分类号： H04L27/26 , G06F17/14
CPC分类号： H04L27/263 , G06F17/142
摘要： A calculation circuit for calculating a transform of an input sequence may include a plurality of butterfly computation circuits configured to perform a plurality of butterfly computations and to produce a plurality of outputs during each of a plurality of computation stages, a wired routing network configured to route a first plurality of outputs of the plurality of butterfly computation circuits from a first computation stage of the plurality of computation stages as input to the plurality of butterfly computation circuits during a second computation stage of the plurality of computation stages according to a reconfigurable routing configuration, and routing control circuitry configured to modify the reconfigurable routing configuration for a third computation stage of the plurality of computation stages.
摘要翻译：用于计算输入序列的变换的计算电路可以包括多个蝶形运算电路，该多个蝶形运算电路被配置为执行多个蝶形运算并且在多个计算阶段中的每一个阶段期间产生多个输出有线路由网络，其被配置为在多个计算级的第一计算级期间将多个计算级中的第一计算级的第一多个输出作为输入发送到多个蝶形计算电路根据可重新配置的路由配置来执行阶段;以及路由控制电路，其被配置为修改用于所述多个计算阶段中的第三计算阶段的可重新配置路由配置。

4. 发明申请

WO2018174877A1 SPINTRONIC DEVICES, DUPLEXERS, TRANSCEIVERS AND TELECOMMUNICATION DEVICES 审中-公开
公开(公告)号：WO2018174877A1
公开(公告)日：2018-09-27
申请号：PCT/US2017/023694
申请日：2017-03-23
申请人： INTEL CORPORATION
发明人： DORRANCE, Richard , SHEIKH, Farhana
IPC分类号： H01L43/02 , H01L43/08 , H04B1/44
摘要： A spintronic device includes a first ferromagnetic layer. The first ferromagnetic layer includes a first direction of magnetic polarization. Furthermore, the spintronic device includes a second ferromagnetic layer. The second ferromagnetic layer includes a second direction of magnetic polarization opposite to the first direction. Furthermore, the spintronic device includes a long spin lifetime layer. Furthermore, the spintronic device includes a first tunnel barrier layer disposed between the first ferromagnetic layer and the long spin lifetime layer. Furthermore, the spintronic device includes a second tunnel barrier layer disposed between the second ferromagnetic layer and the long spin lifetime layer.

5. 发明申请

WO2017111853A1 HYBRID SCHEDULING AND LATCH-BASED PIPELINES FOR LOW-DENSITY PARITY-CHECK DECODING 审中-公开
标题翻译：用于低密度奇偶校验解码的混合调度和基于闩锁的管道
公开(公告)号：WO2017111853A1
公开(公告)日：2017-06-29
申请号：PCT/US2015/000424
申请日：2015-12-24
申请人： INTEL CORPORATION
发明人： CHEN, Chia-Hsing , TANG, Wei , SHEIKH, Farhana
IPC分类号： H03M13/11 , H03M13/27 , H04L1/18
CPC分类号： H03M13/116 , H03M13/1122 , H03M13/1134 , H03M13/1137 , H03M13/114 , H04L1/18
摘要： A pipeline decoding system for performing pipelined decoding of a codeword characterized by one or more parity checks may include a first pipeline stage circuit configured to process a first parity set composed of one or more first parity checks of the codeword and to process a second parity set composed of one or more second parity checks of the codeword, a second pipeline stage circuit configured to generate one or more codeword update messages for the second parity set based on a first estimate of the codeword, and a third pipeline stage circuit configured to update the first estimate of the codeword with one or more codeword update messages for the first parity set to obtain a second estimate of the codeword.
摘要翻译：用于执行以一个或多个奇偶校验为特征的码字的流水线解码的流水线解码系统可以包括：第一流水线级电路，其被配置为处理由第一奇偶校验集合的一个或多个第一奇偶校验组成的第一奇偶校验集合; 码字并且处理由所述码字的一个或多个第二奇偶校验组成的第二奇偶校验集;第二流水线级电路，被配置为基于所述码字的第一估计生成用于所述第二奇偶校验集的一个或多个码字更新消息; 第三流水线级电路，被配置为利用针对第一奇偶校验集的一个或多个码字更新消息来更新码字的第一估计，以获得码字的第二估计。

6. 发明申请

WO2015047434A1 COMPLEX-DOMAIN CHANNEL-ADAPTIVE LATTICE REDUCTION AIDED MIMO DETECTION FOR WIRELESS COMMUNICATION 审中-公开
标题翻译：用于无线通信的复杂域通道自适应衰减辅助MIMO检测
公开(公告)号：WO2015047434A1
公开(公告)日：2015-04-02
申请号：PCT/US2013/075597
申请日：2013-12-17
申请人： INTEL CORPORATION , SHEIKH, Farhana , RAHMAN, Mehnaz , SZABO-WEXLER, Elias , WANG, Wei , ALEXANDROV, Borislav , YOON, Dongmin , CHUN, Anthony, L. , ALAVI, Hossein , KRISHNAMURTHY, Ram, K.
发明人： SHEIKH, Farhana , RAHMAN, Mehnaz , SZABO-WEXLER, Elias , WANG, Wei , ALEXANDROV, Borislav , YOON, Dongmin , CHUN, Anthony, L. , ALAVI, Hossein , KRISHNAMURTHY, Ram, K.
IPC分类号： H04B7/04
CPC分类号： H04B7/0413
摘要： Various embodiments are generally directed to techniques to perform LR-aided MIMO detection using a dynamic search radius and a dynamic node expansion parameter. An apparatus for a wireless receiver includes circuitry, an LR-aided MIMO detector for execution by the circuitry to determine a plurality of estimated signals, the plurality of estimated signals corresponding to a plurality of signals transmitted through a wireless channel and received by a plurality of antennas, the LR-aided MIMO detector to determine the plurality of estimated signals based on a complex enumeration and an on-demand expansion of a two-dimensional search space, the complex enumeration limited by a search radius and the on-demand expansion limited by a node expansion parameter and a complex enumeration tuner for execution by the circuitry to dynamically modify the search radius and the node expansion parameter based on a quality corresponding to the wireless channel.
摘要翻译：各种实施例通常涉及使用动态搜索半径和动态节点扩展参数来执行LR辅助MIMO检测的技术。一种用于无线接收机的装置，包括电路，用于由电路执行以确定多个估计信号的LR辅助MIMO检测器，所述多个估计信号对应于通过无线信道发射并由多个天线，LR辅助MIMO检测器，以基于二维搜索空间的复杂枚举和按需扩展来确定多个估计信号，由搜索半径限制的复数枚举和受限于由节点扩展参数和复数枚举调谐器，用于由电路执行以基于与无线信道相对应的质量来动态地修改搜索半径和节点扩展参数。

7. 发明申请

WO2019135733A1 LOW POWER mmWAVE RECEIVER ARCHITECTURE WITH SPATIAL COMPRESSION INTERFACE 审中-公开
公开(公告)号：WO2019135733A1
公开(公告)日：2019-07-11
申请号：PCT/US2018/012066
申请日：2018-01-02
申请人： INTEL CORPORATION
发明人： ORHAN, Oner , NIKOPOUR, Hosein , SAGAZIO, Peter , SHEIKH, Farhana , NAM, Junyoung , TALWAR, Shilpa
IPC分类号： H04B7/0413 , H04L29/06
摘要： A receiver circuit associated with a communication device is disclosed. The receiver circuit comprises a digital data compression circuit configured to receive a plurality of digital receive signals derived from a plurality of analog receive signals respectively associated with the receiver circuit. The digital data compression circuit is further configured to compress the plurality of digital receive signals to form one or more compressed digital data signals based thereon, to be provided to an input output (I/O) interface associated therewith. In some embodiments, a compressed digital signal dimension associated with the one or more compressed digital data signals is less than a digital signal dimension associated with the plurality of digital receive signals.

8. 发明申请

WO2016209540A1 CAPACITIVE WORDLINE BOOSTING 审中-公开
标题翻译：电容词加强
公开(公告)号：WO2016209540A1
公开(公告)日：2016-12-29
申请号：PCT/US2016/034437
申请日：2016-05-26
申请人： INTEL CORPORATION
发明人： KULKARNI, Jaydeep , KOLAR, Pramod , SHARMA, Ankit , CHATTERJEE, Subho , SUBRAMANIAN, Karthik , SHEIKH, Farhana , MA, Wei-Hsiang
IPC分类号： G11C5/14 , G11C8/08
CPC分类号： G11C8/08 , G11C5/145 , G11C7/18 , G11C11/413 , G11C11/418 , G11C11/419
摘要： In some embodiments, disclosed is a wordline boosting technique using a self-timed capacitive charge boosting approach.
摘要翻译：在一些实施例中，公开了使用自定时电容性电荷增压方法的字线增强技术。

9. 发明申请

WO2015047428A1 CHANNEL-ADAPTIVE CONFIGURABLE MIMO DETECTOR FOR MULTI-MODE WIRELESS SYSTEMS 审中-公开
标题翻译：用于多模式无线系统的通道自适应MIMO检测器
公开(公告)号：WO2015047428A1
公开(公告)日：2015-04-02
申请号：PCT/US2013/072239
申请日：2013-11-27
申请人： INTEL CORPORATION , SHEIKH, Farhana , CHEN, Chia-Hsiang , BOWMAN, Keith , CHUN, Anthony L. , ALAVI, Hossein , KRISHNAMURTHY, Ram
发明人： SHEIKH, Farhana , CHEN, Chia-Hsiang , BOWMAN, Keith , CHUN, Anthony L. , ALAVI, Hossein , KRISHNAMURTHY, Ram
IPC分类号： H04B7/08
CPC分类号： H04B7/0413 , H04L25/03242
摘要： Various embodiments are generally directed to techniques to perform MIMO detection using a dynamic search radius. An apparatus for a wireless receiver includes circuitry, a multiple-input multiple-output (MIMO) detector for execution by the circuitry to determine a plurality of estimated signals, the plurality of estimated signals corresponding to a plurality of signals transmitted through a wireless channel and received by a plurality of antennas, the MIMO detector to determine the plurality of estimated signals based on a search radius, and a search radius tuner for execution by the circuitry to dynamically modify the search radius based on a quality corresponding to the wireless channel.
摘要翻译：各种实施例通常涉及使用动态搜索半径来执行MIMO检测的技术。一种用于无线接收机的装置，包括电路，用于由电路执行以确定多个估计信号的多输入多输出（MIMO）检测器，所述多个估计信号对应于通过无线信道传输的多个信号;以及由多个天线接收的MIMO检测器，用于基于搜索半径确定多个估计信号的MIMO检测器和用于由电路执行的搜索半径调谐器，用于基于与无线信道相对应的质量动态地修改搜索半径。

10. 发明申请

WO2017146840A1 DIGITAL-INTENSIVE HYBRID ADC/FILTER FOR LNA-FREE ADAPTIVE RADIO FRONT-ENDS 审中-公开
标题翻译：数字集成混合ADC /滤波器，用于无需LNA的自适应无线电前端
公开(公告)号：WO2017146840A1
公开(公告)日：2017-08-31
申请号：PCT/US2017/014261
申请日：2017-01-20
申请人： INTEL CORPORATION
发明人： SHEIKH, Farhana , WHITCOMBE, Amy L. , ALPMAN, Erkan , WANG, Yanjie , SEN, Shrevas
IPC分类号： H04B1/00
CPC分类号： H04B1/0042 , H04B1/10 , H04L27/0002
摘要： A mixer-first receiver operates to generate filtering and analog-to-digital conversion concurrently and adaptively, while removing an LNA before a mixer to enable integration with digital baseband circuits. A plurality of switching capacitor arrays are integrated with a hybrid analog-to-digital filtering component. Switching capacitor arrays of the plurality of switching capacitor arrays can be selectively modified to perform both the filtering operation and the conversion operation together. The same switch capacitors of a switching capacitor array can be utilized in one phase of a clock cycle for the filtering and in another phase of the clock cycle for the conversion.
摘要翻译：混合器优先接收器运行以同时且自适应地产生滤波和模数转换，同时在混合器之前去除LNA以实现与数字基带电路的集成。多个开关电容器阵列与混合模拟 - 数字滤波组件集成。可以选择性地修改多个开关电容器阵列的开关电容器阵列以一起执行滤波操作和转换操作。开关电容器阵列的相同开关电容器可以用于滤波的一个时钟周期的一个阶段以及用于转换的另一个时钟周期的阶段。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式