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1. 发明申请

WO2018063571A1 TECHNOLOGIES FOR OBJECT-ORIENTED MEMORY MANAGEMENT WITH EXTENDED SEGMENTATION 审中-公开
标题翻译：具有扩展分割的面向对象存储器管理技术
公开(公告)号：WO2018063571A1
公开(公告)日：2018-04-05
申请号：PCT/US2017/047541
申请日：2017-08-18
申请人： INTEL CORPORATION
发明人： LEMAY, Michael , HUNTLEY, Barry E. , SAHITA, Ravi L.
IPC分类号： G06F13/16 , G06F12/02
CPC分类号： G06F21/53 , G06F9/5016 , G06F12/00 , G06F21/121 , G06F21/74 , G06F2221/033 , G06F2221/0713 , G06F2221/2113
摘要： Technologies for memory management with memory protection extension include a computing device having a processor with one or more protection extensions. The processor may load a logical address including a segment base, effective limit, and effective address and generate a linear address as a function of the logical address with the effective limit as a mask. The processor may switch to a new task described by a task state segment extension. The task state extension may specify a low-latency segmentation mode. The processor may prohibit access to a descriptor in a local descriptor table with a descriptor privilege level lower than the current privilege level of the processor. The computing device may load a secure enclave using secure enclave support of the processor. The secure enclave may load an unsandbox and a sandboxed application in a user privilege level of the processor. Other embodiments are described and claimed.
摘要翻译：具有存储器保护扩展的存储器管理技术包括具有带有一个或多个保护扩展的处理器的计算设备。处理器可以加载包括段基址，有效限制和有效地址的逻辑地址，并根据具有有效限制的逻辑地址作为掩码来生成线性地址。处理器可以切换到由任务状态段扩展描述的新任务。任务状态扩展可以指定低延迟分段模式。处理器可以禁止访问描述符特权级别低于处理器的当前特权级别的本地描述符表格中的描述符。计算设备可以使用处理器的安全区域支持来加载安全区域。安全区域可能会在处理器的用户权限级别加载非安全框和沙盒应用程序。描述并要求保护其他实施例。

2. 发明申请

WO2017136101A1 PROCESSOR EXTENSIONS TO PROTECT STACKS DURING RING TRANSITIONS 审中-公开
标题翻译：处理器扩展以保护环路转换期间的堆叠
公开(公告)号：WO2017136101A1
公开(公告)日：2017-08-10
申请号：PCT/US2017/012572
申请日：2017-01-06
申请人： INTEL CORPORATION
发明人： SHANBHOGUE, Vedvyas , BRANDT, Jason W. , SAHITA, Ravi L. , HUNTLEY, Barry E. , PATEL, Baiju V. , GUPTA, Deepak K.
IPC分类号： G06F21/54 , G06F21/55 , G06F21/30 , H04L29/06
CPC分类号： G06F21/52 , G06F3/0622 , G06F3/0637 , G06F3/0673 , G06F12/1425 , G06F2212/1052 , G06F2221/033 , G06F2221/2141
摘要： A processor implementing techniques for processor extensions to protect stacks during ring transitions is provided. In one embodiment, the processor includes a plurality of registers and a processor core, operatively coupled to the plurality of registers. The plurality of registers is used to store data used in privilege level transitions. Each register of the plurality of registers is associated with a privilege level. An indicator to change a first privilege level of a currently active application to a second privilege level is received. In view of the second privilege level, a shadow stack pointer (SSP) stored in a register of the plurality of registers is selected. The register is associated with the second privilege level. By using the SSP, a shadow stack for use by the processor at the second privilege level is identified.
摘要翻译：提供了实现用于处理器扩展以在环转换期间保护堆栈的技术的处理器。在一个实施例中，处理器包括可操作地耦合到多个寄存器的多个寄存器和处理器核心。多个寄存器用于存储特权级别转换中使用的数据。多个寄存器中的每个寄存器都与特权级别相关联。接收用于将当前活动的应用程序的第一特权级别改变为第二特权级别的指示符。鉴于第二特权等级，选择存储在多个寄存器中的影子堆栈指针（SSP）。该寄存器与第二特权级别相关联。通过使用SSP，可以确定处理器在第二特权级别使用的影子堆栈。

3. 发明申请

WO2018031212A1 SECURE PUBLIC CLOUD 审中-公开
标题翻译：安全的公共云
公开(公告)号：WO2018031212A1
公开(公告)日：2018-02-15
申请号：PCT/US2017/043024
申请日：2017-07-20
申请人： INTEL CORPORATION
发明人： DURHAM, David M. , SAHITA, Ravi L. , HUNTLEY, Barry E. , DESHPANDE, Nikhil M.
IPC分类号： H04L9/32 , H04L9/08 , H04L29/06 , H04L29/08
CPC分类号： G06F21/6245 , G06F21/53 , H04L9/08 , H04L9/0894 , H04L9/3236 , H04L63/06
摘要： A method, system, computer-readable media, and apparatus for ensuring a secure cloud environment is provided, where public cloud services providers can remove their code from the Trusted Computing Base (TCB) of their cloud services consumers. The method for ensuring a secure cloud environment keeps the Virtual Machine Monitor (VMM), devices, firmware and the physical adversary (where a bad administrator/technician attempts to directly access the cloud host hardware) outside of a consumer's Virtual Machine (VM) TCB. Only the consumer that owns this secure VM can modify the VM or access contents of the VM (as determined by the consumer).
摘要翻译：提供了用于确保安全云环境的方法，系统，计算机可读介质和装置，其中公共云服务提供商可以从其云服务的可信计算库（TCB）中移除他们的代码消费者。确保安全云环境的方法使消费者的虚拟机（VM）TCB之外的虚拟机监视器（VMM），设备，固件和物理对手（坏的管理员/技术人员试图直接访问云主机硬件的地方）。只有拥有该安全虚拟机的消费者可以修改虚拟机或访问虚拟机的内容（由用户决定）。

4. 发明申请

WO2014105161A1 MEMORY MANAGEMENT IN SECURE ENCLAVES 审中-公开
标题翻译：内存管理在安全的包装
公开(公告)号：WO2014105161A1
公开(公告)日：2014-07-03
申请号：PCT/US2013/047339
申请日：2013-06-24
申请人： INTEL CORPORATION , LESLIE-HURD, Rebekah , ROZAS, Carlos V. , SCARLATA, Vincent R. , JOHNSON, Simon P. , SAVAGAONKAR, Uday R. , HUNTLEY, Barry E. , SHANBHOGUE, Vedvyas , ANATI, Ittai , MCKEEN, Francis X. , GOLDSMITH, Michael A. , ALEXANDROVICH, Ilya , BERENZON, Alex , SMITH, Wesley H. , NEIGER, Gilbert
发明人： LESLIE-HURD, Rebekah , ROZAS, Carlos V. , SCARLATA, Vincent R. , JOHNSON, Simon P. , SAVAGAONKAR, Uday R. , HUNTLEY, Barry E. , SHANBHOGUE, Vedvyas , ANATI, Ittai , MCKEEN, Francis X. , GOLDSMITH, Michael A. , ALEXANDROVICH, Ilya , BERENZON, Alex , SMITH, Wesley H. , NEIGER, Gilbert
IPC分类号： G06F12/14 , G06F12/08
CPC分类号： G06F9/3004 , G06F9/30047 , G06F9/30076 , G06F9/44 , G06F12/084 , G06F12/0875 , G06F12/1483 , G06F2212/452
摘要： Embodiments of an invention for memory management in secure enclaves are disclosed. In one embodiment, a processor includes an instruction unit and an execution unit. The instruction unit is to receive a first instruction and a second instruction. The execution unit is to execute the first instruction, wherein execution of the first instruction includes allocating a page in an enclave page cache to a secure enclave. The execution unit is also to execute the second instruction, wherein execution of the second instruction includes confirming the allocation of the page.
摘要翻译：公开了用于安全飞行器中的存储器管理的发明的实施例。在一个实施例中，处理器包括指令单元和执行单元。指令单元接收第一指令和第二指令。执行单元执行第一指令，其中第一指令的执行包括将飞地页面缓存中的页面分配到安全飞地。执行单元还执行第二指令，其中第二指令的执行包括确认页的分配。

5. 发明申请

WO2016209533A1 PROCESSORS, METHODS, SYSTEMS, AND INSTRUCTIONS TO PROTECT SHADOW STACKS 审中-公开
标题翻译：处理器，方法，系统和保护阴影堆栈的说明
公开(公告)号：WO2016209533A1
公开(公告)日：2016-12-29
申请号：PCT/US2016/034364
申请日：2016-05-26
申请人： INTEL CORPORATION
发明人： SHANBHOGUE, Vedvyas , BRANDT, Jason W. , SAHITA, Ravi L. , HUNTLEY, Barry E. , PATEL, Baiju V.
IPC分类号： G06F21/55 , G06F21/57 , G06F9/30
CPC分类号： G06F3/0673 , G06F3/0622 , G06F3/0629 , G06F9/30145 , G06F21/52
摘要： A processor of an aspect includes a decode unit to decode an instruction. The processor also includes an execution unit coupled with the decode unit. The execution unit, in response to the instruction, is to determine that an attempted change due to the instruction, to a shadow stack pointer of a shadow stack, would cause the shadow stack pointer to exceed an allowed range. The execution unit is also to take an exception in response to determining that the attempted change to the shadow stack pointer would cause the shadow stack pointer to exceed the allowed range. Other processors, methods, systems, and instructions are disclosed.
摘要翻译：方面的处理器包括解码指令的解码单元。处理器还包括与解码单元耦合的执行单元。执行单元响应于该指令，是确定由于指令而尝试改变影子栈的影子堆栈指针将导致阴影堆栈指针超过允许的范围。响应于确定对阴影堆栈指针的尝试改变将导致阴影堆栈指针超过允许范围，执行单元也将采取异常。公开了其他处理器，方法，系统和指令。

6. 发明申请

WO2013062719A1 INSTRUCTION-SET SUPPORT FOR INVOCATION OF VMM-CONFIGURED SERVICES WITHOUT VMM INTERVENTION 审中-公开
标题翻译：无VMM干预的VMM配置服务协议的指导性支持
公开(公告)号：WO2013062719A1
公开(公告)日：2013-05-02
申请号：PCT/US2012/058079
申请日：2012-09-28
申请人： INTEL CORPORATION , NEIGER, Gilbert , HUNTLEY, Barry E. , SAHITA, Ravi L. , SHANBHOGUE, Vedvyas , BRANDT, Jason W.
发明人： NEIGER, Gilbert , HUNTLEY, Barry E. , SAHITA, Ravi L. , SHANBHOGUE, Vedvyas , BRANDT, Jason W.
IPC分类号： G06F9/06 , G06F9/30 , G06F9/44
CPC分类号： G06F9/45545 , G06F9/455 , G06F9/45533 , G06F9/4555
摘要： A processing core comprising instruction execution logic circuitry and register space. The register space to be loaded from a VMCS, commensurate with a VM entry, with information indicating whether a service provided by the processing core on behalf of the VMM is enabled. The instruction execution logic to, in response to guest software invoking an instruction: refer to the register space to confirm that the service has been enabled, and, refer to second register space or memory space to fetch input parameters for said service written by said guest software.
摘要翻译：处理核心，包括指令执行逻辑电路和寄存器空间。要从VMCS加载的与VM条目相称的寄存器空间，其中指示是否启用了代表VMM的由处理核心提供的服务的信息。指令执行逻辑响应客户软件调用指令：参考寄存器空间以确认服务已被使能，并且参考第二寄存器空间或存储器空间来获取由所述客户端写入的所述服务的输入参数软件。

7. 发明申请

WO2019066918A1 CRYPTOGRAPHIC MEMORY OWNERSHIP 审中-公开
公开(公告)号：WO2019066918A1
公开(公告)日：2019-04-04
申请号：PCT/US2017/054383
申请日：2017-09-29
申请人： INTEL CORPORATION
发明人： DURHAM, David M. , SAHITA, Ravi , SHANBHOGUE, Vedvyas , HUNTLEY, Barry E. , PATEL, Baiju V. , GERZON, Gideon , SCHOINAS, Ioannis T. , KHOSRAVI, Hormuzd M. , CHHABRA, Siddhartha , ROZAS, Carlos V.
IPC分类号： G06F21/60 , G06F21/62 , H04L9/08 , H04L9/06
摘要： There is disclosed a microprocessor, including : a processing core; and a total memory encryption (TME) engine to provide TME for a first trust domain (TD), and further to: allocate a block of physical memory to the first TD and a first cryptographic key to the first TD; map within an extended page table (EPT) a host physical address (HPA) space to a guest physical address (GPA) space of the TD; create a memory ownership table (MOT) entry for a memory page within the block of physical memory, wherein the MOT table comprises a GPA reverse mapping; encrypt the MOT entry using the first cryptographic key; and append to the MOT entry verification data, wherein the MOT entry verification data enables detection of an attack on the MOT entry.

8. 发明申请

WO2018004970A1 APERTURE ACCESS PROCESSORS, METHODS, SYSTEMS, AND INSTRUCTIONS 审中-公开
标题翻译： APERTURE ACCESS PROCESSORS，METHODS，SYSTEMS，AND INSTRUCTIONS
公开(公告)号：WO2018004970A1
公开(公告)日：2018-01-04
申请号：PCT/US2017/035398
申请日：2017-06-01
申请人： INTEL CORPORATION
发明人： HUNTLEY, Barry E. , TSAI, Jr-Shian , NEIGER, Gilbert , SANKARAN, Rajesh M. , ERGIN, Mesut A. , SAHITA, Ravi L. , HERDRICH, Andrew J. , WANG, Wei
IPC分类号： G06F9/455
CPC分类号： G06F9/45558 , G06F9/3004 , G06F9/45533 , G06F12/0292 , G06F12/10 , G06F12/109 , G06F2009/45583 , G06F2009/45591 , G06F2009/45595 , G06F2212/151 , G11C7/1072
摘要： A processor of an aspect includes a decode unit to decode an aperture access instruction, and an execution unit coupled with the decode unit. The execution unit, in response to the aperture access instruction, is to read a host physical memory address, which is to be associated with an aperture that is to be in system memory, from an access protected structure, and access data within the aperture at a host physical memory address that is not to be obtained through address translation. Other processors are also disclosed, as are methods, systems, and machine-readable medium storing aperture access instructions.
摘要翻译：一方面的处理器包括解码孔径访问指令的解码单元和与解码单元耦合的执行单元。响应于孔径访问指令，执行单元从受访访问保护结构中读取与要存在于系统存储器中的孔径相关联的主机物理存储器地址，并且访问光圈内的数据一个不通过地址转换获得的主机物理存储器地址。还公开了其他处理器，以及存储光圈访问指令的方法，系统和机器可读介质。

9. 发明申请

WO2017058381A1 METHOD AND APPARATUS FOR LIGHT-WEIGHT VIRTUALIZATION CONTEXTS 审中-公开
标题翻译：轻量级虚拟现象的方法和装置
公开(公告)号：WO2017058381A1
公开(公告)日：2017-04-06
申请号：PCT/US2016/047601
申请日：2016-08-18
申请人： INTEL CORPORATION
发明人： GUPTA, Deepak K. , SAHITA, Ravi L. , HUNTLEY, Barry E.
IPC分类号： G06F21/53 , G06F9/455
CPC分类号： G06F9/45558 , G06F2009/4557 , G06F2009/45575
摘要： A processor comprises a register to store a first pointer to a context data structure specifying a virtual machine context, the context data structure comprising a first field to store a second pointer to a plurality of realm switch control structures (RSCSs), and an execution unit comprising a logic circuit to execute a virtual machine (VM) according to the virtual machine context, wherein the VM comprises a guest operating system (OS) comprising a plurality of kernel components, and wherein each RSCS of the plurality of RSCSs specifies a respective component context associated with a respective kernel component of the plurality of kernel components, and execute a first kernel component of the plurality of kernel components using a first component context specified by a first RSCS of the plurality of RSCSs.
摘要翻译：处理器包括一个寄存器，用于存储指定虚拟机上下文的上下文数据结构的第一指针，所述上下文数据结构包括存储第二指针到多个领域切换控制结构（RSCS）的第一字段，以及执行单元包括根据所述虚拟机上下文执行虚拟机（VM）的逻辑电路，其中所述VM包括包括多个内核组件的客户操作系统（OS），并且其中所述多个RSCS中的每个RSCS指定相应组件与所述多个内核组件的相应内核组件相关联的上下文，以及使用由所述多个RSCS中的第一RSCS指定的第一组件上下文来执行所述多个内核组件的第一内核组件。

10. 发明申请

WO2014105159A1 PAGING IN SECURE ENCLAVES 审中-公开
标题翻译：寻找安全的包装
公开(公告)号：WO2014105159A1
公开(公告)日：2014-07-03
申请号：PCT/US2013/047322
申请日：2013-06-24
申请人： INTEL CORPORATION , MCKEEN, Francis X. , GOLDSMITH, Michael A. , HUNTLEY, Barry E. , JOHNSON, Simon P. , LESLIE-HURD, Rebekah , ROZAS, Carlos V. , SAVAGAONKAR, Uday R. , SCARLATA, Vincent R. , SHANBHOGUE, Vedvyas , SMITH, Wesley H. , ANATI, Ittai , ALEXANDROVICH, Ilya , BERENZON, Alex , NEIGER, Gilbert
发明人： MCKEEN, Francis X. , GOLDSMITH, Michael A. , HUNTLEY, Barry E. , JOHNSON, Simon P. , LESLIE-HURD, Rebekah , ROZAS, Carlos V. , SAVAGAONKAR, Uday R. , SCARLATA, Vincent R. , SHANBHOGUE, Vedvyas , SMITH, Wesley H. , ANATI, Ittai , ALEXANDROVICH, Ilya , BERENZON, Alex , NEIGER, Gilbert
IPC分类号： G06F12/14
CPC分类号： G06F12/0804 , G06F9/30047 , G06F12/0875 , G06F12/1408 , G06F2212/1052 , G06F2212/402
摘要： Embodiments of an invention for paging in secure enclaves are disclosed. In one embodiment, a processor includes an instruction unit and an execution unit. The instruction unit is to receive a first instruction. The execution unit is to execute the first instruction, wherein execution of the first instruction includes evicting a first page from an enclave page cache.
摘要翻译：公开了用于在安全飞行器中寻呼的发明的实施例。在一个实施例中，处理器包括指令单元和执行单元。指令单元接收第一条指令。执行单元执行第一指令，其中第一指令的执行包括从飞地页面缓存中逐出第一页。

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