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    • 5. 发明申请
    • DUAL DAMASCENE PROCESS UTILIZING A LOW-K DUAL DIELECTRIC
    • 使用低K双电介质的双金刚石工艺
    • WO0199184A3
    • 2002-06-27
    • PCT/US0119881
    • 2001-06-21
    • INFINEON TECHNOLOGIES CORP
    • STETTER MICHAELKALTALIOGLU ERDEMCOWLEY ANDY
    • H01L21/768H01L23/532
    • H01L21/76811H01L21/76813H01L23/5329H01L23/53295H01L2221/1036H01L2924/0002H01L2924/00
    • A method of fabricating an integrated circuit with a dual dielectric structure and utilizes a dual damascene process to fabricate metal interconnection layers. The dual dielectric structure consists of a first insulating layer (24) of conventional dielectric material, and a second insulating layer (26) of a second dielectric material with a low dielectric constant (low-k dielectric material). The first dielectric material is used in regions of the integrated circuit where the superior mechanical properties of conventional dielectric materials will result in maintaining the reliability and mechanical properties of the integrated circuit. The second dielectric material is used in regions of the integrated circuit where the low dielectric constant will result in improved speed of the integrated circuit and reduced electrical coupling between conductors in the integrated circuit. The fabrication of the dual dielectric structure is integrated with a dual damascene metallization process.
    • 一种制造具有双电介质结构的集成电路的方法,并利用双镶嵌工艺来制造金属互连层。 双电介质结构由常规介电材料的第一绝缘层(24)和具有低介电常数(低k电介质材料)的第二介电材料的第二绝缘层(26)组成。 第一介电材料用于集成电路的区域,其中传统介电材料的优良机械性能将导致保持集成电路的可靠性和机械性能。 第二介电材料用于集成电路的区域,其中低介电常数将导致集成电路的改进的速度和减小集成电路中的导体之间的电耦合。 双电介质结构的制造与双镶嵌金属化工艺集成。