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1. 发明授权

US08503212B2 Semiconductor memory apparatus with power-meshed structure 失效
标题翻译：具有电力网格结构的半导体存储器件
公开(公告)号：US08503212B2
公开(公告)日：2013-08-06
申请号：US12843647
申请日：2010-07-26
申请人： Boo Ho Jung , Jun Ho Lee , Hyun Seok Kim , Sun Ki Cho , Yang Hee Kim , Young Won Kim
发明人： Boo Ho Jung , Jun Ho Lee , Hyun Seok Kim , Sun Ki Cho , Yang Hee Kim , Young Won Kim
IPC分类号： G11C5/06 , H01L23/52
CPC分类号： G11C5/063 , G11C5/025
摘要： A semiconductor memory apparatus includes a plurality of banks each having a plurality of cell mats; a plurality of power lines disposed over predetermined portions of each of the plurality of banks; a column control region disposed adjacent to at least one of sides of each bank which are perpendicular to an extending direction of the power lines; and a conductive plate disposed over the column control region and electrically connected to the plurality of power lines.
摘要翻译：一种半导体存储装置，包括：多个存储体，每个存储体具有多个单元格层; 多个电源线，布置在所述多个银行的每一个的预定部分上; 与每个组的至少一个侧面相邻设置的列控制区，其垂直于电力线的延伸方向; 以及设置在所述列控制区域上并电连接到所述多个电力线的导电板。

2. 发明申请

US20110235385A1 SEMICONDUCTOR MEMORY APPARATUS WITH POWER-MESHED STRUCTURE 失效
标题翻译：具有功率结构的半导体存储器件
公开(公告)号：US20110235385A1
公开(公告)日：2011-09-29
申请号：US12843647
申请日：2010-07-26
申请人： Boo Ho JUNG , Jun Ho Lee , Hyun Seok Kim , Sun Ki Cho , Yang Hee Kim , Young Won Kim
发明人： Boo Ho JUNG , Jun Ho Lee , Hyun Seok Kim , Sun Ki Cho , Yang Hee Kim , Young Won Kim
IPC分类号： G11C5/02
CPC分类号： G11C5/063 , G11C5/025
摘要： A semiconductor memory apparatus includes a plurality of banks each having a plurality of cell mats; a plurality of power lines disposed over predetermined portions of each of the plurality of banks; a column control region disposed adjacent to at least one of sides of each bank which are perpendicular to an extending direction of the power lines; and a conductive plate disposed over the column control region and electrically connected to the plurality of power lines.
摘要翻译：一种半导体存储装置，包括：多个存储体，每个存储体具有多个单元格层; 多个电源线，布置在所述多个银行的每一个的预定部分上; 与每个组的至少一个侧面相邻设置的列控制区，其垂直于电力线的延伸方向; 以及设置在所述列控制区域上并电连接到所述多个电力线的导电板。

3. 发明授权

US08421528B2 Semiconductor integrated circuit 失效
标题翻译：半导体集成电路
公开(公告)号：US08421528B2
公开(公告)日：2013-04-16
申请号：US13097326
申请日：2011-04-29
申请人： Hyun Seok Kim , Jun Ho Lee , Boo Ho Jung , Sun Ki Cho , Yang Hee Kim , Young Won Kim
发明人： Hyun Seok Kim , Jun Ho Lee , Boo Ho Jung , Sun Ki Cho , Yang Hee Kim , Young Won Kim
IPC分类号： G05F1/10
CPC分类号： H01L23/5286 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor integrated circuit includes a first voltage line to which a first ground voltage is applied, a second voltage line to which a second ground voltage is applied, a third voltage line to which a first power supply voltage is applied, and a coupling unit including a MOS transistor having a source coupled to the first voltage line, a drain coupled to the second voltage line, and a gate coupled to the third voltage line.
摘要翻译：半导体集成电路包括施加第一接地电压的第一电压线，施加第二接地电压的第二电压线，施加第一电源电压的第三电压线，以及包括 MOS晶体管，其具有耦合到第一电压线的源极，耦合到第二电压线的漏极和耦合到第三电压线的栅极。

4. 发明授权

US08633568B2 Multi-chip package with improved signal transmission 有权
标题翻译：具有改进信号传输的多芯片封装
公开(公告)号：US08633568B2
公开(公告)日：2014-01-21
申请号：US12983211
申请日：2010-12-31
申请人： Young Won Kim , Jun Ho Lee , Hyun Seok Kim , Boo Ho Jung , Sun Ki Cho , Yang Hee Kim
发明人： Young Won Kim , Jun Ho Lee , Hyun Seok Kim , Boo Ho Jung , Sun Ki Cho , Yang Hee Kim
IPC分类号： H01L27/08
CPC分类号： H01L25/0657 , H01L23/48 , H01L2225/06531 , H01L2924/00013 , H01L2924/0002 , H01L2224/13099 , H01L2224/13599 , H01L2224/05599 , H01L2224/05099 , H01L2224/29099 , H01L2224/29599 , H01L2924/00
摘要： Provided is an MCP including a plurality chips stacked therein. Each of the chips includes a plurality of inductor pads configured to transmit power or signals, and at both sides of a reference inductor pad, a first and a second inductor pads are formed to generate magnetic fluxes in different directions from each other.
摘要翻译：提供了包括堆叠在其中的多个芯片的MCP。每个芯片包括被配置为传输功率或信号的多个电感器焊盘，并且在参考电感器焊盘的两侧，形成第一和第二电感器焊盘，以在彼此不同的方向上产生磁通量。

5. 发明申请

US20130117477A1 WIRELESS SIGNAL TRANSMITTING/RECEIVING APPARATUS FOR SEMICONDUCTOR SYSTEM 审中-公开
标题翻译：无线信号发射/接收装置用于半导体系统
公开(公告)号：US20130117477A1
公开(公告)日：2013-05-09
申请号：US13524518
申请日：2012-06-15
申请人： Yang Hee KIM , Ic Su Oh , Jun Ho Lee , Hyun Seok Kim , Boo Ho Jung , Sun Ki Cho
发明人： Yang Hee KIM , Ic Su Oh , Jun Ho Lee , Hyun Seok Kim , Boo Ho Jung , Sun Ki Cho
IPC分类号： G06F13/12
CPC分类号： H04L25/4906
摘要： A wireless signal transmitting/receiving apparatus for a semiconductor system is disclosed The apparatus includes a serializer/deserializer (SERDES) circuit and a coupling pad. The SERDES circuit outputs a parallel input signal as a serial signal during transmission, and outputs a serial input signal as a parallel signal during reception. The coupling pad generates an inductively coupled wireless signal according to the serial signal outputted from the SERDES circuit, and provides a signal generated by inductive coupling with an external device as the serial input signal of the SERDES circuit.
摘要翻译：公开了一种用于半导体系统的无线信号发送/接收装置。该装置包括串行器/解串器（SERDES）电路和耦合垫。 SERDES电路在传输期间输出并行输入信号作为串行信号，并在接收期间输出串行输入信号作为并行信号。耦合垫根据从SERDES电路输出的串行信号产生电感耦合无线信号，并通过与外部设备的电感耦合产生的信号作为SERDES电路的串行输入信号。

6. 发明授权

US08405454B2 Output circuit of semiconductor apparatus having two different types of decoupling capacitors 失效
标题翻译：具有两种不同类型的去耦电容器的半导体装置的输出电路
公开(公告)号：US08405454B2
公开(公告)日：2013-03-26
申请号：US12843985
申请日：2010-07-27
申请人： Boo Ho Jung , Jun Ho Lee , Hyun Seok Kim , Yang Hee Kim
发明人： Boo Ho Jung , Jun Ho Lee , Hyun Seok Kim , Yang Hee Kim
IPC分类号： H01L25/00
CPC分类号： H01L25/00 , H01L2924/0002 , H01L2924/00
摘要： An output circuit of a semiconductor apparatus having two different types of decoupling capacitors is presented. The output circuit includes a first pad, a second pad, a main output unit and a decoupling capacitor region. The first and second pads are configured to respectively provide a power supply voltage and a ground voltage. The main output unit is coupled to the first and second pads. One end of the decoupling capacitor region is coupled to the first pad and the other end is coupled to the second pad. The decoupling capacitor region includes a first decoupling capacitor region spaced apart from a portion of the main output unit by a first distance, and a second decoupling capacitor region spaced apart from the main output unit by a second distance which is greater than the first distance.
摘要翻译：提出了具有两种不同类型的去耦电容器的半导体装置的输出电路。输出电路包括第一焊盘，第二焊盘，主输出单元和去耦电容器区域。第一和第二焊盘被配置为分别提供电源电压和接地电压。主输出单元耦合到第一和第二焊盘。去耦电容器区域的一端耦合到第一焊盘，另一端耦合到第二焊盘。去耦电容器区域包括与主输出单元的一部分间隔开第一距离的第一去耦电容器区域和与主输出单元间隔开大于第一距离的第二距离的第二去耦电容器区域。

7. 发明授权

US08885409B2 Non-volatile memory, method of operating the same, memory system including the same, and method of operating the system 有权
标题翻译：非易失性存储器，操作方法，包括相同的存储器系统以及操作系统的方法
公开(公告)号：US08885409B2
公开(公告)日：2014-11-11
申请号：US13618604
申请日：2012-09-14
申请人： Sang Hoon Lee , Hyun Seok Kim , Sung-Hwan Bae , Jong-Nam Baek , Jae Yong Jeong
发明人： Sang Hoon Lee , Hyun Seok Kim , Sung-Hwan Bae , Jong-Nam Baek , Jae Yong Jeong
IPC分类号： G11C16/04
CPC分类号： G11C16/04 , G11C16/0483 , G11C16/06 , G11C16/26 , G11C29/00
摘要： A nonvolatile memory device includes an array of nonvolatile memory cells and a plurality of page buffers configured to receive a plurality of pages of data read from the same page in the array using different read voltage conditions. A control circuit is provided, which is electrically coupled to the plurality of page buffers. The control circuit is configured to perform a test operation by driving the plurality of page buffers with control signals that cause generation within the nonvolatile memory device of a string of XOR data bits, which are derived from a comparison of at least two of the multiple pages of data read from the same page of nonvolatile memory cells using the different read voltage conditions. An input/output device is provided, which is configured to output test data derived from the string of XOR data bits to another device located external to the nonvolatile memory device.
摘要翻译：非易失性存储器件包括非易失性存储器单元的阵列和多个页缓冲器，其被配置为使用不同的读取电压条件从阵列中的同一页面接收多页数据。提供了一种控制电路，其电耦合到多个页面缓冲器。控制电路被配置为通过用控制信号驱动多个页面缓冲器来执行测试操作，该控制信号导致非易失性存储器件内的异或数据位串的产生，这是从多个页面中的至少两个的比较导出的使用不同的读取电压条件从同一页的非易失性存储单元读取数据。提供了一种输入/输出设备，其被配置为将从XOR数据位串导出的测试数据输出到位于非易失性存储器件外部的另一个设备。

8. 发明申请

US20130178356A1 ABSORBENT FOR HEAVY METAL AND FILTER DEVICE INCLUDING THE SAME 审中-公开
标题翻译：吸收重金属和过滤装置，包括它们
公开(公告)号：US20130178356A1
公开(公告)日：2013-07-11
申请号：US13555651
申请日：2012-07-23
申请人： Hyun Seok Kim , Bok Soon Kwon , Dong Jin Ham , Hyo Rang Kang , Joon Seon Jeong
发明人： Hyun Seok Kim , Bok Soon Kwon , Dong Jin Ham , Hyo Rang Kang , Joon Seon Jeong
IPC分类号： B01J20/02 , B01J20/04 , B01J20/30 , B01J20/24 , B01J20/26 , B01J20/22 , B01J20/10
CPC分类号： C02F1/283 , B01J20/06 , B01J20/18 , B01J20/28007 , B01J20/2803 , B01J20/28057 , B01J20/30 , B01J20/3204 , B01J20/3248 , B82Y30/00 , C02F1/281 , C02F2101/103 , C02F2101/20 , C02F2103/06
摘要： A heavy metal absorbent, and a filter device including the same, include heavy metal absorbing particles each having a surface with a —NOx (1≦x≦2) functional group. The heavy metal absorbing particles are one selected from inorganic oxide particles, graphite-based carbon particles, and a combination thereof.
摘要翻译：重金属吸收剂和包括其的过滤装置包括各自具有-NO x（1 x 2）官能团的表面的重金属吸收颗粒。重金属吸收粒子是选自无机氧化物粒子，石墨类碳粒子及其组合的粒子。

9. 发明申请

US20130036261A1 METHOD FOR OPERATING MEMORY CONTROLLER, AND MEMORY SYSTEM INCLUDING THE SAME 有权
标题翻译：用于操作存储器控制器的方法，以及包括其的存储器系统
公开(公告)号：US20130036261A1
公开(公告)日：2013-02-07
申请号：US13564076
申请日：2012-08-01
申请人： Hyun Seok Kim , Sung Bin Kim , Sung-Hwan Bae , Jong-Nam Baek , Sang Hoon Lee
发明人： Hyun Seok Kim , Sung Bin Kim , Sung-Hwan Bae , Jong-Nam Baek , Sang Hoon Lee
IPC分类号： G06F12/00
CPC分类号： G06F13/16 , G06F11/00 , G06F11/1048 , G06F11/1076 , G11C16/26 , G11C16/349
摘要： A method for operating a memory controller capable of controlling a maximum count of a read retry operation is disclosed. The method includes programming a first real time clock (RTC) value indicating a time-of-day when a program operation is performed when the program operation for programming a data to a storage region of a non-volatile memory, obtaining information for the storage region by using the first RTC value read from the non-volatile memory and a second RTC value indicating a time-of-day when a read operation is performed, when the read operation for the data programmed to the storage region is performed, and decreasing a maximum count of a read retry operation by using the information, when the read retry operation is performed for the storage region.
摘要翻译：公开了一种用于操作能够控制读取重试操作的最大计数的存储器控制器的方法。该方法包括编程第一实时时钟（RTC）值，其指示在将数据编程到非易失性存储器的存储区域的程序操作时执行程序操作的时间，获得用于存储的信息通过使用从非易失性存储器读取的第一RTC值和表示执行读取操作的时间的第二RTC值，执行对存储区域的编程的数据的读取操作，并且减少当对存储区域执行读取重试操作时，通过使用该信息的重试操作的最大计数。

10. 发明申请

US20120093908A1 METAL OXIDE STERILIZING CATALYST, AND STERILIZING DEVICE AND SYSTEM INCLUDING THE SAME 审中-公开
标题翻译：金属氧化物灭菌催化剂，灭菌装置和包括其的系统
公开(公告)号：US20120093908A1
公开(公告)日：2012-04-19
申请号：US13170906
申请日：2011-06-28
申请人： Jae Eun Kim , Sang Min Ji , Joo Wook Lee , Hyo Rang Kang , Ho Jung Yang , Hyun Seok Kim , Chang Hyun Kim
发明人： Jae Eun Kim , Sang Min Ji , Joo Wook Lee , Hyo Rang Kang , Ho Jung Yang , Hyun Seok Kim , Chang Hyun Kim
IPC分类号： A01N25/08 , B01J21/06 , B01J23/20 , B01J23/24 , B01J21/08 , B01J21/12 , B01J23/50 , B01J23/72 , B01J23/06 , B01J23/75 , B01J23/755 , B01J23/34 , B01J23/42 , B01J23/44 , B01J23/46 , B01J23/52 , A01N59/00 , A01P1/00 , B01J35/02
CPC分类号： B01J23/63 , A61L2/232 , A61L2/26 , A61L2202/11 , A61L2202/122 , B01J21/066 , B01J23/002 , B01J23/10 , B01J29/084 , B01J37/04 , B01J2523/00 , B01J2523/18 , B01J2523/3712 , B01J2523/48
摘要： Disclosed is a sterilizing catalyst, a sterilizing device and a sterilizing system, the sterilizing catalyst includes a metal lattice including a metal oxide, and an oxygen vacancy-inducing metal that is integrated or encompassed within the metal lattice. The metal oxide is an oxide of a divalent or multivalent metal. The oxygen vacancy-inducing metal has an oxidation number lower than that of the divalent or multivalent metal.
摘要翻译：公开了一种消毒催化剂，杀菌装置和灭菌系统，所述灭菌催化剂包括金属晶格，所述金属晶格包含金属氧化物，所述氧空位诱导金属被整合或包围在所述金属晶格内。金属氧化物是二价或多价金属的氧化物。氧空位诱导金属的氧化值低于二价或多价金属的氧化值。

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