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    • 1. 发明申请
    • Nitride-based semiconductor light emitting diode
    • 氮化物半导体发光二极管
    • US20070096115A1
    • 2007-05-03
    • US11581757
    • 2006-10-17
    • Hyuk LeeIn PyeonHyun-Ju ParkHyun KimDong KimHyoun Shin
    • Hyuk LeeIn PyeonHyun-Ju ParkHyun KimDong KimHyoun Shin
    • H01L33/00H01L31/12H01L27/15H01L29/26
    • H01L33/38H01L33/20H01L33/32
    • A nitride-based semiconductor LED comprises a substrate; an n-type nitride semiconductor layer formed on the substrate; an active layer formed on a predetermined region of the n-type nitride semiconductor layer; a p-type nitride semiconductor layer formed on the active layer; a current spreading layer formed on the p-type nitride semiconductor layer; a p-electrode formed on the current spreading layer, the p-electrode having two p-type branch electrodes; and an n-electrode formed on the n-type nitride semiconductor layer on which the active layer is not formed, the n-electrode having one n-type branch electrode. The n-type branch electrode is formed so as to be inserted between two of the p-type branch electrodes, and a distance from the outermost side of a transparent electrode adjacent to the n-electrode to the p-electrode is identical at any position.
    • 氮化物系半导体LED包括基板; 在该基板上形成的n型氮化物半导体层; 形成在所述n型氮化物半导体层的预定区域上的有源层; 形成在有源层上的p型氮化物半导体层; 形成在p型氮化物半导体层上的电流扩散层; 形成在电流扩散层上的p电极,p电极具有两个p型分支电极; 以及形成在其上未形成有源层的n型氮化物半导体层上的n电极,n电极具有一个n型分支电极。 n型分支电极被形成为插入在两个p型分支电极之间,并且从与n电极相邻的透明电极的最外侧到p电极的距离在任何位置是相同的 。
    • 2. 发明授权
    • Chip design verification apparatus and data communication method for the same
    • 芯片设计验证装置和数据通信方法相同
    • US07610569B2
    • 2009-10-27
    • US10589595
    • 2005-02-17
    • Hyun-Ju Park
    • Hyun-Ju Park
    • G06F17/50G06F9/45G06F9/455
    • G06F11/2733G06F17/5022
    • A method of verifying a chip design includes: a software side operation step of transmitting output data generated by an operation of a software block to an interface unit, determining whether output data of a hardware block received via the interface unit is valid by executing a chip design verification program, and applying only valid output data of the hardware block to the software block; and a hardware side operation step of transmitting output data generated by an operation of the hardware block to the software block, determining whether the output data of the software block received is valid by executing the chip design verification program in the interface unit, and applying only valid output data of the software block to the hardware block.
    • 验证芯片设计的方法包括:软件侧操作步骤,将通过软件块的操作生成的输出数据发送到接口单元,确定通过接口单元接收的硬件块的输出数据是否有效通过执行芯片 设计验证程序,仅将硬件块的有效输出数据应用于软件块; 以及硬件侧操作步骤,将通过硬件块的操作产生的输出数据发送到软件块,通过在接口单元中执行芯片设计验证程序来确定接收的软件块的输出数据是否有效,并且仅应用 软件块的有效输出数据到硬件块。
    • 6. 发明申请
    • Chip design verification apparatus and method
    • 芯片设计验证装置及方法
    • US20070180413A1
    • 2007-08-02
    • US10589595
    • 2005-02-17
    • Hyun-Ju Park
    • Hyun-Ju Park
    • G06F17/50
    • G06F11/2733G06F17/5022
    • Chip design verification apparatus and method. The method of verifying the chip design includes a software side operation step of transmitting output data generated by the operation of the software block to the interface means, determining whether the output data of the hardware block received via the interface means is valid by executing the chip design verification program, and applying only the valid output data of the hardware block to the software block; and a hardware side operation step of transmitting output data generated by the operation of the hardware block to the software block, determining whether the output data of the software block received is valid by executing the chip design verification program in the interface means, and applying only the valid output data of the software block to the hardware block. Accordingly, chip design errors may be detected when the chip is designed and a faster chip design verification speed may be obtained.
    • 芯片设计验证装置及方法。 验证芯片设计的方法包括:软件侧操作步骤,将通过软件块的操作生成的输出数据发送到接口装置,确定经由接口装置接收的硬件块的输出数据是否通过执行芯片有效 设计验证程序,仅将硬件块的有效输出数据应用于软件块; 以及硬件侧操作步骤,将通过所述硬件块的操作生成的输出数据发送到所述软件块,通过在所述接口装置中执行所述芯片设计验证程序来确定所接收的软件块的输出数据是否有效,并且仅应用 软件块的有效输出数据到硬件块。 因此,当设计芯片时可以检测到芯片设计误差,并且可以获得更快的芯片设计验证速度。
    • 7. 发明授权
    • Manifold absolute pressure sensor for internal combustion engines
    • 用于内燃机的歧管绝对压力传感器
    • US5987996A
    • 1999-11-23
    • US101157
    • 1998-07-02
    • Joo-Young KimHyun-Ju ParkSang-Jo LeeTae-Wook ParkDae-Hyun Yu
    • Joo-Young KimHyun-Ju ParkSang-Jo LeeTae-Wook ParkDae-Hyun Yu
    • F02B77/08G01L9/00G01L7/00
    • G01L19/0084F02B77/08G01L19/143
    • A manifold absolute pressure (MAP) sensor for internal combustion engines is disclosed. In the MAP sensor, the top and bottom cases (1, 7) of a sensor housing have a plurality of fitting slots (10) and fitting protrusions (11) at their connection edges respectively and are easily and tightly assembled into a single structure through a mechanical fitting and epoxy bonding process. A plurality of support protrusions (12, 12') are internally formed on each of the top and bottom cases (1, 7) and support each side of the circuit board (5), with the circuit board (5) being positioned under the sensor member (4) and allowing the pressure inlet pipe (4') of the sensor member (4) to pass through. A supporting ring (13) and an O-ring (14) are commonly fitted over the pressure inlet pipe (4') of the sensor member (4) and are closely fitted into the enlarged top end of the pressure inlet port (8).
    • PCT No.PCT / KR97 / 00207 Sec。 371日期:1998年7月2日 102(e)1998年7月2日PCT 1997年10月30日PCT公布。 公开号WO98 / 20248 日期1998年5月14日公开了一种内燃机的歧管绝对压力(MAP)传感器。 在MAP传感器中,传感器壳体的顶部和底部壳体(1,7)分别在其连接边缘处具有多个配合槽(10)和嵌合突起(11),并且容易且紧密地组装成单一结构 机械配件和环氧树脂粘合工艺。 多个支撑突起(12,12')内部形成在每个顶壳和底壳(1,7)上,并支撑电路板(5)的每一侧,电路板(5)位于 传感器构件(4)并且允许传感器构件(4)的压力入口管(4')通过。 支撑环(13)和O形环(14)通常安装在传感器构件(4)的压力入口管(4')上方并且紧密地配合到压力入口(8)的扩大的顶端中, 。