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1. 发明授权

US06259740B1 Moving picture experts group video decoding apparatus and method for supporting replay 有权
标题翻译：运动图像专家组视频解码装置和支持重播的方法
公开(公告)号：US06259740B1
公开(公告)日：2001-07-10
申请号：US09143353
申请日：1998-08-28
申请人： Hwa Young Lyu
发明人： Hwa Young Lyu
IPC分类号： H04N712
CPC分类号： H04N21/23406 , H04N19/152 , H04N19/423 , H04N19/50 , H04N19/61 , H04N21/44004
摘要： An MPEG video decoding method using an MPEG video decoding apparatus having a memory for storing a predetermined amount of video bit streams data to support replay, the method comprising the steps of: when in a replay mode, discarding the input video bit stream, instead of storing it in the memory which stores a predetermined amount of the input bit stream to be video-decoded and/or replayed, resulting in fix of a write address pointer; storing an address of a read address pointer in a replay read address pointer and storing an address of the write address pointer in the read address pointer; and subsequently reading and decoding a bit stream starting with a portion corresponding to the address of the read address pointer which is given by the address of the write address pointer while increasing the read address pointer, thereby performing the replay.
摘要翻译：一种使用MPEG视频解码装置的MPEG视频解码方法，所述MPEG视频解码装置具有用于存储预定量的视频比特流数据以支持重放的存储器，所述方法包括以下步骤：当在重播模式中，丢弃输入的视频比特流，而不是将其存储在存储要被视频解码和/或重放的预定量的输入比特流的存储器中，导致写入地址指针的固定; 将读地址指针的地址存储在重播读地址指针中，并将写地址指针的地址存储在读地址指针中; 并随后从增加读地址指针的地址指针的地址给出的与地址指针的地址对应的部分开始读取和解码比特流，从而进行重放。

2. 发明授权

US06295321B1 Video decoding method, video decoder and digital TV system using the video decoding method and video decoder 有权
标题翻译：视频解码方法，视频解码器和数字电视系统采用视频解码方式和视频解码器
公开(公告)号：US06295321B1
公开(公告)日：2001-09-25
申请号：US09222343
申请日：1998-12-29
申请人： Hwa Young Lyu
发明人： Hwa Young Lyu
IPC分类号： H04N712
CPC分类号： H04N21/6332 , H04N19/61 , H04N21/654
摘要： A video decoding method and apparatus using the same decode and display a compressed video bit stream output through a video buffer for temporarily storing the video bit stream. The method includes the steps of (a) receiving a single sync signal and an external command to control decoding of the video bit stream; and (b) decoding the input video bit stream, or skipping it, or waiting without decoding under the control of step (a). A video decoder of the present invention includes a decoding control section receptive to a single synchronization signal and an external command to control decoding of the video bit stream, and a video decoder for decoding the video bit stream input through the video buffer, or skipping the video bit stream, or waiting for a defined frame period without decoding the video bit stream under the control of the decoding control section.
摘要翻译：一种使用该解码方法的视频解码方法和装置解码并显示通过视频缓冲器输出的压缩视频比特流，用于临时存储视频比特流。该方法包括以下步骤：（a）接收单个同步信号和外部命令以控制视频比特流的解码; 和（b）在步骤（a）的控制下对输入视频比特流进行解码，或者跳过它或等待，而不进行解码。本发明的视频解码器包括：接收单个同步信号的解码控制部分和用于控制视频比特流的解码的外部命令;以及视频解码器，用于对通过视频缓冲器输入的视频比特流进行解码，或者跳过视频比特流或等待定义的帧周期，而不在解码控制部分的控制下对视频比特流进行解码。

3. 发明授权

US06356312B1 MPEG decoder and decoding control method for handling system clock discontinuity 有权
标题翻译：用于处理系统时钟不连续的MPEG解码器和解码控制方法
公开(公告)号：US06356312B1
公开(公告)日：2002-03-12
申请号：US09217203
申请日：1998-12-22
申请人： Hwa Young Lyu
发明人： Hwa Young Lyu
IPC分类号： H04N9475
CPC分类号： H04N21/4305 , H04N5/04 , H04N5/4401 , H04N21/4307 , H04N21/4341
摘要： An apparatus and method for MPEG decoding are disclosed which control decoding without reference to the system time clock for a predetermined time period during a discontinuity of system time clock. Thus, an error caused by inconsistency between the system time clock and the time stamp due to delay of the video buffer is eliminated, thereby allowing normal decoding with A/V lip-synchronization.
摘要翻译：公开了一种用于MPEG解码的装置和方法，其在系统时钟的不连续性期间，在不参考系统时钟的情况下控制解码达预定时间段的解码。因此，消除了由于视频缓冲器的延迟而导致的系统时钟和时间戳之间的不一致的错误，从而允许通过A / V口唇同步的正常解码。

4. 发明授权

US06917652B2 Device and method for decoding video signal 失效
标题翻译：视频信号解码的装置和方法
公开(公告)号：US06917652B2
公开(公告)日：2005-07-12
申请号：US09757664
申请日：2001-01-11
申请人： Hwa Young Lyu
发明人： Hwa Young Lyu
IPC分类号： H04N7/26 , H04N7/50 , H04N7/12
CPC分类号： H04N19/42 , H04N19/61
摘要： Device and method for decoding a plurality of video bitstreams on the same time by using one decoder by making time multiplexing decoding of bitstreams in different frame rates and film modes in frames, which facilitates simultaneous processing of multiple video bitstreams for PIP, POP, multi-channel broadcasting, and the like by using, not numerous video decoder, but only one HD class video decoded, a required memory size can be reduced significantly, and an IC size can be reduced further if the present invention is applied to an ASIC, that enhances competitiveness.
摘要翻译：通过使用一个解码器通过对帧中的不同帧速率和电影模式进行位流的时间复用解码，同时处理多个视频比特流的装置和方法，这有助于同时处理多个视频比特流用于PIP，POP，频道广播等，通过使用不是多个视频解码器，而只有一个HD级视频被解码，可以显着地减少所需的存储器大小，并且如果将本发明应用于ASIC，则可以进一步降低IC尺寸，即，增强竞争力。

5. 发明授权

US06233280B1 Video decoder for high picture quality 有权
标题翻译：视频解码器，用于高画质
公开(公告)号：US06233280B1
公开(公告)日：2001-05-15
申请号：US09223752
申请日：1998-12-31
申请人： Jin Kyeong Kim , Hwa Young Lyu
发明人： Jin Kyeong Kim , Hwa Young Lyu
IPC分类号： H04B166
CPC分类号： H04N19/61 , H04N7/015 , H04N19/13 , H04N19/91
摘要： A video decoder for high definition television includes a variable length decoder decoding codes corresponding to discrete cosine transform (DCT) coefficients of an applied video bit stream, and produces a run-level pair for each code. An index decoder stores run-level pairs produced from the variable length decoder, and produces the position information indicating the number of a level value of a corresponding run-level pair among 64 DCT coefficients. An inverse quantizer obtains an added value corresponding to the position information of the index decoder from a quantization matrix, and performs an inverse quantization by multiplying a quantizer level for determining a quantization step and DCT coefficient to the added value. An inverse scanner includes a plurality of memories, and inversely scanning the DCT coefficient inversely quantized and applied serially from the inverse quantizer and produces the DCT coefficient in parallel at the same time. An inverse discrete cosine transformer performs an inverse DCT (IDCT) of the DCT coefficient produced in parallel from the inverse scanner.
摘要翻译：用于高分辨率电视的视频解码器包括可变长度解码器解码与应用的视频比特流的离散余弦变换（DCT）系数对应的代码，并为每个代码产生运行级对。索引解码器存储从可变长度解码器产生的游程级对，并且产生指示64个DCT系数中的对应的游程级对的级别值的数量的位置信息。逆量化器从量化矩阵获得与索引解码器的位置信息相对应的相加值，并且通过将用于确定量化步长的量化器电平和DCT系数乘以相加值来执行逆量化。逆扫描器包括多个存储器，并且逆向扫描从逆量化器反序量化并串行应用的DCT系数，并同时产生DCT系数。逆离散余弦变换器执行从逆扫描器并行产生的DCT系数的逆DCT（IDCT）。

6. 发明授权

US06654500B1 MPEG video decoding system and overflow processing method thereof 有权
标题翻译： MPEG视频解码系统及其溢出处理方法
公开(公告)号：US06654500B1
公开(公告)日：2003-11-25
申请号：US09221823
申请日：1998-12-28
申请人： Hwa Young Lyu
发明人： Hwa Young Lyu
IPC分类号： G06K936
CPC分类号： H04N21/4425 , H04N19/152 , H04N19/50 , H04N19/89 , H04N19/895 , H04N19/90 , H04N21/4341 , H04N21/44004
摘要： An MPEG video decoding system and an overflow processing method are disclosed. The MPEG video decoding system does not reset the video buffer during the overflow period, which allows a decoding of the data already stored in the video buffer, thereby minimizing the loss of data due to an overflow.
摘要翻译：公开了MPEG视频解码系统和溢出处理方法。 MPEG视频解码系统在溢出期间不复位视频缓冲器，这允许对已经存储在视频缓冲器中的数据进行解码，从而最小化由于溢出造成的数据丢失。

7. 发明授权

US06215823B1 Motion vector decoder 有权
标题翻译：运动矢量解码器
公开(公告)号：US06215823B1
公开(公告)日：2001-04-10
申请号：US09221822
申请日：1998-12-28
申请人： Jin Kyeong Kim , Hwa Young Lyu
发明人： Jin Kyeong Kim , Hwa Young Lyu
IPC分类号： H04B166
CPC分类号： H04N19/43 , H04N19/51
摘要： The motion vector decoder includes a parameter delay block which delays transmissions of various input signals necessary for motion vector decoding; a motion vector residual block which extracts a motion residual value and outputs a positive number of the motion residual value; a motion vector code table block which searches for a motion code, a condition of a sign of the motion code, and a zero condition of the motion code using a variable length decoding table and outputting the searched values; a motion vector delta block which calculates a difference of motion vectors from the motion vector residual block and the motion vector code table block; a MV adder which adds the difference value received from the motion vector delta block and a motion vector of a preceding macroblock to output a new motion vector; and a register which updates a flip-flop corresponding to a current (r, s, t) of a new motion vector. The circuit blocks each have at least one flip-flop to allow processing of each block within a single clock.
摘要翻译：运动矢量解码器包括参数延迟块，其延迟运动矢量解码所需的各种输入信号的传输; 运动矢量残差块，其提取运动残差值并输出运动残差值的正数; 运动矢量码表块，其使用可变长度解码表搜索运动码，运动码的符号的条件和运动码的零状态，并输出搜索的值; 运动矢量增量块，其计算来自运动矢量残差块和运动矢量码表块的运动矢量的差; MV加法器，其将从运动矢量增量块接收的差值和前一宏块的运动矢量相加以输出新的运动矢量; 以及更新对应于新的运动矢量的当前（r，s，t）的触发器的寄存器。电路块各自具有至少一个触发器，以允许在单个时钟内处理每个块。

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