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1. 发明授权

US08127089B1 Hard disk controller which coordinates transmission of buffered data with a host 有权
标题翻译：与主机协调传输缓冲数据的硬盘控制器
公开(公告)号：US08127089B1
公开(公告)日：2012-02-28
申请号：US12030173
申请日：2008-02-12
申请人： Huy Nguyen , William Wong , Kha Nguyen
发明人： Huy Nguyen , William Wong , Kha Nguyen
IPC分类号： G06F12/00
CPC分类号： G06F5/065 , G06F3/061 , G06F3/0659 , G06F3/0674
摘要： The transmission of buffered data is coordinated between a storage medium and a host in response to a request from the host. One or more blocks of data are transferred from the storage medium to a buffer memory. One or more frames of data are transmitted from the buffer memory to the host, wherein the number of blocks ending in the frame is recorded in a blocks/frame register, and possibly also in a block count accumulator register. Buffer release pulses for releasing buffer space in memory are sent to the buffer memory, based on the number of blocks in the blocks/frame register, or the number of blocks accumulated in the block count accumulator register when a signal is received from the host. A pointer which points to the last block of data successfully transferred is updated in accordance with the buffer release pulses.
摘要翻译：响应于来自主机的请求，缓冲数据的传输在存储介质和主机之间协调。一个或多个数据块从存储介质传送到缓冲存储器。一个或多个数据帧从缓冲存储器发送到主机，其中以帧结束的块的数量被记录在块/帧寄存器中，并且还可能被记录在块计数累加器寄存器中。基于块/帧寄存器中的块数或从主机接收到信号时累积在块计数累加器寄存器中的块的数量，将用于释放存储器中的缓冲器空间的缓冲器释放脉冲发送到缓冲存储器。根据缓冲器释放脉冲更新指向成功传送的最后数据块的指针。

2. 发明申请

US20060015659A1 System and method for transferring data using storage controllers 审中-公开
标题翻译：使用存储控制器传输数据的系统和方法
公开(公告)号：US20060015659A1
公开(公告)日：2006-01-19
申请号：US10893822
申请日：2004-07-19
申请人： Leon Krantz , Kha Nguyen , Huy Nguyen
发明人： Leon Krantz , Kha Nguyen , Huy Nguyen
IPC分类号： G06F3/00
CPC分类号： G06F3/061 , G06F3/0656 , G06F3/0659 , G06F3/0676
摘要： A method and a storage controller for transferring data between a host and a storage device is provided. The storage controller includes, a transport module having a first in first out (“FIFO”) for receiving frames from a link module, wherein the FIFO uses two pointers; the first pointer points to a location of a frame that is received with cyclic redundancy code (“CRC”) and the second pointer points to the frame after the CRC is verified and the frame is acceptable. The method includes, using a first pointer to point to a location when a frame arrives without the CRC; and verifying the CRC and if a frame is acceptable using a second pointer to point to the first pointer location. If a frame is corrupt the first pointer and the second pointer point to a location of a receive pointer.
摘要翻译：提供了一种用于在主机和存储设备之间传送数据的方法和存储控制器。存储控制器包括：具有先入先出（“FIFO”）的传输模块，用于从链路模块接收帧，其中FIFO使用两个指针; 第一指针指向在循环冗余码（“CRC”）被接收的帧的位置，并且第二指针在CRC被校验之后指向帧，并且该帧是可接受的。该方法包括：当帧到达而没有CRC时，使用第一指针指向一个位置; 以及验证CRC以及如果帧是可接受的，则使用第二指针指向第一指针位置。如果帧被损坏，则第一个指针和第二个指针指向接收指针的位置。

3. 发明授权

US07849259B1 Disk controller response handler for write commands 有权
标题翻译：用于写命令的磁盘控制器响应处理程序
公开(公告)号：US07849259B1
公开(公告)日：2010-12-07
申请号：US12030162
申请日：2008-02-12
申请人： William Wong , Kha Nguyen , Huy Tu Nguyen , William Dennin, III , Roger Baldwin
发明人： William Wong , Kha Nguyen , Huy Tu Nguyen , William Dennin, III , Roger Baldwin
IPC分类号： G06F12/00 , G06F13/00 , G06F13/28 , G06F3/00 , G06F5/00
CPC分类号： G06F3/0659 , G06F3/061 , G06F3/0676
摘要： An execution queue stores a write command from the host in response to issuance of the write command from the host, and is removed from the execution queue in response to a signal indicating that data designated by the write command has been written to the hard disk. A holding queue stores the write command removed from the execution queue. In response to the command being stored in the holding queue, a request is issued for an acknowledgment from the host. The write command is removed from the holding queue in response to the acknowledgment being received from the host. An outgoing queue stores the write command removed from the holding queue for deletion. The queues are controlled by queue management hardware, the request is issued by the queue management hardware, and the signal and acknowledgment are received by the queue management hardware.
摘要翻译：执行队列响应于从主机发出写入命令而存储来自主机的写命令，并且响应于指示由写命令指定的数据已被写入硬盘的信号而从执行队列中移除。持有队列存储从执行队列中删除的写命令。响应于存储在保持队列中的命令，发出来自主机的确认的请求。响应于从主机接收到确认，将写命令从保持队列中移除。传出队列存储从保留队列中删除的写入命令以进行删除。队列由队列管理硬件控制，请求由队列管理硬件发出，信号和确认由队列管理硬件接收。

4. 发明申请

US20060015660A1 System and method for controlling buffer memory overflow and underflow conditions in storage controllers 有权
标题翻译：用于控制存储控制器中缓冲存储器溢出和下溢条件的系统和方法
公开(公告)号：US20060015660A1
公开(公告)日：2006-01-19
申请号：US10894208
申请日：2004-07-19
申请人： Kha Nguyen , William Wong , Mouluan Jang , Jane Wang
发明人： Kha Nguyen , William Wong , Mouluan Jang , Jane Wang
IPC分类号： G06F3/00
CPC分类号： G06F3/0605 , G06F3/0656 , G06F3/0676
摘要： A method for maintaining flow control in a buffer memory coupled to a storage controller is provided. The storage controller includes, first and second counters that are used to monitor when data is read from a buffer memory and when data is transferred from the buffer memory to the host. The method includes, incrementing first and second counter values when data is placed in the buffer memory; decrementing a first counter value when data is read from the buffer memory; and decrementing the second counter value when data is sent to a host. The method further includes, pausing a first channel logic between a transport module and a storage disk when there is no data in the buffer memory; and pausing a second channel logic between a disk and the buffer memory if there is no space in the buffer memory.
摘要翻译：提供了一种用于维持耦合到存储控制器的缓冲存储器中的流量控制的方法。存储控制器包括用于监视从缓冲存储器读取数据以及数据从缓冲存储器传送到主机的第一和第二计数器。该方法包括：当数据放置在缓冲存储器中时，递增第一和第二计数器值; 当从缓冲存储器读取数据时递减第一计数器值; 并且当数据被发送到主机时递减第二计数器值。该方法还包括：当缓冲存储器中没有数据时，暂停传输模块和存储盘之间的第一通道逻辑; 并且如果缓冲存储器中没有空间，则在盘和缓冲存储器之间暂停第二通道逻辑。

5. 发明授权

US08412895B1 Hard disk controller which coordinates transmission of buffered data with a host 有权
标题翻译：与主机协调传输缓冲数据的硬盘控制器
公开(公告)号：US08412895B1
公开(公告)日：2013-04-02
申请号：US13401179
申请日：2012-02-21
申请人： Huy Tu Nguyen , William C. Wong , Kha Nguyen
发明人： Huy Tu Nguyen , William C. Wong , Kha Nguyen
IPC分类号： G06F12/00
CPC分类号： G06F5/065 , G06F3/061 , G06F3/0659 , G06F3/0674
摘要： The transmission of buffered data is coordinated between a storage medium and a host in response to a request from the host. One or more blocks of data are transferred from the storage medium to a buffer memory. One or more frames of data are transmitted from the buffer memory to the host, wherein the number of blocks ending in the frame is recorded in a blocks/frame register, and possibly also in a block count accumulator register. Buffer release pulses for releasing buffer space in memory are sent to the buffer memory, based on the number of blocks in the blocks/frame register, or the number of blocks accumulated in the block count accumulator register when a signal is received from the host. A pointer which points to the last block of data successfully transferred is updated in accordance with the buffer release pulses.
摘要翻译：响应于来自主机的请求，缓冲数据的传输在存储介质和主机之间协调。一个或多个数据块从存储介质传送到缓冲存储器。一个或多个数据帧从缓冲存储器发送到主机，其中以帧结束的块的数量被记录在块/帧寄存器中，并且还可能被记录在块计数累加器寄存器中。基于块/帧寄存器中的块数或从主机接收到信号时累积在块计数累加器寄存器中的块的数量，将用于释放存储器中的缓冲器空间的缓冲器释放脉冲发送到缓冲存储器。根据缓冲器释放脉冲更新指向成功传送的最后数据块的指针。

6. 发明授权

US08156415B1 Method and system for command queuing in disk drives 有权
标题翻译：磁盘驱动器中命令排队的方法和系统
公开(公告)号：US08156415B1
公开(公告)日：2012-04-10
申请号：US12323267
申请日：2008-11-25
申请人： Huy Tu Nguyen , William C. Wong , Kha Nguyen , Yehua Yang
发明人： Huy Tu Nguyen , William C. Wong , Kha Nguyen , Yehua Yang
IPC分类号： G06F11/08 , G06F13/00
CPC分类号： G06F3/0659 , G06F3/061 , G06F3/0671 , G06F11/1004 , G06F2213/0038
摘要： A method and system for command queuing in disk drives may improve performance by queuing multiple commands and sequentially executing them automatically without firmware intervention. The method may use a number of queues, e.g., a staging queue for commands to be executed, an execution queue for commands currently being executed, and a holding queue for commands which have been executed but have not received a status report from a host. With the pipelined nature of queued commands, when data requested by one command are being sent to the host, the queue logic may already be fetching data for the next command. If an error occurs in the transmission, commands in the queues may backtrack and restart from the point where data were last known to have been successfully sent to the host.
摘要翻译：用于在磁盘驱动器中进行命令排队的方法和系统可以通过排队多个命令并在没有固件干预的情况下自动执行它们来提高性能。该方法可以使用多个队列，例如用于执行命令的分段队列，用于当前正在执行的命令的执行队列，以及用于已被执行但尚未从主机接收到状态报告的命令的保持队列。随着排队命令的流水线性质，当一个命令请求的数据被发送到主机时，队列逻辑可能已经为下一个命令获取数据。如果传输中发生错误，则队列中的命令可能会从最后被称为已经成功发送到主机的位置回溯并重新启动。

7. 发明申请

US20110029727A1 Disk Controller Configured to Perform Out of Order Execution of Write Operations 有权
标题翻译：磁盘控制器被配置为执行写操作的执行
公开(公告)号：US20110029727A1
公开(公告)日：2011-02-03
申请号：US12902364
申请日：2010-10-12
申请人： Arie L. Krantz , Kha Nguyen , Gregory T. Elkins
发明人： Arie L. Krantz , Kha Nguyen , Gregory T. Elkins
IPC分类号： G06F12/00
CPC分类号： G06F12/0607 , G06F3/0613 , G06F3/0656 , G06F3/0659 , G06F3/0676 , G06F12/0868 , G11B5/012
摘要： A controller for a disk drive includes first memory storing first write operations and second write operations received in a first order. A processor arranges the first write operations and the second write operations in a second order based on respective track sectors associated with the first and the second write operations. The second order is different than the first order. A memory controller transfers write operation data corresponding to the first write operations and the second write operations to a disk formatter in the second order in response to a single command from the processor.
摘要翻译：用于磁盘驱动器的控制器包括存储以第一顺序接收的第一写入操作和第二写入操作的第一存储器。处理器基于与第一和第二写入操作相关联的相应轨道扇区，以第二顺序来排列第一写入操作和第二写入操作。第二个顺序与第一个顺序不同。响应于来自处理器的单个命令，存储器控制器将与第一写入操作和第二写入操作相对应的写入操作数据以二次传送到磁盘格式化器。

8. 发明授权

US07757009B2 Storage controllers with dynamic WWN storage modules and methods for managing data and connections between a host and a storage device 失效
标题翻译：具有动态WWN存储模块的存储控制器和用于管理主机和存储设备之间的数据和连接的方法
公开(公告)号：US07757009B2
公开(公告)日：2010-07-13
申请号：US10894144
申请日：2004-07-19
申请人： Leon A. Krantz , Kha Nguyen , Michael J. North
发明人： Leon A. Krantz , Kha Nguyen , Michael J. North
IPC分类号： G06F3/00
CPC分类号： G06F3/0659 , G06F3/0605 , G06F3/0676 , H04L29/12839 , H04L61/6022 , H04L69/22
摘要： A method and system for transferring data between a host and a Serial Attached Small Computer Interface (“SAS”) device using a storage controller is provided. The storage controller includes, a World Wide Name (“WWN”) module that includes a table having plural entries, wherein each row includes a WWN address, an initiator tag value field, an input/output counter value that tracks plural commands for a connection. A WWN index value represents the address of a row having plural entries. The method includes, comparing frame elements of incoming frames, including a unique WWN address with the WWN module entries; and if there is a match, updating a counter value for a connection between the storage controller and a device sending frames. The counter value is increased when a command frame is received and decreased when a command is executed and a response is sent to the device.
摘要翻译：提供了一种使用存储控制器在主机与串行连接小型计算机接口（“SAS”）设备之间传送数据的方法和系统。存储控制器包括：包括具有多个条目的表的万维网（WWN）模块，其中每行包括WWN地址，发起者标签值字段，跟踪用于连接的多个命令的输入/输出计数器值。 WWN索引值表示具有多个条目的行的地址。该方法包括：将输入帧的帧元素与WWN模块条目进行比较，包括唯一的WWN地址; 并且如果存在匹配，则更新存储控制器与发送帧的设备之间的连接的计数器值。当执行命令并向设备发送响应时，接收到命令帧并减少计数器值。

9. 发明申请

US20050015543A1 Disk controller configured to perform out of order execution of write operations 有权
标题翻译：磁盘控制器配置为执行写入操作的无序执行
公开(公告)号：US20050015543A1
公开(公告)日：2005-01-20
申请号：US10920881
申请日：2004-08-18
申请人： Arie Krantz , Kha Nguyen , Gregory Elkins
发明人： Arie Krantz , Kha Nguyen , Gregory Elkins
IPC分类号： G11B20/10 , G11B5/012 , G11B20/12 , G06F12/00
CPC分类号： G06F12/0607 , G06F3/0613 , G06F3/0656 , G06F3/0659 , G06F3/0676 , G06F12/0868 , G11B5/012
摘要： A hard disk unit includes a disk, a controller microprocessor, a host bus interface, a buffer memory, a buffer memory controller, and a disk formatter. The bus interface receives write operations, and corresponding write operation data is stored in the buffer memory. The buffer memory controller includes address registers and block count registers. The microprocessor loads the address registers with the buffer memory addresses of multiple write operations and loads the block count registers with the size of the corresponding data. The microprocessor then issues a single command to the buffer memory controller to transfer the data from the buffer memory to the disk formatter. The address registers and block count registers enable the data of multiple write operations to be transferred and written to a disk in an order other than the order in which the write operations were received at the bus interface.
摘要翻译：硬盘单元包括盘，控制器微处理器，主机总线接口，缓冲存储器，缓冲存储器控制器和盘格式器。总线接口接收写操作，相应的写操作数据存储在缓冲存储器中。缓冲存储器控制器包括地址寄存器和块计数寄存器。微处理器使用多个写入操作的缓冲存储器地址加载地址寄存器，并将块计数寄存器加载到相应数据的大小。然后微处理器向缓冲存储器控制器发出单个命令，以将数据从缓冲存储器传送到磁盘格式器。地址寄存器和块计数寄存器使得多个写入操作的数据能够以除总线接口上的写入操作顺序之外的顺序被传送和写入到磁盘。

10. 发明授权

US5519883A Interbus interface module 失效
标题翻译： Interbus接口模块
公开(公告)号：US5519883A
公开(公告)日：1996-05-21
申请号：US18829
申请日：1993-02-18
申请人： Theodore C. White , Chung W. Wong , Kha Nguyen , Jayesh V. Sheth , Craig W. Harris
发明人： Theodore C. White , Chung W. Wong , Kha Nguyen , Jayesh V. Sheth , Craig W. Harris
IPC分类号： G06F11/20 , G06F13/40 , G06F13/00 , G06F13/20
CPC分类号： G06F11/2007 , G06F13/4027
摘要： An interbus interface module enables storage and transfer of commands, messages and data between parallel a dual system bus operating on a first protocol and a subrequestor bus operating on a second protocol. The interface module serves a first group of requestors, such as multiple processors and main memory, for handling data transfers to and from the subrequestor bus via said dual system buses while also handling data transfers to and from a second group of requestors connected to the subrequestor bus.
摘要翻译： Interbus接口模块能够在并行运行在第一协议上的双系统总线和在第二协议上工作的子请求总线之间存储和传送命令，消息和数据。接口模块服务第一组请求者，例如多处理器和主存储器，用于经由所述双系统总线处理到和从子请求总线的数据传输，同时还处理到和连接到子请求器的第二组请求者的数据传输总线。

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