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    • 2. 发明申请
    • SIDEWALL SEMICONDUCTOR TRANSISTORS
    • 端子半导体晶体管
    • US20060124993A1
    • 2006-06-15
    • US10905041
    • 2004-12-13
    • Huilong ZhuLawrence ClevengerOmer DokumaciKaushik KumarCarl RadensDureseti Chidambarrao
    • Huilong ZhuLawrence ClevengerOmer DokumaciKaushik KumarCarl RadensDureseti Chidambarrao
    • H01L29/76
    • H01L29/785H01L29/1083H01L29/66795
    • A novel transistor structure and method for fabricating the same. The transistor structure comprises (a) a substrate and (b) a semiconductor region, a gate dielectric region, and a gate region on the substrate, wherein the gate dielectric region is sandwiched between the semiconductor region and the gate region, wherein the semiconductor region is electrically insulated from the gate region by the gate dielectric region, wherein the semiconductor region comprises a channel region and first and second source/drain regions, wherein the channel region is sandwiched between the first and second source/drain regions, wherein the first and second source/drain regions are aligned with the gate region, wherein the channel region and the gate dielectric region (i) share an interface surface which is essentially perpendicular to a top surface of the substrate, and (ii) do not share any interface surface that is essentially parallel to a top surface of the substrate.
    • 一种新颖的晶体管结构及其制造方法。 晶体管结构包括(a)衬底和(b)衬底上的半导体区域,栅极介电区域和栅极区域,其中栅极电介质区域夹在半导体区域和栅极区域之间,其中半导体区域 通过所述栅极电介质区域与所述栅极区域电绝缘,其中所述半导体区域包括沟道区域和第一和第二源极/漏极区域,其中所述沟道区域夹在所述第一和第二源极/漏极区域之间,其中所述第一和/ 第二源极/漏极区域与栅极区域对准,其中沟道区域和栅极电介质区域(i)共享基本上垂直于衬底顶表面的界面,以及(ii)不共享任何界面表面 其基本上平行于衬底的顶表面。