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    • 2. 发明授权
    • High-order harmonic device of cavity filter
    • 谐波滤波器的高次谐波器件
    • US08710941B2
    • 2014-04-29
    • US13020444
    • 2011-02-03
    • Chien-Chih LeeWei-Chin HsuHsien-Wen Liu
    • Chien-Chih LeeWei-Chin HsuHsien-Wen Liu
    • H01P1/205H01P7/04
    • H01P1/205H01P1/2053H01P7/04
    • A high-order harmonic device of a cavity filter including a base and a lid cover the base is disclosed. The base has a through groove connecting to an upper and a lower portion. The base has a plurality of output terminal with metallic conductor extending into the inner side formed on the surface of the sidewall. The base has resonance space formed indented to receive the metallic conductor and extending to connect to the through groove. The lid has a plurality of threading holes formed corresponding to chambers and partitions received with adjusting elements for height adjustment. The adjusting elements has the resonance bars corresponding to every chamber and the suppressing bars corresponding to every partition. By adjusting suppressing bar and the partition to a predetermined distance, the space of the channel for transmitting the high-order harmonic wave can be reduced to suppress noise produced by high-order harmonic wave.
    • 公开了一种包括基座和盖子覆盖基座的空腔滤波器的高次谐波装置。 基部具有连接到上部和下部的通孔。 基座具有多个输出端子,金属导体延伸到形成在侧壁表面上的内侧。 底座具有形成为凹入的谐振空间,用于容纳金属导体并延伸以连接到通孔。 所述盖具有多个对应于室和隔板形成的穿孔,所述隔间和隔板被接纳有用于高度调节的调节元件。 调节元件具有对应于每个室的共振杆和对应于每个分区的抑制棒。 通过将抑制棒和隔板调节到预定距离,可以减少用于发送高次谐波的通道的空间,以抑制由高次谐波产生的噪声。
    • 3. 发明授权
    • Pixel structure
    • 像素结构
    • US08575612B2
    • 2013-11-05
    • US13461798
    • 2012-05-02
    • Chien-Chih LeePei-Yi ShenChing-Yang ChengShu-Ming Huang
    • Chien-Chih LeePei-Yi ShenChing-Yang ChengShu-Ming Huang
    • H01L29/04
    • H01L27/1259G02F1/136213G02F1/136227H01L27/1255H01L28/40
    • The present invention provides a pixel structure including a substrate, a patterned electrode disposed on the substrate, a first insulating layer disposed on the patterned electrode, a common electrode disposed on the first insulating layer, a second insulating layer disposed on the common electrode, and a drain disposed on the second insulating layer. The first insulating layer has a first through hole, and the second insulating layer has a second through hole. The drain includes a first portion electrically connected to the patterned electrode via the first through hole and the second through hole, and a second portion extending onto the common electrode. The common electrode is coupled with the patterned electrode to form a first storage capacitor and is coupled with the second portion to form a second storage capacitor.
    • 本发明提供一种像素结构,包括基板,设置在基板上的图案化电极,设置在图案化电极上的第一绝缘层,设置在第一绝缘层上的公共电极,设置在公共电极上的第二绝缘层,以及 设置在第二绝缘层上的漏极。 第一绝缘层具有第一通孔,第二绝缘层具有第二通孔。 漏极包括经由第一通孔和第二通孔与图案化电极电连接的第一部分和延伸到公共电极上的第二部分。 公共电极与图案化电极耦合以形成第一存储电容器,并与第二部分耦合以形成第二存储电容器。
    • 4. 发明授权
    • Etching method for multi-level terraced structures
    • 多级梯田结构的蚀刻方法
    • US06168905A
    • 2001-01-02
    • US09143114
    • 1998-08-28
    • Chen-Kuei ChungChien-Chih LeeChing-Yi Wu
    • Chen-Kuei ChungChien-Chih LeeChing-Yi Wu
    • G03C500
    • G02B5/1857G03F7/001
    • An etching method for a semiconductor substrate to form a multi-level terraced structures is disclosed. A photomask is used to prepare a etching mask on a semiconductor substrate for a multi-level terraced structure. Said photomask has a pattern with a plurality of regions. Widths of the masked areas of the pattern are so designed that the etching rate of the etchant to respective parts of the substrate may be controlled, whereby a multi-level terraced structure with decided widths and heights of all levels may be prepared with one single photomask under one single etching step. This invention also discloses the photomask used in the etching method and products prepared according to the etching method.
    • 公开了一种用于形成多层次梯形结构的半导体衬底的蚀刻方法。 使用光掩模来制备用于多层梯田结构的半导体衬底上的蚀刻掩模。 所述光掩模具有具有多个区域的图案。 图案的掩蔽区域的宽度被设计成可以控制蚀刻剂对基板的各个部分的蚀刻速率,由此可以用一个单个光掩模来制备具有所有等级的确定的宽度和高度的多层次的梯形结构 在一个单一蚀刻步骤下。 本发明还公开了蚀刻方法中使用的光掩模和根据蚀刻方法制备的产品。
    • 9. 发明授权
    • Antenna feed copling structure of a duplexer
    • 双工器的天线馈线结构
    • US07898361B2
    • 2011-03-01
    • US12402508
    • 2009-03-12
    • Jen-Ti PengChien-Chih Lee
    • Jen-Ti PengChien-Chih Lee
    • H01P5/12
    • H01P1/2136
    • An antenna feed coupling structure of a duplexer is disclosed to include a base defining a detoured resonance cavity and a T-shaped feed-in cavity perpendicularly intersecting the resonance cavity and a signal input port in connection with the head of the feed-in cavity, a cover closing the base, and adjustment rods mounted in the base and suspending in the resonance cavity and the feed-in cavity. The adjustment rods include two feed-in adjustment rods and two coupling structure adjustment rods suspending in the intersected area between the resonance cavity and the feed-in cavity and respectively kept in horizontal and in vertical relative to the resonance cavity and rotatable inwards and outwards to adjust the feed-in amount and coupling structure amount of the antenna feed coupling structure respectively.
    • 公开了一种双工器的天线馈电耦合结构,其包括限定迂回谐振腔和与谐振腔垂直相交的T形馈入腔和与馈入腔的头相连的信号输入端的基座, 封闭基座的盖子以及安装在基座中并悬挂在谐振腔和馈入腔中的调节杆。 调节杆包括两个馈入调节杆和两个耦合结构调节杆,悬挂在谐振腔和馈入腔之间的相交区域中,并且分别保持在相对于谐振腔的水平和垂直方向并向内和向外可旋转 分别调整天线馈电耦合结构的馈入量和耦合结构量。
    • 10. 发明授权
    • Anisotropic wet etching
    • 各向异性湿蚀刻
    • US06395645B1
    • 2002-05-28
    • US09137446
    • 1998-08-06
    • Chen-Kuei ChungChien-Chih LeeChing-Yi Wu
    • Chen-Kuei ChungChien-Chih LeeChing-Yi Wu
    • H01L21302
    • H01L21/30608H01L21/3083
    • A method for anisotropic wet etching is disclosed. In to this invention, a photo mask for the etching mask suited in the anisotropic wet etching is provided. In the photo mask, a pattern with a series of adjacent corners having a substantially rectangular, angle is formed. At the corner areas compensational patterns comprising masked grids are prepared. The pattern on the photo mask is then transferred to an etching mask of a semiconductor substrate such that a multi-level terrace structure with fine corners may be prepared during the etching of the substrate. The method of this invention is also applicable to semiconductor materials with the same diamond structure as that of silicon.
    • 公开了一种用于各向异性湿蚀刻的方法。 在本发明中,提供了适用于各向异性湿蚀刻中的蚀刻掩模用光掩模。 在光掩模中,形成具有大致矩形角的一系列相邻角的图案。 在拐角处,准备包括掩蔽网格的补偿图案。 然后将光掩模上的图案转移到半导体衬底的蚀刻掩模,使得可以在蚀刻基板期间制备具有细角的多层平台结构。 本发明的方法也适用于具有与硅相同的金刚石结构的半导体材料。