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1. 发明授权

US06801096B1 Ring oscillator with embedded scatterometry grate array 有权
标题翻译：环形振荡器带有嵌入式散射仪格栅阵列
公开(公告)号：US06801096B1
公开(公告)日：2004-10-05
申请号：US10348014
申请日：2003-01-22
申请人： Hormuzdiar E. Nariman , Derick J. Wristers , James F. Buller
发明人： Hormuzdiar E. Nariman , Derick J. Wristers , James F. Buller
IPC分类号： H03B2700
CPC分类号： H01L27/088 , H03K3/0315
摘要： A MOS ring oscillator includes a number of serially connected inverter stages with each stage comprising a MOS transistor pair. At least one of the transistors also comprises a scatterometry grate array, which is used during manufacturing of the ring oscillator to obtain scatterometry measurements that allow polysilicon lines of the MOS ring oscillator to have widths of less than 60 nm. A method includes forming at least one grate array above a substrate, illuminating the grate array, measuring light reflected off of the grate array to generate an optical characteristic trace for the grate array, and comparing the generated optical characteristic trace to a target optical characteristic trace that corresponds to a grate array having a desired profile. The generated trace can further be used to calibrate the ring oscillator
摘要翻译： MOS环形振荡器包括多个串联的反相器级，每级包括一个MOS晶体管对。至少一个晶体管还包括散射测量格栅阵列，其在环形振荡器的制造期间使用以获得允许MOS环形振荡器的多晶硅线具有小于60nm的宽度的散射测量。一种方法包括在衬底上形成至少一个格栅阵列，照亮格栅阵列，测量从格栅阵列反射的光，以产生格栅阵列的光学特征曲线，并将生成的光学特征曲线与目标光学特征曲线对应于具有所需轮廓的炉排阵列。产生的轨迹可进一步用于校准环形振荡器

2. 发明授权

US06812506B1 Polysilicon linewidth measurement structure with embedded transistor 有权
标题翻译：具有嵌入式晶体管的多晶硅线宽测量结构
公开(公告)号：US06812506B1
公开(公告)日：2004-11-02
申请号：US10298923
申请日：2002-11-19
申请人： Hormuzdiar E. Nariman , Derick J. Wristers
发明人： Hormuzdiar E. Nariman , Derick J. Wristers
IPC分类号： H01L2710
CPC分类号： H01L22/34 , H01L21/823425 , H01L27/088
摘要： A semiconductor device includes a grating structure having a plurality of parallel lines, and at least one of the multiple parallel lines is a gate electrode line of a transistor, which includes source/drain regions proximate to the gate electrode line, and vias extending to the gate electrode line and the source/drain regions. A method of manufacturing the semiconductor device is also disclosed.
摘要翻译：一种半导体器件包括具有多个平行线的光栅结构，多个平行线中的至少一个是晶体管的栅极电极线，其包括靠近栅电极线的源/漏区，以及延伸到栅电极线和源/漏区。还公开了制造半导体器件的方法。

3. 发明授权

US07253045B1 Selective P-channel VT adjustment in SiGe system for leakage optimization 有权
标题翻译： SiGe系统中的选择性P沟道VT调整用于泄漏优化
公开(公告)号：US07253045B1
公开(公告)日：2007-08-07
申请号：US10889026
申请日：2004-07-13
申请人： Derick J. Wristers , David Wu , Hormuzdiar E. Nariman
发明人： Derick J. Wristers , David Wu , Hormuzdiar E. Nariman
IPC分类号： H01L27/092 , H01L29/786
CPC分类号： H01L21/823807 , H01L21/823814 , H01L29/1054
摘要： A method of manufacturing a semiconductor device includes forming a silicon germanium layer and a N-channel transistor and a P-channel transistor over the silicon germanium layer. A beta ratio of the N-channel transistor to the P-channel transistor is about 1.8 to about 2.2. A semiconductor device is also disclosed.
摘要翻译：制造半导体器件的方法包括在硅锗层上形成硅锗层和N沟道晶体管以及P沟道晶体管。 N沟道晶体管与P沟道晶体管的β比率为约1.8至约2.2。还公开了一种半导体器件。

4. 发明授权

US06822260B1 Linewidth measurement structure with embedded scatterometry structure 有权
标题翻译：具有嵌入散射结构的线宽测量结构
公开(公告)号：US06822260B1
公开(公告)日：2004-11-23
申请号：US10298664
申请日：2002-11-19
申请人： Hormuzdiar E. Nariman , Derick J. Wristers
发明人： Hormuzdiar E. Nariman , Derick J. Wristers
IPC分类号： H01L2358
CPC分类号： H01L22/34
摘要： A method of manufacturing a semiconductor device includes depositing a layer over a substrate and etching the layer to form a grating structure, a cross bridge test structure and a line width measurement structure. The grating structure includes a plurality of parallel lines and one of the multiple parallel lines is connected to the line width measurement structure and the cross bridge test structure. A scatterometry test is performed on the grating structure to obtain a line width and this width is compared to a line width calculated using the line width measurement structure. A semiconductor device is also disclosed.
摘要翻译：制造半导体器件的方法包括在衬底上沉积层并蚀刻该层以形成光栅结构，交叉桥测试结构和线宽测量结构。光栅结构包括多条平行线，并且多条平行线之一连接到线宽测量结构和交叉桥测试结构。对光栅结构进行散射测试以获得线宽，并将该宽度与使用线宽测量结构计算的线宽进行比较。还公开了一种半导体器件。

5. 发明授权

US06785009B1 Method of using high yielding spectra scatterometry measurements to control semiconductor manufacturing processes, and systems for accomplishing same 有权
标题翻译：使用高产量光谱散射测量来控制半导体制造工艺的方法以及用于实现其的系统
公开(公告)号：US06785009B1
公开(公告)日：2004-08-31
申请号：US10084987
申请日：2002-02-28
申请人： James Broc Stirton , Kevin R. Lensing , Hormuzdiar E. Nariman , Steven P. Reeves
发明人： James Broc Stirton , Kevin R. Lensing , Hormuzdiar E. Nariman , Steven P. Reeves
IPC分类号： G01B1114
CPC分类号： G01N21/956 , G01N21/4788 , H01L22/12 , H01L2924/0002 , H01L2924/00
摘要： A method of using high yielding spectra scatterometry measurements to control semiconductor manufacturing processes and systems for accomplishing same is disclosed. In one embodiment, the method comprises providing a library comprised of at least one target optical characteristic trace of a grating structure comprised of a plurality of gate stacks, the target trace corresponding to a semiconductor device having at least one desired electrical performance characteristic, providing a substrate having at least one grating structure formed thereabove, the formed grating structure comprised of a plurality of gate stacks, illuminating at least one grating structure formed above said substrate, measuring light reflected off of the grating structure formed above the substrate to generate an optical characteristic trace for the formed grating structure, and comparing the generated optical characteristic trace to the target trace.
摘要翻译：公开了一种使用高产量光谱散射测量来控制半导体制造工艺和实现其的系统的方法。在一个实施例中，该方法包括提供由至少一个由多个栅极堆叠组成的光栅结构的目标光学特征迹线的库，该目标轨迹对应于具有至少一个期望的电气性能特征的半导体器件，衬底，其具有形成在其上的至少一个光栅结构，所形成的光栅结构由多个栅极堆叠组成，照射形成在所述衬底上方的至少一个光栅结构，测量从衬底上形成的光栅结构反射的光，以产生光学特性跟踪形成的光栅结构，并将生成的光学特征曲线与目标轨迹进行比较。

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