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1. 发明授权

US6121118A Chip separation device and method 有权
标题翻译：芯片分离装置及方法
公开(公告)号：US6121118A
公开(公告)日：2000-09-19
申请号：US369683
申请日：1999-08-05
申请人： Ho Tae Jin , In Pyo Hong , Byung Man Kim , Jeong Ho Bang
发明人： Ho Tae Jin , In Pyo Hong , Byung Man Kim , Jeong Ho Bang
IPC分类号： H01L21/301 , H01L21/00 , H01L21/78 , H01L21/46
CPC分类号： H01L21/67092 , H01L21/78
摘要： A method for separating semiconductor devices formed on a semiconductor wafer includes: inscribing the semiconductor wafer along scribe lines; mounting the inscribed semiconductor wafer on a stage including an elastic structure and vacuum suction holes that can be aligned to respective semiconductor chips; applying a vacuum through the vacuum suction holes to hold the semiconductor wafer on the elastic structure; and applying a mechanical force to the semiconductor wafer to break the wafer along the scribe lines and separate the semiconductor devices. A device for separating semiconductor devices formed on a wafer includes a stage including an elastic structure and vacuum suction holes that can be aligned with respective semiconductor chips of the semiconductor wafer and a press for applying mechanical force to the semiconductor wafer on the elastic structure. Since use of a wafer tape is avoided in cutting a semiconductor wafer, package cracking and delamination caused by wafer tape adhesive stuck to the back surface of a semiconductor chip are avoided.
摘要翻译：用于分离形成在半导体晶片上的半导体器件的方法包括：沿着划线刻录半导体晶片; 将内接的半导体晶片安装在包括弹性结构的台上，以及可以对准各自的半导体芯片的真空吸孔; 通过真空吸孔施加真空以将半导体晶片保持在弹性结构上; 以及向所述半导体晶片施加机械力以使所述晶片沿着划线断开并分离所述半导体器件。用于分离形成在晶片上的半导体器件的器件包括：包括弹性结构的台和可以与半导体晶片的各个半导体芯片对准的真空吸孔以及用于在弹性结构上向半导体晶片施加机械力的压力机。由于在切割半导体晶片时避免了晶圆带的使用，所以避免了由于贴在半导体芯片的背面上的晶片胶带引起的封装开裂和分层。

2. 发明授权

US5684328A Semiconductor chip package using improved tape mounting 失效
标题翻译：半导体芯片封装采用改进的磁带安装
公开(公告)号：US5684328A
公开(公告)日：1997-11-04
申请号：US684989
申请日：1996-07-22
申请人： Ho Tae Jin , In Pyo Hong , Chang Eui Ko
发明人： Ho Tae Jin , In Pyo Hong , Chang Eui Ko
IPC分类号： H01L23/50 , H01L21/52 , H01L23/495 , H01L23/52
CPC分类号： H01L23/4951 , H01L23/49541 , H01L23/49558 , H01L2224/32245 , H01L2224/48091 , H01L2224/48247 , H01L2224/4826 , H01L2224/73215 , H01L24/48 , H01L2924/00014 , H01L2924/14 , Y10T29/53178
摘要： An LOC type semiconductor package and a fabricating method thereof comprises first and second through holes formed at inner leads and bus bars of the LOC-type lead frame, and third through holes formed at the tape which is bonded with the lower side of the inner leads and the bus bars, by pins at a tape cutter. Thus, air existing at both tape during the bonding process effectively flows out so as to prevent the trapping of air bubbles. Accordingly, during the wire bonding process, wire shorting and damage to the package body can be prevented. Since EMC is deposited into the first and the second through holes and supports the inner leads and the bus bars during the molding of the semiconductor package, the reliability of the semiconductor package can be improved.
摘要翻译： LOC型半导体封装及其制造方法包括形成在LOC型引线框架的内引线和汇流条上的第一通孔和第二通孔，以及形成在带上的第三通孔，该通孔与内引线和母线，通过带式切割机的销钉。因此，在粘合过程中存在于两个胶带处的空气有效地流出，以防止气泡的捕获。因此，在引线接合工艺期间，可以防止线短路和对封装体的损坏。由于在半导体封装的成型期间，EMC被沉积到第一和第二通孔中并且支撑内部引线和母线，所以可以提高半导体封装的可靠性。

3. 发明授权

US06207478B1 Method for manufacturing semiconductor package of center pad type device 失效
标题翻译：中心垫型装置的半导体封装的制造方法
公开(公告)号：US06207478B1
公开(公告)日：2001-03-27
申请号：US09333772
申请日：1999-06-15
申请人： Myung Kee Chung , Jin Soon Lee , Ho Tae Jin , In Pyo Hong
发明人： Myung Kee Chung , Jin Soon Lee , Ho Tae Jin , In Pyo Hong
IPC分类号： H01L2144
CPC分类号： H01L21/561 , H01L21/56 , H01L23/3114 , H01L24/11 , H01L24/12 , H01L24/86 , H01L24/97 , H01L2224/0231 , H01L2224/0401 , H01L2224/13099 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01033 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/12044 , H01L2924/15151
摘要： In accordance with an embodiment of the present invention, a method for manufacturing a semiconductor package of a center pad type device includes: attaching a semiconductor chip to a tape wiring substrate where the chip has bonding pads along a center line of its active surface and the substrate has multiple beam leads; interposing an elastomer between the semiconductor chip and the tape wiring substrate; bonding the beam leads to the respective bonding pads exposed through an opening of the elastomer; and encapsulating the opening and a perimeter of the semiconductor chip with a liquid encapsulant. The method may use a cover film. When the cover film is used, the encapsulation can be done in two ways. In one way, an encapsulant is dispensed on a portion of tape wiring substrate that is close to one end of the opening of the elastomer. The encapsulant is then dispensed along a perimeter of the semiconductor chip. In the other way, the cover film has a number of air vents, and an encapsulant is dispensed at both ends of the opening as well as along the perimeter of the semiconductor chip. In the both ways, the encapsulation may be performed under vacuum. When the cover film is not used, an encapsulant is dispensed in the opening of the elastomer through an opening of the tape wiring substrate. The tape wiring substrate is then turned upside down, and the encapsulant is dispensed along a perimeter of the semiconductor chip.
摘要翻译：根据本发明的实施例，一种用于制造中心焊盘型器件的半导体封装的方法包括：将半导体芯片附接到带状布线基板，其中芯片具有沿其活性表面的中心线的接合焊盘，并且衬底具有多个光束引线; 在半导体芯片和带状布线基板之间插入弹性体; 将光束接合到通过弹性体的开口暴露的各个焊盘; 并用液体密封剂封装半导体芯片的开口和周边。该方法可以使用覆盖膜。当使用覆盖膜时，封装可以通过两种方式完成。以一种方式，将密封剂分配在接近弹性体开口的一端的胶带布线基板的一部分上。然后沿着半导体芯片的周边分配密封剂。另一方面，覆盖膜具有多个通风口，并且在开口的两端以及沿着半导体芯片的周边分配密封剂。在这两种方式中，封装可以在真空下进行。当不使用覆盖膜时，通过带状布线基板的开口将密封剂分配在弹性体的开口中。然后将带状布线基板上下颠倒，并沿着半导体芯片的周边分配密封剂。

4. 发明授权

US06386432B1 Semiconductor die pickup method that prevents electrostatic discharge 失效
标题翻译：防止静电放电的半导体芯片拾取方法
公开(公告)号：US06386432B1
公开(公告)日：2002-05-14
申请号：US09710517
申请日：2000-11-10
申请人： Ho Tae Jin , Hee Kook Choi
发明人： Ho Tae Jin , Hee Kook Choi
IPC分类号： B23K3102
CPC分类号： H01L21/67144 , H01L21/6838 , H01L2924/0002 , H05K13/0409 , Y10T29/53191 , H01L2924/00
摘要： An embodiment of the present invention provides a pickup tool in accordance with the present invention includes multiple contact parts, which contact a passivation layer of a semiconductor chip so that the contact parts are far from chip pads and fuses when holding the semiconductor chip. Furthermore, a die bonding apparatus has one or two pickup tools, an aligning stage, and a bond stage or a bond head.
摘要翻译：本发明的一个实施例提供一种根据本发明的拾取工具，其包括多个接触部分，其接触半导体芯片的钝化层，使得当保持半导体芯片时接触部分远离芯片焊盘和熔丝。此外，管芯接合装置具有一个或两个拾取工具，对准阶段和结合阶段或结合头。

5. 发明授权

US5979739A Semiconductor die bonding apparatus having multiple bonding system 失效
标题翻译：具有多个接合系统的半导体管芯接合装置
公开(公告)号：US5979739A
公开(公告)日：1999-11-09
申请号：US949337
申请日：1997-10-14
申请人： Ho Tae Jin , Jae Ky Roh , Sung Bok Hong , Hee Kook Choi
发明人： Ho Tae Jin , Jae Ky Roh , Sung Bok Hong , Hee Kook Choi
IPC分类号： H01L21/52 , H01L21/00 , H01L21/60 , H01L23/28 , B23K1/00 , B23K1/14 , B23K37/00
CPC分类号： H01L21/67144 , H01L2924/0002
摘要： An apparatus for bonding semiconductor dies to lead frame strips, each of the lead frame strips having a plurality of adjacently spaced lead frame units. The apparatus includes at least two bond units, each attaching the dies to one of the lead frame strips at a time and one die supply unit supplying the dies alternately to the bond units. The apparatus also includes at least two lead frame strip supply units, each supplying the lead frame strips to respective ones of the bond units.
摘要翻译：一种用于将半导体管芯接合以引导框架条的装置，每个引线框带具有多个相邻间隔的引线框架单元。该装置包括至少两个粘合单元，每个粘合单元每个将模具连接到一个引线框架条上，一个模具供应单元将模具交替地提供给粘结单元。该设备还包括至少两个引线框架条供应单元，每个引线框条带供应单元将引线框条提供给相应的粘合单元。

6. 发明授权

US5765277A Die bonding apparatus with a revolving pick-up tool 失效
标题翻译：具有旋转拾取工具的模具粘接装置
公开(公告)号：US5765277A
公开(公告)日：1998-06-16
申请号：US723859
申请日：1996-09-30
申请人： Ho Tae Jin , Sung Bok Hong , Jae Ky Roh , Hee Kook Choi
发明人： Ho Tae Jin , Sung Bok Hong , Jae Ky Roh , Hee Kook Choi
IPC分类号： H01L21/52 , H01L21/60 , H05K13/04 , H01L21/58
CPC分类号： H05K13/0404 , H01L2224/48247 , H01L2224/48257 , H01L2924/01322 , Y10S29/044 , Y10S414/141 , Y10T29/49121 , Y10T29/53178 , Y10T29/53191
摘要： A die bonding apparatus for separating a chip from a tested wafer including a plurality of chips and attaching the chip to a lead frame comprising a chip-transferring part for separating the chip from the wafer and transferring the chip to a place where a lead frame is prepared for die bonding; a stage where the transferred chip is placed; a bond head for compressing the chip and the lead frame to bond them together; and a lead frame-transferring part for transferring the lead frame to a predetermined place, the chip-transferring part being comprised of a first rectilinearly moving picking tool and a second revolving picking tool.
摘要翻译：一种芯片接合装置，用于从包括多个芯片的测试晶片分离芯片并将芯片附接到引线框架，引线框架包括用于将芯片与晶片分离的芯片转移部分，并将芯片传送到引线框架准备芯片贴合; 转移芯片放置的阶段; 用于压缩芯片和引线框架以将它们结合在一起的粘合头; 以及用于将引线框架传送到预定位置的引线框架传送部件，所述芯片传送部件包括第一直线移动的拾取工具和第二旋转拾取工具。

7. 发明授权

US06321971B1 Die collet for a semiconductor chip and apparatus for bonding semiconductor chip to a lead frame 有权
标题翻译：用于半导体芯片的夹头和用于将半导体芯片接合到引线框架的装置
公开(公告)号：US06321971B1
公开(公告)日：2001-11-27
申请号：US09172715
申请日：1998-10-13
申请人： Ho Tae Jin , Hee Kook Choi
发明人： Ho Tae Jin , Hee Kook Choi
IPC分类号： B23K100
CPC分类号： H01L21/67144 , H01L21/6838 , H01L2924/0002 , H05K13/0409 , Y10T29/53191 , H01L2924/00
摘要： A die collet for a semiconductor chip having an exposed electrical structure, the die collet including a body having a vacuum line connected thereto, the die collet including a plurality of parts each having a vacuum hole communicating with the vacuum line. Apparatus for bonding a semiconductor chip to a lead frame, the apparatus including a first die collet for picking up the semiconductor chip, on aligning stage for receiving the semiconductor chip from the first pickup tool and aligning the semiconductor chip. A second die collet picks up the semiconductor chip from the aligning stage and places the semiconductor chip on a lead frame. The first and second die collets are constructed as described above.
摘要翻译：一种具有暴露的电气结构的半导体芯片的裸片夹头，所述夹具包括具有连接到其上的真空线的主体，所述夹具包括多个部件，所述多个部件具有与所述真空管线连通的真空孔。用于将半导体芯片接合到引线框架的装置，该装置包括用于拾取半导体芯片的第一芯片夹头，用于从第一拾取工具接收半导体芯片的对准台和对准该半导体芯片。第二个管芯从对准台拾取半导体芯片，并将半导体芯片放置在引线框架上。如上所述构造第一和第二模头夹头。

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