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1. 发明专利

JP2005198076A Information processing device 有权
标题翻译：信息处理设备
公开(公告)号：JP2005198076A
公开(公告)日：2005-07-21
申请号：JP2004002951
申请日：2004-01-08
申请人： Hitachi Ltd , 株式会社日立製作所
发明人： OZAWA SHOICHI , SHIRAISHI MASAHIRO , ONOZUKA AKIHIRO
IPC分类号： H04L12/28
摘要： PROBLEM TO BE SOLVED: To provide an information processing device which avoids the collision of the communication right of a communication line and increases a communication line usage rate by a simple structure.
SOLUTION: An information processing device has a node number register storing a node number of the information processing device itself, and a line master control unit conducting the control processing of an order of communication. The line master control unit determines whether or not an order is the one that executes communication by the information processing device itself, by comparing the node number of a source described in a communication right open frame transmitted from other information processing device with a node number of the information processing device itself stored in the above-mentioned node number register.
COPYRIGHT: (C)2005,JPO&NCIPI
摘要翻译：要解决的问题：提供一种避免通信线路的通信权利的冲突并通过简单的结构增加通信线路使用率的信息处理设备。解决方案：信息处理设备具有存储信息处理设备本身的节点号的节点号寄存器和进行通信顺序的控制处理的线路主控制单元。线路主控制单元通过将从其他信息处理设备发送的通信右侧开放帧中描述的源的节点号与节点号的比较来确定顺序是否是由信息处理设备本身执行通信的顺序信息处理设备本身存储在上述节点号寄存器中。版权所有（C）2005，JPO＆NCIPI

2. 发明专利

JP2010200016A Line switch device and plant control system 有权
标题翻译：线路开关装置和设备控制系统
公开(公告)号：JP2010200016A
公开(公告)日：2010-09-09
申请号：JP2009042938
申请日：2009-02-25
申请人： Hitachi Information & Control Solutions Ltd , Hitachi Ltd , 株式会社日立情報制御ソリューションズ , 株式会社日立製作所
发明人： TAHARA YUKIKO , NISHIOKA ATSUSHI , KIYOFUJI YASUHIRO , KOBAYASHI EIJI , SHIMIZU KATSUTO , OTSUKA YUSAKU , SHIMIZU TOSHIKI , ONOZUKA AKIHIRO , FUNAKI SATORU , ISHIKAWA MASAKAZU , SEKI YUSUKE , SASAKI WATARU , MASUKO NAOYA , NAKANO AKIHIRO , OGURA MAKOTO , OZAWA SHOICHI
IPC分类号： H04L29/14 , H04B1/74
摘要： PROBLEM TO BE SOLVED: To provide a new line switching device for suppressing damages to a line fault, to a minimum, improving the availability, and enhancing cost-effectiveness in the system as a whole, and to provide a plant control system which uses the device. SOLUTION: The line switching devices corresponding to each input/output device are arranged in order to control the plurality of input/output devices with the use of a single CPU. An ID is imparted to each line switching device. An ID for uniquely identifying the line switching device is embedded in a data frame to be transmitted from the CPU. By having the line switching device allow only the data frame with IDs matching to pass, collisions of the data frames, which occurs when the data frame improperly comes-in to a control line, are avoided. COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题：提供一种用于抑制对线路故障的损害的新的线路切换装置，至少提高系统的可用性和提高成本效益，并且提供一种工厂控制系统使用该设备。解决方案：对应于每个输入/输出设备的线路切换设备被布置以便使用单个CPU来控制多个输入/输出设备。 ID被赋予每个线路交换设备。用于唯一地识别线路交换设备的ID被嵌入在要从CPU发送的数据帧中。通过使线路交换装置仅允许具有匹配的ID的数据帧通过，当数据帧不正确地进入控制线时发生的数据帧的冲突被避免。版权所有（C）2010，JPO＆INPIT

3. 发明专利

JP2014229130A 高信頼プロセッサおよびそれを用いた高信頼制御装置审中-公开
标题翻译：高可靠性处理器和高可靠性控制装置
公开(公告)号：JP2014229130A
公开(公告)日：2014-12-08
申请号：JP2013109162
申请日：2013-05-23
申请人：株式会社日立製作所 , Hitachi Ltd
发明人： FUJITA MAKOTO , SAKATA TERUAKI , SHIRAISHI MASAHIRO , NAKAMIGAWA TETSUAKI , OZAWA SHOICHI
IPC分类号： G06F11/18 , G06F9/30 , G06F9/38
摘要：【課題】少ない回路規模の高信頼プロセッサを実現する。【解決手段】高信頼プロセッサは、誤り訂正符号で符号化されたプログラム及びデータを格納するメモリ部と、メモリ部から読み出されるプログラムに従って、プログラムの命令の解釈、命令の解釈に基づいた演算の実行、およびメモリ部への演算の結果を格納する、少なくとも三重化された基本制御部と、基本制御部の出力を多数決して出力する多数決部とを有し、メモリ部の、誤り訂正符号で符号化されたデータを、少なくとも三重化された基本制御部の各々が誤り訂正する。【選択図】図1
摘要翻译：要解决的问题：实现具有小电路规模的高度可靠的处理器。解决方案：高度可靠的处理器包括：存储单元，用于存储程序和由纠错码编码的数据; 基本控制单元，至少三重，用于执行程序的顺序的解释，基于对命令的解释的操作的执行，以及根据从存储器单元读出的程序将操作结果存储到存储器单元 ; 以及多数确定单元，用于通过多数输出基本控制单元的输出。由存储器单元中的纠错码编码的数据由至少三重基本控制单元中的每一个进行纠错。

4. 发明专利

JP2008269468A Process control system to multiplexed input/output device 有权
标题翻译：多路输入/输出装置的过程控制系统
公开(公告)号：JP2008269468A
公开(公告)日：2008-11-06
申请号：JP2007114271
申请日：2007-04-24
申请人： Hitachi Information & Control Solutions Ltd , Hitachi Ltd , 株式会社日立情報制御ソリューションズ , 株式会社日立製作所
发明人： NAKANO AKIHIRO , YOSHIKAWA HIDEYUKI , ONOZUKA AKIHIRO , FUJITA MAKOTO , BANDO AKIRA , KOBAYASHI MASAMITSU , SHIRAISHI MASAHIRO , KOBAYASHI EIJI , ISHIKAWA MASAKAZU , SASAKI WATARU , OTSUKA YUSAKU , MASUKO NAOYA , OZAWA SHOICHI , OGURA MAKOTO
IPC分类号： G05B9/03 , G05B9/02 , G06F13/14
摘要： PROBLEM TO BE SOLVED: To eliminate physical restriction to heighten flexibility of a multiplex configuration by imparting a logical address to achieve a mounting configuration of multiplexing.
SOLUTION: This process control system has: a process control device issuing a requirement instruction; a multiplexed input/output device 103 receiving the requirement instruction; and a changeover function of a standby or a master in the input/output device. The input/output device has one or more input devices or output devices in each unit 102a, b, and each is mounted in an arbitrary slot 108. The logical address that is a peculiar number or code is arbitrarily imparted to the input device or the output device. The process control device 101 address-controls the input/output device 103 by use of the logical address to mount the input devices or the output devices 103a-3, 103b-3 each having the multiplex configuration in the slots of separate units 109a, 109b.
COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：要解决的问题：为了消除物理限制，通过赋予逻辑地址以实现复用的安装配置来提高多路复用配置的灵活性。
解决方案：该过程控制系统具有：发出需求指令的过程控制装置; 接收要求指令的复用输入/输出装置103; 以及输入/输出设备中的待机或主机的切换功能。输入/输出设备在每个单元102a，b中具有一个或多个输入设备或输出设备，并且每个单元被安装在任意时隙108中。作为特殊数字或代码的逻辑地址被任意地赋予输入设备或输出设备。过程控制设备101通过使用逻辑地址来对输入/输出设备103进行寻址控制，以将具有多路复用配置的输入设备或输出设备103a-3,103b-3安装在单独单元109a，109b的槽中。版权所有（C）2009，JPO＆INPIT

5. 发明专利

JP2008009796A Control device and control method 有权
标题翻译：控制装置和控制方法
公开(公告)号：JP2008009796A
公开(公告)日：2008-01-17
申请号：JP2006180650
申请日：2006-06-30
申请人： Hitachi Information & Control Solutions Ltd , Hitachi Ltd , 株式会社日立情報制御ソリューションズ , 株式会社日立製作所
发明人： BANDO AKIRA , KOBAYASHI MASAMITSU , SHIRAISHI MASAHIRO , ONOZUKA AKIHIRO , UMEHARA TAKASHI , OGURA MAKOTO , KOBAYASHI EIJI , ISHIKAWA MASAKAZU , FURUTA YASUYUKI , MASUKO NAOYA , FUNAKI SATORU , SEKI YUSUKE , OTANI TATSUYUKI , SASAKI WATARU , OTSUKA YUSAKU , NAKANO AKIHIRO , OZAWA SHOICHI , IWASAKI YU , KASAHARA TAKENORI
IPC分类号： G06F13/00
摘要： PROBLEM TO BE SOLVED: To solve problems of complication of devices and inhibition of response speed/input and output on-time property in attainment of function security in a programmable electronic device, whereas diagnosis with a software program must be performed for cutting a closed loop which needs diagnosis for own accidental failures of a diagnostic device, and microprocessors must be consequently mounted not only on a logic arithmetic device but also on an input and output device to execute a diagnostic program.
SOLUTION: In the control device for transmitting and receiving data from a central arithmetic storage device to a communication control device through a serial transmission line, and collecting/distributing data of an input and output device from the communication control device through a parallel transmission line, a diagnostic device for the parallel transmission line is started according to instruction from a central control unit, and diagnosis of the input and output device is performed successively to diagnosis of the transmission line. A data input and output timing for the input and output device is instructed from the central arithmetic storage device. Accordingly, on-time property of data input and output is kept while suppressing reduction in response speed by diagnosis.
COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：要解决的问题：为了解决在可编程电子设备中实现功能安全性时设备复杂化和禁止响应速度/输入和输出准时性的问题，而必须执行用于切割的软件程序的诊断需要诊断自身偶然故障的诊断装置的闭环，并且微处理器必须不仅安装在逻辑运算装置上，而且还必须安装在输入和输出装置上以执行诊断程序。解决方案：在用于通过串行传输线从中央算术存储装置向通信控制装置发送和接收数据的控制装置中，通过并行从通信控制装置收集/分配输入和输出装置的数据传输线路，根据来自中央控制单元的指令启动用于并行传输线路的诊断设备，连续执行输入和输出设备的诊断以诊断传输线路。从中央算术存储装置指示输入和输出装置的数据输入和输出定时。因此，保持数据输入输出的准时性，同时通过诊断抑制响应速度的降低。版权所有（C）2008，JPO＆INPIT

6. 发明专利

JP2009005412A Control device, control method, and control program 审中-公开
标题翻译：控制装置，控制方法和控制程序
公开(公告)号：JP2009005412A
公开(公告)日：2009-01-08
申请号：JP2008247058
申请日：2008-09-26
申请人： Hitachi Information & Control Solutions Ltd , Hitachi Ltd , 株式会社日立情報制御ソリューションズ , 株式会社日立製作所
发明人： ONOZUKA AKIHIRO , BANDO AKIRA , KOBAYASHI MASAMITSU , SHIRAISHI MASAHIRO , OGURA MAKOTO , UMEHARA TAKASHI , KOBAYASHI EIJI , FUNAKI SATORU , ISHIKAWA MASAKAZU , FURUTA YASUYUKI , NAKANO AKIHIRO , MASUKO NAOYA , OZAWA SHOICHI , KASAHARA TAKENORI , SEKI YUSUKE , OTANI TATSUYUKI , IWASAKI YU
IPC分类号： H04L12/28
摘要： PROBLEM TO BE SOLVED: To provide a communication control device whose transfer performance is not reduced, even when transfer via a line is made, without adding a counter to a plurality of input modules, in a process control system.
SOLUTION: A time counter is provided in a destination communication control device. Furthermore, an input buffer for temporarily storing input data and a time buffer that temporarily stores the time counted value of the time counter are provided in the destination communication control devices. These buffers are simultaneously allowed to update data. The destination communication control device has a means for transmitting a single time value and a plurality of input values. A source communication control device has a means for expanding a single time value into a plurality of input values.
COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：要解决的问题：为了提供一种不降低传送性能的通信控制装置，即使在通过线路传输的情况下，也不在多个输入模块中添加计数器，在过程控制系统中。解决方案：在目的地通信控制设备中提供时间计数器。此外，在目的地通信控制装置中设置用于临时存储输入数据的输入缓冲器和临时存储时间计数器的时间计数值的时间缓冲器。同时允许这些缓冲区更新数据。目的地通信控制装置具有用于发送单个时间值和多个输入值的装置。源通信控制装置具有用于将单个时间值扩展成多个输入值的装置。版权所有（C）2009，JPO＆INPIT

7. 发明专利

JP2014116894A Data transmission device, data reception device and bus system 有权
标题翻译：数据传输设备，数据接收设备和总线系统
公开(公告)号：JP2014116894A
公开(公告)日：2014-06-26
申请号：JP2012271451
申请日：2012-12-12
申请人： Hitachi Ltd , 株式会社日立製作所
发明人： SAKATA TERUAKI , FUJITA MAKOTO , SHIRAISHI MASAHIRO , NAKAMIGAWA TETSUAKI , OZAWA SHOICHI , NISHIMURA TAKAMASA
IPC分类号： H04L1/00
摘要： PROBLEM TO BE SOLVED: To provide a mechanism for easily assembling an existing module whose high reliability is not required in a highly reliable bus system without alteration.SOLUTION: In a data transmission device to be used in a bus system having a transmission part including: a transmission data creation part: an ECC(Error Correcting Code) generation part for generating the ECC of transmission data to be output from the transmission data creation part; and a data output part for transmitting the transmission data and the ECC, the data output part comprises: a rise ECC transmission part for transmitting the ECC synchronously with the rise of a bus clock; and a fall data transmission part for transmitting the transmission data synchronously with the fall of the bus block.
摘要翻译：要解决的问题：提供一种用于容易地组装高可靠性总线系统中不需要高可靠性的现有模块而不改变的机构。解决方案：在用于具有传输部分的总线系统的数据传输装置中，包括：传输数据创建部分：用于产生要从传输数据创建部件输出的传输数据的ECC的ECC（纠错码）生成部分; 以及数据输出部，用于发送所述发送数据和所述ECC，所述数据输出部包括：上升ECC发送部，用于与所述总线时钟的上升同步地发送所述ECC; 以及用于与总线块的下降同步地发送发送数据的下降数据发送部。

8. 发明专利

JP2011024152A Transmission apparatus, communication system and communication method 有权
标题翻译：传输装置，通信系统和通信方法
公开(公告)号：JP2011024152A
公开(公告)日：2011-02-03
申请号：JP2009169681
申请日：2009-07-21
申请人： Hitachi Ltd , 株式会社日立製作所
发明人： HANAWA TERUNORI , SASAKI WATARU , OTSUKA YUSAKU , OGURA MAKOTO , NAKANO AKIHIRO , OZAWA SHOICHI , ONOZUKA AKIHIRO
IPC分类号： H04L12/28
摘要： PROBLEM TO BE SOLVED: To shorten a working time and to prevent erroneous setting by automatically performing a baud rate change in a system such as a field network where a plurality of nodes are connected to the network. SOLUTION: A normal frame is received using a CRC circuit and a baud rate notification frame from a master station is received. While utilizing communication monitoring, baud rate notification monitoring and master station communication monitoring, three states (non-determined state, temporarily determined state and finally determined state) are managed with transition, thereby changing a baud rate. COPYRIGHT: (C)2011,JPO&INPIT
摘要翻译：要解决的问题：为了缩短工作时间，并且通过在诸如连接到网络的多个节点的现场网络的系统中自动执行波特率改变来防止错误设置。解决方案：使用CRC电路接收正常帧，并接收来自主站的波特率通知帧。在利用通信监控，波特率通知监控和主站通信监控的同时，通过转换管理三种状态（非确定状态，临时确定状态和最终确定状态），从而改变波特率。版权所有（C）2011，JPO＆INPIT

9. 发明专利

JP2010003081A Arithmetic processing unit multiplexing control system 有权
标题翻译：算术处理单元多路复用控制系统
公开(公告)号：JP2010003081A
公开(公告)日：2010-01-07
申请号：JP2008160877
申请日：2008-06-19
申请人： Hitachi Information & Control Solutions Ltd , Hitachi Ltd , 株式会社日立情報制御ソリューションズ , 株式会社日立製作所
发明人： SHIMIZU TOSHIKI , BANDO AKIRA , OTSUKA YUSAKU , KIYOFUJI YASUHIRO , KOBAYASHI EIJI , ONOZUKA AKIHIRO , FUNAKI SATORU , ISHIKAWA MASAKAZU , MASUKO HIDEAKI , SEKI YUSUKE , SASAKI WATARU , MASUKO NAOYA , NAKANO AKIHIRO , OGURA MAKOTO , OZAWA SHOICHI , IWASAKI YU
IPC分类号： G06F11/20
CPC分类号： G06F11/2033 , G06F8/67 , G06F11/1658 , G06F11/2028 , G06F11/2038 , G06F11/2097
摘要： PROBLEM TO BE SOLVED: To solve the problems wherein conventionally, a memory data signal of a CPU of a main system is snooped and is acquired by a CPU of a subordinate system via a matching bus, using a parallel bus, which is thus unsuitable for long-distance transmission because the parallel bus vulnerable to noise is used, data to be snooped are the data to be stored in the main system, and thus the subordinate system cannot be processed simultaneously with the main system, causing delays and resulting at the cost of the response speed of the system as a whole, and a separate function for running a plant, without stopping it at updating of a program is required and which makes the functions complicated.
SOLUTION: In a duplexed control system, data to be snooped by a CPU2 of the subordinate system as a stand-by system from a CPU1 of the main system as an execution system are set as control information from a control target to be acquired by the CPU of the main system, and further, advantageously, the phase of a control period of the subordinate system is made to advance more than the phase of the control period of the main system.
COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题为了解决常规的问题，主系统的CPU的存储器数据信号被窥探并且通过下位系统的CPU经由匹配总线获取，使用并行总线，其是因此不利于长距离传输，因为使用易受噪声影响的并行总线，要窥探的数据是要存储在主系统中的数据，因此下级系统不能与主系统同时处理，导致延迟和结果以整个系统的响应速度为代价，并且需要用于运行工厂的单独功能，而不会在更新程序时停止它，并且使功能变得复杂。解决方案：在双工控制系统中，将来自作为执行系统的主系统的CPU1作为备用系统的从属系统的CPU2所窥探的数据从控制目标设置为控制信息由主系统的CPU获取，并且进一步地，使得从属系统的控制周期的相位超过主系统的控制周期的相位。版权所有（C）2010，JPO＆INPIT

10. 发明专利

JP2008009794A Programmable electronic controller, and communication control method for programmable electronic apparatus 审中-公开
标题翻译：可编程电子控制器和可编程电子设备的通信控制方法
公开(公告)号：JP2008009794A
公开(公告)日：2008-01-17
申请号：JP2006180648
申请日：2006-06-30
申请人： Hitachi Information & Control Solutions Ltd , Hitachi Ltd , 株式会社日立情報制御ソリューションズ , 株式会社日立製作所
发明人： UMEHARA TAKASHI , BANDO AKIRA , KOBAYASHI MASAMITSU , SHIRAISHI MASAHIRO , ONOZUKA AKIHIRO , OGURA MAKOTO , KOBAYASHI EIJI , ISHIKAWA MASAKAZU , FURUTA YASUYUKI , SASAKI WATARU , OTSUKA YUSAKU , NAKANO AKIHIRO , OZAWA SHOICHI , MASUKO NAOYA , FUNAKI SATORU , KASAHARA TAKENORI , SEKI YUSUKE , IWASAKI YU
IPC分类号： G05B9/03 , G05B19/05 , G06F11/20 , H04L29/04
摘要： PROBLEM TO BE SOLVED: To provide a programmable electronic apparatus which operates at higher speed while satisfying requirements as functional safety (normal operation of apparatus) and has synchronism during start and stop, and multiple system switching.
SOLUTION: A state-switching signal from a central processing storage device to a system is simultaneously notified even to input-output devices connected through a serial line 1. The state-switching signal has a safety stop request signal and a system switching request signal during hardware redundancy. Further, two state-switching signals are provided, and respective polarities are inverted. Alternatively, the state-switching signals are pulse-shaped. The common part of a frame of the serial line is provided with a bit for safety stop request, or a command is provided with a new state-switching code, and its command instruction achieves simultaneous broadcast communication. According to the invention, it is possible to achieve safety as well as system synchronism. Further, it is possible to achieve control suitable for the functional safety use by using safe communication.
COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：要解决的问题：提供一种在满足作为功能安全（装置的正常运行）的要求并且在启动和停止期间具有同步以及多系统切换的高速运行的可编程电子装置。解决方案：即使对于通过串行线路1连接的输入输出设备，也将来自中央处理存储设备的系统的状态切换信号同时通知。状态切换信号具有安全停止请求信号和系统切换在硬件冗余期间请求信号。此外，提供两个状态切换信号，并且各极性反转。或者，状态切换信号是脉冲形的。串行线路的公共部分被提供有安全停止请求的位，或者指令被提供有新的状态切换代码，并且其命令指令实现同时的广播通信。根据本发明，可以实现安全性和系统同步性。此外，可以通过使用安全通信来实现适合于功能安全用途的控制。版权所有（C）2008，JPO＆INPIT

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