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    • 2. 发明专利
    • FABRICATION OF THIN FILM PATTERN
    • JPS60109227A
    • 1985-06-14
    • JP21607483
    • 1983-11-18
    • HITACHI LTD
    • OOGAMI MICHIOYATSUNO KOUMEI
    • H01L21/30G03F7/004H01L21/027
    • PURPOSE:To fabricate the minute pattern of a thin film without using photosensitive resin by spreading the solution including a photosensitive metal complex over a substrate and exposing the predetermined pattern onto that coating with an ultraviolet ray through a mask and heat treatment of a positive pattern which is developed by removing unexposed part. CONSTITUTION:For a ligand comprising a pair of non-shared electrones and forming a complex with metal, a metal complex coating solution comprising a carboxyl radical at least in a part. After this metal complex coating solution is spread over various device substrates, the substrates are irradiated with ultraviolet rays through photomasks. The irradiation with ultraviolet rays causes condensation reaction which decomposes carboxyl radicals and combination of metal-oxygen-metal or metal-metal is produced in the metal complex coating film and at the same time, combination is produced between the device substrates and the metal complex coating film of the irradiated part with ultravilet rays. The coating film of the unirradiated part with ultraviolet rays is removed by being immersed in a developing solution such as a solvent used for solubility of a metal complex. After forming a positive pattern of oxide thin film by development, heat treatment or ultraviolet-ray irradiation is performed again.
    • 4. 发明专利
    • Manufacture of semiconductor device
    • 半导体器件的制造
    • JPS59186344A
    • 1984-10-23
    • JP5927683
    • 1983-04-06
    • Hitachi Ltd
    • MISAWA YUTAKATAKAHASHI MASAAKIYATSUNO KOUMEIHIDAKA TOSHIYUKISAKAMOTO HISASHI
    • H01L21/301H01L21/302H01L21/3065H01L21/78
    • H01L21/78
    • PURPOSE:To prevent generation of deterioration of characteristic and irregular characteristic by previously cutting the wafer so that the semiconductor wafer plane coincides with both orientations of pellet side planes on the occasion of executing the alkali etching or plasma etching using any of CCl4-O2, CF3Br, CCl4 to the semiconductor pellets being cut into the specified size. CONSTITUTION:A PIN structure semiconductor element is formed using an Si wafer having the plane orientation (100) of front and rear planes and the orientation flat OF (100). On the occasion of obtaining the pellets, cutting is performed in parallel to or at a right angle to the flat OF and also at a right angle to the front and rear planes. Thus, orientation of all planes of pellet 2 are set to (100) and the copper leads 5, 6 are clamped to the front and rear planes using solders 3, 4. When, pellets are obtained in such structure, alkali or plasma etching should be performed previously to the pellet 2.
    • 目的:为了通过预先切割晶片以防止在执行使用CCl4-O2,CF3Br中的任一种的碱蚀刻或等离子体蚀刻的情况下半导体晶片平面与颗粒侧面的两个取向一致的特性和不规则特性的劣化, ,将CCl4切割成规定尺寸的半导体颗粒。 构成:使用具有前平面和后平面的平面取向(100)和取向平面OF(100)的Si晶片形成PIN结构半导体元件。 在获得颗粒的情况下,与平面OF平行或直角进行切割,并且与前后平面成直角。 因此,将颗粒2的所有平面的取向设定为(100),并且使用焊料3,4将铜引线5,6夹紧到前平面和后平面。当以这种结构获得颗粒时,应进行碱蚀刻或等离子体蚀刻 以前要进行颗粒2。
    • 6. 发明专利
    • SEMICONDUCTOR DEVICE
    • JPS58161354A
    • 1983-09-24
    • JP4260682
    • 1982-03-19
    • HITACHI LTD
    • WAKUI TAKAYUKIOOGAMI MICHIOYATSUNO KOUMEI
    • H01L21/60H01L23/04
    • PURPOSE:To increase a distance in space between a connecting member and a semiconductor base body, and to improve reliability by bending the connecting member so as to take a convex shape to the reverse side to the surface supporting the semiconductor base body from a straight line tieing connecting sections. CONSTITUTION:A semiconductor substrate 1 is placed onto a support board 2. Electrode terminal support members 3, 4 are placed onto the board 2 while being separated from the substrate 1 through metallized layers 31, 32, 41, 42. The surfaces on the reverse side to the board 2 sides of the member 3, 4 are formed so as to be made higher than the surface on the reverse side to the board 2 side of the substrate 1. The connecting members 5, 6 are bonded with metallic foil 51, 61, and constituted by insulating films 52a, 52b, 52c, 62a, 62b divided into the plural among nodes. The members 5, 6 are bent at the dividing points of the insulating films so as to take the convex shape to the reverse side to the board 2 side from the straight lines 7 tieing bonded points.
    • 7. 发明专利
    • SEMICONDUCTOR DEVICE
    • JPS58135658A
    • 1983-08-12
    • JP1752682
    • 1982-02-08
    • HITACHI LTD
    • KURIHARA YASUTOSHIMINAGAWA TADASHIYATSUNO KOUMEI
    • H01L23/34H01L23/373
    • PURPOSE:To prevent the deformation and thermal fatigue of the titled semiconductor device by a method wherein a compound metal plate, consisting of a flat type first metal member and a ring-shaped second metal member which is formed in one body with the first metal member at the circumferential part, is used as the metal plate to be located between a semiconductor and an insulating member, thereby enabling to reduce the thermal distortion of the semiconductor device. CONSTITUTION:A metal supporting member 11 is a compound metal plate which is formed in one body using an iron-36% nickel plate 112 in such a manner that it is surrounding the circumferential part of a steel plate 111 by performing a cold rolling method. An insulated member 12 of alumina plate is adhered to the surface of the metal supporting member 11 using a solder layer 28, and a compound metal plate 13 is adhered using a solder layer 29. The compound metal plate 13 is the iron and 36% nickel plate 132 which is formed in one body using a cold rolling method in such a manner that the plate is surrounding the circumferential part of a copper plate 131, and the apparent expansion coefficient is coordinated to the value between the thermal expansion coefficient of alumina and the thermal expansion coefficient of silicon which is the material used in the semiconductor substrate. The circuit shown in the diagram 2 is formed on the compound metal plate.
    • 8. 发明专利
    • ELECTRODE BONDING STRUCTURE OF SEMICONDUCTOR DEVICE
    • JPS58130545A
    • 1983-08-04
    • JP1152382
    • 1982-01-29
    • HITACHI LTD
    • OOGAMI MICHIOYATSUNO KOUMEIWAKUI TAKAYUKI
    • H01L21/60H01L21/28H01L29/41H01L29/43
    • PURPOSE:To improve the thermal fatigue resistance and the bonding reliability by a method wherein the bottom surface of an electrode metal foil is reduced smaller than the metallic film surface corresponding thereto, and thus the bottom and side surfaces of the metal foil are adhered to the metallic film surface by solder. CONSTITUTION:The electrolytic Cu foil is pasted on a polyimide film 301 by an epoxy resin 302, thus e.g. a cathode electrode 303 and a gate electrode 304 are formed, and the angle of inclination theta of the side surface is set as approx. 70 deg.. The foils 303 and 304 are plated by Pb-Sn solder 305. The multilayer cathode electrode 105 and gate electrode 106 of Ni-Ag are formed on an SCR substrate 100. The substrate 100 is positioned to a composite electrode 200, and the solder plate 305 is fused in the H2 at 350 deg.C resulting in the adhesion of the electrode foil and the metallic film. In this constitution, since a solder layer is formed also on the side surface of the electrode foil, the bonding strength is improved. Besides, since the solder layer on the inclined side surface sufficiently absorbs the thermal stress, the resistance against the thermal fatigue is remarkably improved. The sectional shape vertical to the foil bonding surface is inverse trapezoidal, therefore soldering processes are simplified.
    • 10. 发明专利
    • INSULATED TYPE SEMICONDUCTOR DEVICE
    • JPS5848926A
    • 1983-03-23
    • JP14615881
    • 1981-09-18
    • HITACHI LTD
    • KURIHARA YASUTOSHIYATSUNO KOUMEI
    • H01L21/52H01L21/58H01L23/15
    • PURPOSE:To realize ridid brazing with metal plate and obtain an insulated type semiconductor device with good thermal conductivity using inorganic insulated plate by sintering metal powder including Mo and W into the inorganic insulating material containing any one of the AlN or SiN groups as the main component under the reduction ambient and thereby providing a metallized layer. CONSTITUTION:The powder mixing Mo and W which well reacts with AlN or SiN plate 11 and rigidly adheres to them is mixed with the volatile organic medium and then printed, and such metal powder is kept at a temperature of 1,320 deg.C for 20min in the reduction gas ambient and then it is sintered, followed by non-electrolytic Ni plating 12. Thereafter, such element is kept at a temperature of 810 deg.C for about 5min under the H2 ambient. Succeedingly, the Cu plate 13, Si transistor pellet 14 are sequentially laminated and are bonded with the Pb-Sn system solder 15, the supporting plate 16 of Cu is bonded with the solder 17 of the same system, and finally these are sealed by the connecting lead L epoxy resin as specified. The insulated type semiconductor device according to this structure effectuates excellent heat radiation and insulation characteristics as well as excellent temperature proof cycle.