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1. 发明授权

US4762336A Structure for supporting lower suspension arm on vehicle chassis 失效
标题翻译：用于在车辆底盘上支撑下悬架臂的结构
公开(公告)号：US4762336A
公开(公告)日：1988-08-09
申请号：US54788
申请日：1987-05-27
申请人： Hisashi Ogawa , Kazuhiko Yamashita
发明人： Hisashi Ogawa , Kazuhiko Yamashita
IPC分类号： B60G3/06 , B60G7/00 , B60G7/02 , B62D21/00 , B62D21/11 , B60G3/00
CPC分类号： B60G3/06 , B60G7/00 , B60G7/02 , B62D21/11 , B60G2200/142 , B60G2200/44 , B60G2204/41 , B60G2206/122
摘要： A structure for swingably supporting a lower suspension arm of a vehicle suspension on the chassis of the vehicle through a bracket. The bracket has a main part swingably supporting the lower suspension arm and connected to the chassis, and an extension extending from the main part in the longitudinal direction of the chassis and connected at a position which is vertically spaced from the position at which said main part is connected to the chassis and on the opposite side of the axis of swinging of the lower suspension arm to the position where the main part is connected to the chassis. With this arrangement, displacement of the bracket by any force transmitted through the lower suspension arm and acting in the longitudinal direction is minimized.
摘要翻译：一种用于通过支架可摆动地支撑车辆底盘上的车辆悬架的下悬架臂的结构。支架具有可摆动地支撑下悬架臂并连接到底架的主体部分，以及从主体部分沿着机箱的纵向方向延伸的延伸部，并且在与所述主体部分的位置垂直间隔开的位置处连接连接到底盘，并且在下悬架臂的摆动轴线的相反侧连接到主体部分连接到底盘的位置。通过这种布置，通过传递通过下悬架臂并沿纵向方向作用的任何力使支架的位移最小化。

2. 发明申请

US20130022819A1 METHOD FOR PRODUCING TRANSFER BODY 审中-公开
标题翻译：生产转运体的方法
公开(公告)号：US20130022819A1
公开(公告)日：2013-01-24
申请号：US13637503
申请日：2011-03-25
申请人： Yota Yano , Hisashi Ogawa , Yukio Kimoto , Hiroyuki Okinaka , Toshikatsu Suehiro , Mitsuo Nakamura , Masaru Matsuda , Kimio Hase
发明人： Yota Yano , Hisashi Ogawa , Yukio Kimoto , Hiroyuki Okinaka , Toshikatsu Suehiro , Mitsuo Nakamura , Masaru Matsuda , Kimio Hase
IPC分类号： B32B38/10 , B32B37/10 , B32B17/06
CPC分类号： B32B37/025 , B29C43/18 , B29C43/30 , B29C43/3697 , B32B2309/12
摘要： An object of the present invention is to provide a method for producing a transfer body, which method neither causes adhesion failure at the interface between a transferring film and a substrate, nor causes interlayer peeling in the transferring film. Another object of the present invention is to provide a method for producing a transfer body with high productivity, which method neither causes breakage of a functional pattern forming a transferring layer during peeling of a release film from the transferring film, nor causes any damage to the substrate during separation of an attaching roller and a peeling roller from the substrate.
摘要翻译：本发明的目的是提供一种转印体的制造方法，该方法既不会在转印膜与基材的界面处引起粘合破坏，也不会在转印膜中产生夹层剥离。本发明的另一个目的是提供一种高生产率的转印体的制造方法，该方法在剥离膜从转印膜剥离时不会导致形成转印层的功能图案的破损，也不会对从基板分离粘贴辊和剥离辊时的基板。

3. 发明授权

US08258582B2 Semiconductor device and method for manufacturing the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US08258582B2
公开(公告)日：2012-09-04
申请号：US13182993
申请日：2011-07-14
申请人： Hisashi Ogawa , Yoshihiro Mori
发明人： Hisashi Ogawa , Yoshihiro Mori
IPC分类号： H01L29/76 , H01L29/94
CPC分类号： H01L21/28088 , H01L21/823842 , H01L21/82385 , H01L29/4966 , H01L29/517 , H01L29/665 , H01L29/6659 , H01L29/7833
摘要： A semiconductor device including a first transistor of a first conductivity type provided on a first active region of a semiconductor region, and a second transistor of a second conductivity type provided on a second active region of the semiconductor region. The first transistor includes a first gate insulating film and a first gate electrode, the first gate insulating film contains a high-k material and a first metal, and the first gate electrode includes a lower conductive film, a first conductive film and a first silicon film. The second transistor includes a second gate insulating film and a second gate electrode, the second gate insulating film contains a high-k material and a second metal, and the second gate electrode includes a second conductive film made of the same material as the first conductive film, and a second silicon film.
摘要翻译：一种半导体器件，包括设置在半导体区域的第一有源区上的第一导电类型的第一晶体管和设置在半导体区域的第二有源区上的第二导电类型的第二晶体管。第一晶体管包括第一栅极绝缘膜和第一栅电极，第一栅极绝缘膜包含高k材料和第一金属，并且第一栅电极包括下导电膜，第一导电膜和第一硅电影。第二晶体管包括第二栅极绝缘膜和第二栅电极，第二栅极绝缘膜包含高k材料和第二金属，第二栅极包括由与第一导电性材料相同的材料制成的第二导电膜膜和第二硅膜。

4. 发明申请

US20110227168A1 SEMICONDUCTOR DEVICE AND FABRICATION METHOD FOR THE SAME 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20110227168A1
公开(公告)日：2011-09-22
申请号：US13149554
申请日：2011-05-31
申请人： Tsutomu Oosuka , Hisashi Ogawa , Yoshihiro Sato
发明人： Tsutomu Oosuka , Hisashi Ogawa , Yoshihiro Sato
IPC分类号： H01L29/78
CPC分类号： H01L23/535 , H01L21/28518 , H01L21/28525 , H01L21/76895 , H01L21/823425 , H01L21/823468 , H01L21/823475 , H01L27/11 , H01L29/161 , H01L29/78 , H01L2924/0002 , H01L2924/00
摘要： The semiconductor device includes: a transistor having a gate electrode formed on a semiconductor substrate and first and second source/drain regions formed in portions of the semiconductor substrate on both sides of the gate electrode; a gate interconnect formed at a position opposite to the gate electrode with respect to the first source/drain region; and a first silicon-germanium layer formed on the first source/drain region to protrude above the top surface of the semiconductor substrate. The gate interconnect and the first source/drain region are connected via a local interconnect structure that includes the first silicon-germanium layer.
摘要翻译：半导体器件包括：晶体管，其具有形成在半导体衬底上的栅极电极和形成在半导体衬底的位于栅电极两侧的部分中的第一和第二源极/漏极区域; 形成在相对于第一源极/漏极区域的与栅电极相对的位置处的栅极互连; 以及形成在所述第一源极/漏极区域上以在所述半导体衬底的顶表面上方突出的第一硅 - 锗层。栅极互连和第一源极/漏极区域经由包括第一硅 - 锗层的局部互连结构连接。

5. 发明授权

US07872312B2 Semiconductor device comprising a high dielectric constant insulating film including nitrogen 有权
标题翻译：包括包含氮的高介电常数绝缘膜的半导体器件
公开(公告)号：US07872312B2
公开(公告)日：2011-01-18
申请号：US12172680
申请日：2008-07-14
申请人： Hisashi Ogawa
发明人： Hisashi Ogawa
IPC分类号： H01L29/76
CPC分类号： H01L21/823462 , H01L21/28202 , H01L21/82345 , H01L21/823842 , H01L21/823857 , H01L27/092 , H01L29/4966 , H01L29/518 , H01L29/665
摘要： A semiconductor device includes a first gate electrode formed in a first region on a semiconductor substrate with a first gate insulating film sandwiched therebetween; and a second gate electrode formed in a second region on the semiconductor substrate with a second gate insulating film sandwiched therebetween. The first gate insulating film includes a first high dielectric constant insulating film with a first nitrogen concentration and the second gate insulating film includes a second high dielectric constant insulating film with a second nitrogen concentration higher than the first nitrogen concentration.
摘要翻译：半导体器件包括形成在半导体衬底上的第一区域中的第一栅电极，其间夹有第一栅极绝缘膜; 以及形成在半导体衬底上的第二区域中的第二栅极电极，其间夹有第二栅极绝缘膜。第一栅极绝缘膜包括具有第一氮浓度的第一高介电常数绝缘膜，并且第二栅极绝缘膜包括具有高于第一氮浓度的第二氮浓度的第二高介电常数绝缘膜。

6. 发明授权

US07863753B2 Semiconductor device and manufacturing method thereof 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US07863753B2
公开(公告)日：2011-01-04
申请号：US11896997
申请日：2007-09-07
申请人： Chiaki Kudo , Hisashi Ogawa
发明人： Chiaki Kudo , Hisashi Ogawa
IPC分类号： H01L29/41
CPC分类号： H01L29/42376 , H01L21/28123 , H01L21/823456 , H01L21/82385 , H01L27/0207 , H01L29/4238
摘要： A semiconductor device includes: an isolation region formed in a semiconductor substrate; an active region surrounded by the isolation region; and a first gate electrode formed on the isolation region and the active region and including a first region on the isolation region. The first region has a pattern width in a gate length direction larger than a pattern width of the first gate electrode on the active region. The first region includes a part having a film thickness different from a film thickness of the first gate electrode on the active region.
摘要翻译：半导体器件包括：形成在半导体衬底中的隔离区; 由隔离区包围的有源区; 以及形成在所述隔离区域和所述有源区域上并且包括所述隔离区域上的第一区域的第一栅电极。第一区域具有比有源区域上的第一栅电极的图案宽度大的栅极长度方向的图案宽度。第一区域包括具有与活性区域上的第一栅电极的膜厚度不同的膜厚度的部分。

7. 发明申请

US20100072523A1 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20100072523A1
公开(公告)日：2010-03-25
申请号：US12629508
申请日：2009-12-02
申请人： Yoshihiro SATO , Hisashi Ogawa
发明人： Yoshihiro SATO , Hisashi Ogawa
IPC分类号： H01L27/092 , H01L21/8234
CPC分类号： H01L21/823807 , H01L21/28088 , H01L21/823814 , H01L21/823842 , H01L29/165 , H01L29/4966 , H01L29/665 , H01L29/6653 , H01L29/66545 , H01L29/66553 , H01L29/6656 , H01L29/66628 , H01L29/66636 , H01L29/7843 , H01L29/7848
摘要： A semiconductor device includes a first MIS transistor and a second MIS transistor. The first MIS transistor includes a first gate electrode includes a second metal film formed on a first gate insulating film, and an insulating film formed, extending over side surfaces of the first gate electrode and upper surfaces of regions located in the first active region laterally outside the first gate electrode. The second MIS transistor includes a second gate electrode including a first metal film formed on a second gate insulating film and a conductive film formed on the first metal film, and the insulating film formed, extending over side surfaces of the second gate electrode and upper surfaces of regions located in the second active region laterally outside the second gate electrode. The first and second metal films are made of different metal materials.
摘要翻译：半导体器件包括第一MIS晶体管和第二MIS晶体管。第一MIS晶体管包括：第一栅电极，包括形成在第一栅极绝缘膜上的第二金属膜和形成的绝缘膜，所述绝缘膜在第一栅电极的侧表面和位于第一有源区域的区域的上表面横向外侧延伸第一栅电极。第二MIS晶体管包括第二栅电极，其包括形成在第二栅极绝缘膜上的第一金属膜和形成在第一金属膜上的导电膜，并且形成在第二栅电极和上表面的侧表面上延伸的绝缘膜位于第二有源区中的位于第二栅电极的横向外侧的区域。第一和第二金属膜由不同的金属材料制成。

8. 发明授权

US07485913B2 Semiconductor memory device and method for fabricating the same 有权
标题翻译：半导体存储器件及其制造方法
公开(公告)号：US07485913B2
公开(公告)日：2009-02-03
申请号：US11230638
申请日：2005-09-21
申请人： Hisashi Ogawa
发明人： Hisashi Ogawa
IPC分类号： H01L27/108 , H01L29/94
CPC分类号： H01L27/0207 , G11C7/14 , H01L27/10852 , H01L27/10894 , H01L27/10897
摘要： A semiconductor memory device includes a memory cell and a dummy cell. The amount of leakage current per unit area in a capacitor in the dummy cell is larger than that in a capacitor in the memory cell.
摘要翻译：半导体存储器件包括存储单元和虚设单元。虚拟单元中的电容器中的每单位面积的漏电流量大于存储单元中的电容器中的漏电流量。

9. 发明授权

US06784474B2 Semiconductor memory device and method for fabricating the same 失效
标题翻译：半导体存储器件及其制造方法
公开(公告)号：US06784474B2
公开(公告)日：2004-08-31
申请号：US10203430
申请日：2002-08-08
申请人： Hisashi Ogawa , Yoshihiro Mori , Akihiko Tsuzumitani
发明人： Hisashi Ogawa , Yoshihiro Mori , Akihiko Tsuzumitani
IPC分类号： H01L2976
CPC分类号： H01L27/10894 , H01L27/10885 , H01L28/55 , H01L28/60 , Y10S257/905 , Y10S257/908
摘要： A memory cell in a DRAM, which is a semiconductor memory device, is provided with a bit line 21a connected to a bit line plug 20b and a local interconnect 21b, over a first interlevel insulating film 18. A conductor sidewall 40 of TiAlN is formed on side faces of hard mask 37, upper barrier metal 36, Pt film 35 and BST film 34. No contact hole is provided on the Pt film 35 constituting an upper electrode 35a. The upper electrode 35a is connected to an upper interconnect (a Cu interconnect 42) via the conductor sidewall 40, dummy lower electrode 33b, dummy cell plug 30 and local interconnect 21b. The Pt film 35 is not exposed to a reducing atmosphere, and therefore deterioration in characteristics of the capacitive insulating film 34a can be prevented.
摘要翻译：作为半导体存储器件的DRAM中的存储单元在第一层间绝缘膜18上设置有连接到位线插头20b和局部互连21b的位线21a。形成TiAlN的导体侧壁40 在硬掩模37，上阻挡金属36，Pt膜35和BST膜34的侧面上。在构成上电极35a的Pt膜35上没有设置接触孔。上电极35a经由导体侧壁40，虚拟下电极33b，虚设电池插塞30和局部互连21b与上互连（铜互连42）连接。 Pt膜35不暴露于还原气氛中，因此可以防止电容绝缘膜34a的特性劣化。

10. 发明授权

US5661068A Method of fabricating a semiconductor device 失效
标题翻译：制造半导体器件的方法
公开(公告)号：US5661068A
公开(公告)日：1997-08-26
申请号：US467290
申请日：1995-06-06
申请人： Shuji Hirao , Hisashi Ogawa , Yuka Terai , Mitsuru Sekiguchi , Masanori Fukumoto , Isao Miyanaga
发明人： Shuji Hirao , Hisashi Ogawa , Yuka Terai , Mitsuru Sekiguchi , Masanori Fukumoto , Isao Miyanaga
IPC分类号： H01L21/02 , H01L21/3213 , H01L21/768 , H01L21/265
CPC分类号： H01L28/84 , H01L21/3213 , H01L21/32131 , H01L21/76838 , Y10S148/014 , Y10S438/964
摘要： A method of the invention for fabricating a semiconductor device includes the steps of: forming an oxide film having a non-uniform thickness on silicon; reducing at least a portion of the oxide film using gas containing a metal element, and growing a metal film containing the metal element on the silicon by reacting an exposed surface of the silicon with the gas; and removing the metal film.
摘要翻译：本发明的制造半导体器件的方法包括以下步骤：在硅上形成具有不均匀厚度的氧化膜; 使用含有金属元素的气体还原至少一部分氧化物膜，并且通过使硅的暴露表面与气体反应，在硅上生长含有金属元素的金属膜; 并除去金属膜。

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