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1. 发明申请

US20100244186A1 NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR MANUFACTURING SAME 失效
标题翻译：非易失性半导体存储器件及其制造方法
公开(公告)号：US20100244186A1
公开(公告)日：2010-09-30
申请号：US12722920
申请日：2010-03-12
申请人： Ryota KATSUMATA , Masaru KITO , Yoshiaki FUKUZUMI , Masaru KIDOH , Hiroyasu TANAKA , Yosuke KOMORI , Megumi ISHIDUKI , Hideaki AOCHI , Ryouhei KIRISAWA , Junya MATSUNAMI , Tomoko FUJIWARA
发明人： Ryota KATSUMATA , Masaru KITO , Yoshiaki FUKUZUMI , Masaru KIDOH , Hiroyasu TANAKA , Yosuke KOMORI , Megumi ISHIDUKI , Hideaki AOCHI , Ryouhei KIRISAWA , Junya MATSUNAMI , Tomoko FUJIWARA
IPC分类号： H01L27/10 , H01L21/822 , G11C17/16
CPC分类号： H01L27/1021 , H01L23/5252 , H01L27/0207 , H01L27/101 , H01L27/112 , H01L27/11206 , H01L2924/0002 , H01L2924/00
摘要： A nonvolatile semiconductor memory device, includes: a stacked structural unit including a plurality of stacked component units stacked in a first direction, each of the stacked component units including a first conducting film made of a semiconductor of a first conductivity type provided perpendicular to the first direction and a first insulating film stacked in the first direction with the first conducting film; a semiconductor pillar piercing the stacked structural unit in the first direction and including a conducting region of a second conductivity type, the semiconductor pillar including a first region opposing each of the first conducting films, and a second region provided between the first regions with respect to the first direction, the second region having a resistance different from a resistance of the first region; and a second insulating film provided between the semiconductor pillar and the first conducting film.
摘要翻译：一种非易失性半导体存储器件，包括：堆叠结构单元，包括沿第一方向堆叠的多个堆叠的元件单元，每个堆叠元件单元包括由垂直于第一元件垂直设置的第一导电类型的半导体制成的第一导电膜方向和与第一导电膜在第一方向上堆叠的第一绝缘膜; 所述半导体柱在所述第一方向上穿透所述层叠结构单元，并且包括第二导电类型的导电区域，所述半导体柱包括与所述第一导电膜相对的第一区域，以及设置在所述第一区域之间的第二区域，所述第一方向，所述第二区域具有与所述第一区域的电阻不同的电阻; 以及设置在所述半导体柱和所述第一导电膜之间的第二绝缘膜。

2. 发明申请

US20100320526A1 NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR MANUFACTURING SAME 审中-公开
标题翻译：非易失性半导体存储器件及其制造方法
公开(公告)号：US20100320526A1
公开(公告)日：2010-12-23
申请号：US12727730
申请日：2010-03-19
申请人： Masaru KIDOH , Ryota KATSUMATA , Masaru KITO , Yoshiaki FUKUZUMI , Hiroyasu TANAKA , Yosuke KOMORI , Megumi ISHIDUKI , Tomoko FUJIWARA , Yoshimasa MIKAJIRI , Shigeto OOTA , Hideaki AOCHI , Ryouhei KIRISAWA , Junya MATSUNAMI
发明人： Masaru KIDOH , Ryota KATSUMATA , Masaru KITO , Yoshiaki FUKUZUMI , Hiroyasu TANAKA , Yosuke KOMORI , Megumi ISHIDUKI , Tomoko FUJIWARA , Yoshimasa MIKAJIRI , Shigeto OOTA , Hideaki AOCHI , Ryouhei KIRISAWA , Junya MATSUNAMI
IPC分类号： H01L29/792 , H01L21/336
CPC分类号： H01L27/11578 , H01L23/522 , H01L23/53257 , H01L23/53271 , H01L27/11582 , H01L2924/0002 , H01L2924/00
摘要： A nonvolatile semiconductor memory device includes: a semiconductor substrate; a memory unit; and a circuit unit provided between the semiconductor substrate and the memory unit. The memory unit includes: a stacked structural unit having electrode films alternately stacked with inter-electrode-film insulating films; a semiconductor pillar piercing the stacked structural unit; and a storage unit provided corresponding to an intersection between the electrode films and the semiconductor pillar. The circuit unit includes first and second transistors having different conductivity type, a first interconnect, and first and second contact plugs. The first interconnect includes silicide provided on a side of the first and second transistors opposite to the semiconductor substrate. The first contact plug made of polysilicon of the first conductivity type connects the first interconnect to the first transistor. The second contact plug made of polysilicon of the second conductivity type connects the first interconnect to the second transistor.
摘要翻译：非易失性半导体存储器件包括：半导体衬底; 记忆单元以及设置在半导体衬底和存储器单元之间的电路单元。存储单元包括：层叠结构单元，其具有交替层叠有电极间绝缘膜的电极膜; 穿过堆叠结构单元的半导体柱; 以及与电极膜和半导体柱之间的交点对应地设置的存储单元。电路单元包括具有不同导电类型的第一和第二晶体管，第一互连以及第一和第二接触插塞。第一互连包括设置在与半导体衬底相对的第一和第二晶体管一侧的硅化物。由第一导电类型的多晶硅制成的第一接触插头将第一互连件连接到第一晶体管。由第二导电类型的多晶硅制成的第二接触插头将第一互连件连接到第二晶体管。

3. 发明申请

US20100207194A1 NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR MANUFACTURING SAME 有权
标题翻译：非挥发性半导体存储器件及其制造方法
公开(公告)号：US20100207194A1
公开(公告)日：2010-08-19
申请号：US12706127
申请日：2010-02-16
申请人： Hiroyasu TANAKA , Hideaki AOCHI , Ryota KATSUMATA , Masaru KIDOH , Masaru KITO , Yoshiaki FUKUZUMI , Yosuke KOMORI , Megumi ISHIDUKI , Tomoko FUJIWARA , Junya MATSUNAMI , Ryouhei KIRISAWA
发明人： Hiroyasu TANAKA , Hideaki AOCHI , Ryota KATSUMATA , Masaru KIDOH , Masaru KITO , Yoshiaki FUKUZUMI , Yosuke KOMORI , Megumi ISHIDUKI , Tomoko FUJIWARA , Junya MATSUNAMI , Ryouhei KIRISAWA
IPC分类号： H01L27/115 , H01L21/8246
CPC分类号： H01L29/792 , H01L27/11578 , H01L27/11582 , H01L29/66833
摘要： A nonvolatile semiconductor memory device includes: a semiconductor substrate; a stacked body provided on the semiconductor substrate, the stacked body having electrode films and insulating films being alternately stacked; a first and second semiconductor pillars; and a first and second charge storage layers. The first and second semiconductor pillars are provided inside a through hole penetrating through the stacked body in a stacking direction of the stacked body. The through hole has a cross section of an oblate circle, when cutting in a direction perpendicular to the stacking direction. The first and second semiconductor pillars face each other in a major axis direction of the first oblate circle. The first and second semiconductor pillars extend in the stacking direction. The first and second charge storage layers are provided between the electrode film and the first and second semiconductor pillars, respectively.
摘要翻译：非易失性半导体存储器件包括：半导体衬底; 设置在所述半导体基板上的层叠体，具有交替堆叠的电极膜和绝缘膜的层叠体，第一和第二半导体柱; 以及第一和第二电荷存储层。第一半导体柱和第二半导体柱设置在层叠体的层叠方向上贯穿层叠体的贯通孔内。当沿垂直于堆叠方向的方向切割时，通孔具有扁圆形的横截面。第一和第二半导体柱在第一扁圆的长轴方向上彼此面对。第一和第二半导体柱沿层叠方向延伸。第一和第二电荷存储层分别设置在电极膜和第一和第二半导体柱之间。

4. 发明申请

US20100001397A1 SEMICONDUCTOR DEVICE 失效
标题翻译：半导体器件
公开(公告)号：US20100001397A1
公开(公告)日：2010-01-07
申请号：US12493614
申请日：2009-06-29
申请人： Ryouhei KIRISAWA
发明人： Ryouhei KIRISAWA
IPC分类号： H01L23/00 , H01L23/52
CPC分类号： H01L23/5256 , H01L23/3121 , H01L23/62 , H01L24/48 , H01L24/49 , H01L25/0657 , H01L27/11526 , H01L2224/48091 , H01L2224/48227 , H01L2224/49174 , H01L2224/49175 , H01L2225/0651 , H01L2225/06562 , H01L2924/00014 , H01L2924/01004 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01029 , H01L2924/01033 , H01L2924/01074 , H01L2924/181 , H01L2924/00 , H01L2224/45099 , H01L2224/05599 , H01L2924/00012
摘要： A semiconductor device includes: a plurality of NAND memory dies each including: a first wiring layer formed in the NAND memory die; a second wiring layer formed in the NAND memory die; a first insulation layer formed between the first wiring layer and the second wiring layer; and a first interlayer connector formed in the first insulation layer, a controller configured to control the NAND memory dies; a package housing the NAND memory dies and the controller; a connecting portion electrically connecting an inner side of the package and an outer side of the package; a first connecting wire; and a second connecting wire, wherein a resistance value per unit length of the first interlayer connector is larger than a resistance value per unit length of the first wiring layer, and wherein the first interlayer connector is cut off when a first current flows through the first interlayer connector.
摘要翻译：一种半导体器件包括：多个NAND存储器管芯，每个NAND存储器管芯包括：形成在NAND存储器管芯中的第一布线层; 形成在NAND存储模具中的第二布线层; 形成在所述第一布线层和所述第二布线层之间的第一绝缘层; 以及形成在所述第一绝缘层中的第一层间连接器，被配置为控制所述NAND存储器管芯的控制器; 一个容纳NAND存储器管芯和控制器的封装; 连接部，其电连接所述封装的内侧和所述封装的外侧; 第一连接线; 以及第二连接线，其中所述第一层间连接器的每单位长度的电阻值大于所述第一布线层的每单位长度的电阻值，并且其中当所述第一电流流过所述第一层间连接器时，所述第一层间连接器被切断，层间连接器。

5. 发明申请

US20100265770A1 NONVOLATILE SEMICONDUCTOR MEMORY 有权
标题翻译：非易失性半导体存储器
公开(公告)号：US20100265770A1
公开(公告)日：2010-10-21
申请号：US12718434
申请日：2010-03-05
申请人： Ryouhei KIRISAWA
发明人： Ryouhei KIRISAWA
IPC分类号： G11C16/04 , H01L29/788 , H01L29/792
CPC分类号： H01L27/11568 , G11C16/0408 , H01L27/11565
摘要： A nonvolatile semiconductor memory comprising: a first semiconductor layer having a first stripe-shaped region and a second stripe-shaped region which is adjacent to the first stripe-shaped region; a first NAND string formed on the first stripe-shaped region, the first NAND string having a plurality of first memory cell transistors connected in series; a first insulating film formed above the second stripe-shaped region; a second semiconductor layer formed on the first insulating film; and a second NAND string formed on the second semiconductor layer, the second NAND string having a plurality of second memory cell transistors connected in series.
摘要翻译：一种非易失性半导体存储器，包括：第一半导体层，具有与所述第一条形区域相邻的第一条形区域和第二条形区域; 形成在所述第一条形区域上的第一NAND串，所述第一NAND串具有串联连接的多个第一存储单元晶体管; 形成在所述第二条形区域上方的第一绝缘膜; 形成在所述第一绝缘膜上的第二半导体层; 以及形成在所述第二半导体层上的第二NAND串，所述第二NAND串具有串联连接的多个第二存储单元晶体管。

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