专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US08296961B2 Polishing pad thickness measuring method and polishing pad thickness measuring device 有权
标题翻译：抛光垫厚度测量方法和抛光垫厚度测量装置
公开(公告)号：US08296961B2
公开(公告)日：2012-10-30
申请号：US12694742
申请日：2010-01-27
申请人： Yuichi Nakayoshi , Hiroshi Takai , Hironori Nishimura
发明人： Yuichi Nakayoshi , Hiroshi Takai , Hironori Nishimura
IPC分类号： G01B3/20 , B24B49/02
CPC分类号： B24B37/20 , B24B37/042 , B24B49/105 , B24B49/18
摘要： A polishing pad thickness measuring method measures the thickness of a polishing pad attached to an upper surface of a surface plate. The polishing pad thickness measuring method measures a first distance between an upper surface of the polishing pad and a reference position on a vertical line perpendicular to the surface of the polishing pad and a second distance between an upper surface of the surface plate and the reference position on the vertical line, and calculates the thickness of the polishing pad from the difference between the first and second distances.
摘要翻译：抛光垫厚度测量方法测量附着在表面板上表面的抛光垫的厚度。抛光垫厚度测量方法测量抛光垫的上表面与垂直于抛光垫表面的垂直线上的基准位置之间的第一距离，并且测量表面板的上表面与基准位置之间的第二距离并且从第一和第二距离之间的差计算抛光垫的厚度。

2. 发明授权

US09073173B2 Method for shape modification of polishing pad 有权
标题翻译：抛光垫形状修改方法
公开(公告)号：US09073173B2
公开(公告)日：2015-07-07
申请号：US12981305
申请日：2010-12-29
申请人： Hiroshi Takai , Yuichi Nakayoshi
发明人： Hiroshi Takai , Yuichi Nakayoshi
IPC分类号： B24B1/00 , B24B49/18 , B24B37/04 , B24B53/017 , B24B27/00
CPC分类号： B24B49/18 , B24B27/0076 , B24B37/042 , B24B53/017
摘要： A polishing pad shape measured by a polishing pad shape measuring apparatus is modified into a target shape of a polishing pad by using a dressing tool so that a wafer has a desired surface shape. The invention is a method for shape modification of a polishing pad 14 for polishing a workpiece into a desired surface shape, comprising: a measurement step S9 of measuring a polishing pad shape in a state of being attached to a plate 12 by using a polishing pad shape measuring apparatus 10; a condition determination step S10 of selecting a dressing recipe capable of polishing the workpiece into a desired surface shape from a plurality of pre-provided dressing recipes based on the measurement result in the measurement step S9; and a shape modification step S11 of dressing the polishing pad 14 by using the dressing recipe determined in the condition determination step S10.
摘要翻译：通过使用修整工具将由研磨垫形状测量装置测量的抛光垫形状修改为抛光垫的目标形状，使得晶片具有期望的表面形状。本发明是一种用于将工件抛光成所需表面形状的抛光垫14的形状修改方法，包括：测量步骤S9，其通过使用抛光垫测量安装在板12上的状态下的抛光垫形状形状测量装置10; 条件确定步骤S10，基于测量步骤S9中的测量结果，从多个预先提供的敷料配方中选择能够将工件抛光成所需表面形状的修整配方; 以及通过使用在条件判定步骤S10中确定的敷料配方来修整抛光垫14的形状修改步骤S11。

3. 发明授权

US08545712B2 Semiconductor wafer manufacturing method 有权
标题翻译：半导体晶圆制造方法
公开(公告)号：US08545712B2
公开(公告)日：2013-10-01
申请号：US12679731
申请日：2008-09-11
申请人： Hiroshi Takai , Kenji Satomura , Yuichi Nakayoshi , Katsutoshi Yamamoto , Kouji Mizowaki
发明人： Hiroshi Takai , Kenji Satomura , Yuichi Nakayoshi , Katsutoshi Yamamoto , Kouji Mizowaki
IPC分类号： H01L21/302 , B44C1/22
CPC分类号： H01L21/02024 , B24B37/08
摘要： In a method of manufacturing semiconductor wafers, front and back surfaces of the semiconductor wafers are simultaneously polished with a double-side polishing machine that includes: a carrier for accommodating the semiconductor wafer; and an upper press platen and a lower press platen for sandwiching the carrier. The method includes: accommodating the semiconductor wafer in the carrier while a thickness of the semiconductor wafer is set to be larger than a thickness of the carrier by 0 μm to 5 μm; and polishing the semiconductor wafer while feeding a polishing slurry to between the surfaces of the semiconductor wafer and surfaces of the press platens. In the polishing, an allowance of both surfaces of the semiconductor wafer is set at 5 μm or less in total.
摘要翻译：在制造半导体晶片的方法中，半导体晶片的前表面和后表面用双面抛光机同时抛光，所述双面抛光机包括：用于容纳半导体晶片的载体; 以及用于夹持载体的上压板和下压板。该方法包括：将半导体晶片容纳在载体中，同时将半导体晶片的厚度设定为大于载体厚度0μm至5μm; 并且在将半导体晶片的表面和压板的表面之间进行抛光浆料的同时抛光半导体晶片。在研磨中，半导体晶片的两面的余量总计为5μm以下。

4. 发明申请

US20110171885A1 METHOD FOR SHAPE MODIFICATION OF POLISHING PAD 有权
标题翻译：抛光垫的形状修改方法
公开(公告)号：US20110171885A1
公开(公告)日：2011-07-14
申请号：US12981305
申请日：2010-12-29
申请人： Hiroshi Takai , Yuichi Nakayoshi
发明人： Hiroshi Takai , Yuichi Nakayoshi
IPC分类号： B24B1/00
CPC分类号： B24B49/18 , B24B27/0076 , B24B37/042 , B24B53/017
摘要： A polishing pad shape measured by a polishing pad shape measuring apparatus is modified into a target shape of a polishing pad by using a dressing tool so that a wafer has a desired surface shape. The invention is a method for shape modification of a polishing pad 14 for polishing a workpiece into a desired surface shape, comprising: a measurement step S9 of measuring a polishing pad shape in a state of being attached to a plate 12 by using a polishing pad shape measuring apparatus 10; a condition determination step S10 of selecting a dressing recipe capable of polishing the workpiece into a desired surface shape from a plurality of pre-provided dressing recipes based on the measurement result in the measurement step S9; and a shape modification step S11 of dressing the polishing pad 14 by using the dressing recipe determined in the condition determination step S10.
摘要翻译：通过使用修整工具将由研磨垫形状测量装置测量的抛光垫形状修改为抛光垫的目标形状，使得晶片具有期望的表面形状。本发明是一种用于将工件抛光成所需表面形状的抛光垫14的形状修改方法，包括：测量步骤S9，其通过使用抛光垫测量安装在板12上的状态下的抛光垫形状形状测量装置10; 条件确定步骤S10，基于测量步骤S9中的测量结果，从多个预先提供的敷料配方中选择能够将工件抛光成所需表面形状的修整配方; 以及通过使用在条件判定步骤S10中确定的敷料配方来修整抛光垫14的形状修改步骤S11。

5. 发明申请

US20100285665A1 SEMICONDUCTOR WAFER MANUFACTURING METHOD 有权
标题翻译：半导体制造方法
公开(公告)号：US20100285665A1
公开(公告)日：2010-11-11
申请号：US12679731
申请日：2008-09-11
申请人： Hiroshi Takai , Kenji Satomura , Yuichi Nakayoshi , Katsutoshi Yamamoto , Kouji Mizowaki
发明人： Hiroshi Takai , Kenji Satomura , Yuichi Nakayoshi , Katsutoshi Yamamoto , Kouji Mizowaki
IPC分类号： H01L21/306
CPC分类号： H01L21/02024 , B24B37/08
摘要： In a method of manufacturing semiconductor wafers, front and hack surfaces of the semiconductor wafers are simultaneously polished with a double-side polishing machine that includes: a carrier for accommodating the semiconductor wafer; and an upper press platen and a lower press platen for sandwiching the carrier. The method includes: accommodating the semiconductor wafer in the carrier while a thickness of the semiconductor wafer is set to be larger than a thickness of the carrier by 0 μm to 5 μm; and polishing the semiconductor wafer while feeding a polishing slurry to between the surfaces of the semiconductor wafer and surfaces of the press platens. In the polishing, an allowance of both surfaces of the semiconductor wafer is set at 5 μm or less in total.
摘要翻译：在制造半导体晶片的方法中，用双面抛光机同时对半导体晶片的前面和后表面进行抛光，所述双面抛光机包括：用于容纳半导体晶片的载体; 以及用于夹持载体的上压板和下压板。该方法包括：将半导体晶片容纳在载体中，同时将半导体晶片的厚度设定为大于载体厚度0μm至5μm; 并且在将半导体晶片的表面和压板的表面之间进行抛光浆料的同时抛光半导体晶片。在研磨中，半导体晶片的两面的余量总计为5μm以下。

6. 发明授权

US06001007A Template used for polishing a semiconductor wafer 失效
标题翻译：用于抛光半导体晶片的模板
公开(公告)号：US06001007A
公开(公告)日：1999-12-14
申请号：US866017
申请日：1997-05-30
申请人： Masahiko Maeda , Yuichi Nakayoshi
发明人： Masahiko Maeda , Yuichi Nakayoshi
IPC分类号： G01B3/14 , B24B37/04 , B24B37/30 , B24B37/32 , H01L21/304 , B24B37/00
CPC分类号： B24B37/30 , B24B41/061
摘要： A backing pad 7 is secured on the bottom of a ceramic plate 6. A template 1 is secured on the bottom of the backing pad 7. The thickness of the template 1 successively diminishes from the inner periphery wall 12 of the central accommodation opening for restraining the semiconductor wafer, toward the outer periphery wall 13 of the template 1, so that the bottom of the template 1 is inclined and the cross section of the template 1 is tapered.
摘要翻译：背衬垫7固定在陶瓷板6的底部上。模板1固定在背衬垫7的底部上。模板1的厚度从中央容纳开口的内周壁12依次减小以限制半导体晶片朝向模板1的外周壁13，使得模板1的底部倾斜，并且模板1的横截面是锥形的。

7. 发明授权

US08728942B2 Method for producing epitaxial silicon wafer 有权
标题翻译：外延硅晶片的制造方法
公开(公告)号：US08728942B2
公开(公告)日：2014-05-20
申请号：US13390764
申请日：2010-08-20
申请人： Shinichi Ogata , Kazushige Takaishi , Hironori Nishimura , Shigeru Okuuchi , Shunsuke Mikuriya , Yuichi Nakayoshi
发明人： Shinichi Ogata , Kazushige Takaishi , Hironori Nishimura , Shigeru Okuuchi , Shunsuke Mikuriya , Yuichi Nakayoshi
IPC分类号： H01L21/302
CPC分类号： H01L21/02024
摘要： Mirror-polishing a front surface of a silicon wafer using polishing liquid composed of an abrasive grain-free alkaline solution including water-soluble polymers simplifies a polishing process, thus leading to an increase in productivity and a reduction in cost, and reduces the density of LPDs attributable to processing and occurring in the front surface of a mirror-polished wafer, thus improving the surface roughness of the wafer front surface.
摘要翻译：使用由包含水溶性聚合物的无磨粒的碱性溶液构成的抛光液对硅晶片的前表面进行镜面抛光，简化了抛光工艺，从而导致生产率的提高和成本的降低，降低了密度 LPD可归因于处理并发生在镜面抛光晶片的前表面，从而提高了晶片正面的表面粗糙度。

8. 发明授权

US06517667B1 Apparatus for polishing a semiconductor wafer 失效
标题翻译：用于抛光半导体晶片的装置
公开(公告)号：US06517667B1
公开(公告)日：2003-02-11
申请号：US09098712
申请日：1998-06-17
申请人： Yuichi Nakayoshi
发明人： Yuichi Nakayoshi
IPC分类号： C23F100
CPC分类号： B24B37/30 , H01L21/30625
摘要： An polishing apparatus consists of a piston which is fixed to the rotation axis, a ceramic plate which is oppositely arranged against the piston via a silicone gel, and a cylinder which houses these components. The wafer is attached on the bottom surface of a backing pad, and will be pressed and rotated by the piston in order to polish the surface thereof.
摘要翻译：抛光装置包括固定在旋转轴上的活塞，通过硅胶凝胶相对于活塞相对布置的陶瓷板和容纳这些部件的气缸。将晶片安装在背衬垫的底表面上，并且将被活塞按压并旋转以便抛光其表面。

9. 发明授权

US06090688A Method for fabricating an SOI substrate 失效
标题翻译： SOI衬底的制造方法
公开(公告)号：US06090688A
公开(公告)日：2000-07-18
申请号：US749798
申请日：1996-11-15
申请人： Tadashi Ogawa , Akihiro Ishii , Yuichi Nakayoshi
发明人： Tadashi Ogawa , Akihiro Ishii , Yuichi Nakayoshi
IPC分类号： H01L21/302 , H01L21/762 , H01L27/12 , H01L21/02 , H01L21/304
CPC分类号： H01L21/302 , H01L21/76256 , Y10S438/977
摘要： A method for fabricating an SOI substrate is provided, which has an active substrate formed as a thin film. The method comprises the steps of: using a both-side polishing apparatus to polish both sides of a supporting substrate 1; bonding an active substrate 2 onto the supporting substrate 1. to form a bonded-wafer; removing an unbonded portion formed at the circumference of the bonded-wafer; flat grinding the active substrate 2 to reduce the thickness thereof; etching the active substrate 2 by spin etching; and processing the active substrate to be a thin film by PACE processing.
摘要翻译：提供一种制造SOI衬底的方法，其具有形成为薄膜的活性衬底。该方法包括以下步骤：使用双面抛光装置抛光支撑基板1的两侧; 将有源基板2接合到支撑基板1上以形成接合晶片; 去除形成在接合晶片的圆周处的未结合部分; 平面研磨有源基板2以减小其厚度; 通过旋转蚀刻蚀刻有源基板2; 并通过PACE处理将有源基板处理成薄膜。

10. 发明申请

US20120156878A1 METHOD FOR PRODUCING EPITAXIAL SILICON WAFER 有权
标题翻译：用于生产外延硅陶瓷的方法
公开(公告)号：US20120156878A1
公开(公告)日：2012-06-21
申请号：US13390764
申请日：2010-08-20
申请人： Shinichi Ogata , Kazushige Takaishi , Hironori Nishimura , Shigeru Okuuchi , Shunsuke Mikuriya , Yuichi Nakayoshi
发明人： Shinichi Ogata , Kazushige Takaishi , Hironori Nishimura , Shigeru Okuuchi , Shunsuke Mikuriya , Yuichi Nakayoshi
IPC分类号： H01L21/306
CPC分类号： H01L21/02024
摘要： Mirror-polishing a front surface of a silicon wafer using polishing liquid composed of an abrasive grain-free alkaline solution including water-soluble polymers simplifies a polishing process, thus leading to an increase in productivity and a reduction in cost, and reduces the density of LPDs attributable to processing and occurring in the front surface of a mirror-polished wafer, thus improving the surface roughness of the wafer front surface.
摘要翻译：使用由包含水溶性聚合物的无磨粒的碱性溶液构成的抛光液对硅晶片的前表面进行镜面抛光，简化了抛光工艺，从而导致生产率的提高和成本的降低，降低了密度 LPD可归因于处理并发生在镜面抛光晶片的前表面，从而提高了晶片正面的表面粗糙度。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式