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1. 发明授权

US08705106B2 Printing apparatus, information processing apparatus, printing system, and computer readable medium 有权
标题翻译：打印装置，信息处理装置，打印系统和计算机可读介质
公开(公告)号：US08705106B2
公开(公告)日：2014-04-22
申请号：US13405004
申请日：2012-02-24
申请人： Hiroshi Hayashi , Takayuki Yoshida , Shigeaki Saito , Kanou Saitou , Kyoichi Kawakita
发明人： Hiroshi Hayashi , Takayuki Yoshida , Shigeaki Saito , Kanou Saitou , Kyoichi Kawakita
IPC分类号： G06F15/00
CPC分类号： G06F3/121 , G06F3/1234 , G06F3/126 , G06F3/1285 , Y02D10/1592
摘要： A printing apparatus includes a print section that performs printing according to print data, a registering section that registers in advance an information processing apparatus creating and transmitting print data in response to a print instruction from a user, and storing print data that has not been received by a transmission destination in a memory, a determination section that determines whether the print data that has not been received by the printing apparatus is stored in the registered information processing apparatus, when the printing apparatus changes from a data-reception state to a non-data-reception state, a request section that requests the information processing apparatus, in which the print data is determined to be stored, to transmit the stored print data, and a controller that controls the print section to perform printing according to the print data transmitted in response to the request, when the print data is received.
摘要翻译：打印装置包括：打印部，其根据打印数据执行打印;登记部，其预先登记响应于来自用户的打印指示而创建和发送打印数据的信息处理装置，以及存储尚未被接收的打印数据通过存储器中的发送目的地，确定部分，当打印装置从数据接收状态变为非正常状态时，确定打印装置尚未接收到的打印数据是否被存储在登记信息处理装置中，数据接收状态，请求部分，其请求确定存储打印数据的信息处理装置发送存储的打印数据;以及控制器，其控制打印部分根据所传送的打印数据进行打印响应于该请求，当接收到打印数据时。

2. 发明授权

US5524206A Sub-CPU monitoring system including dual port memory 失效
标题翻译：子CPU监控系统包括双端口存储器
公开(公告)号：US5524206A
公开(公告)日：1996-06-04
申请号：US384458
申请日：1995-02-02
申请人： Shigeaki Saito
发明人： Shigeaki Saito
IPC分类号： G06F11/00 , G06F11/14 , G06F11/22 , G06F11/34 , G06F13/00
CPC分类号： G06F11/0757 , G06F11/0724 , G06F11/1415 , G06F11/22 , G06F11/3495
摘要： A multiprocessor system including dual port memories (DPMs), each DPM used as a shared memory circuit for a host CPU circuit and one of sub CPU circuits. Each sub CPU writes an operation information thereof in a monitor information memory portion of an associated DPM after data write to a data portion of the DPM every data collection. The host CPU references the operation information in the monitor information memory portion and reads data from the DPM after a normal operation of the sub CPU is confirmed. When the sub CPU operates abnormally, the host CPU resets the sub CPU operating normally. A watch-dog timer monitors only operation of the host CPU.
摘要翻译：包括双端口存储器（DPM）的多处理器系统，每个DPM用作主机CPU电路和子CPU电路之一的共享存储器电路。每个子CPU在数据写入数据写入DPM的每个数据收集的数据部分后，将其操作信息写入相关DPM的监视信息存储器部分。主机CPU参考监视信息存储部分中的操作信息，并且在子CPU的正常操作被确认之后从DPM读取数据。当副CPU运行异常时，主机CPU重启副CPU正常运行。看门狗定时器仅监视主机CPU的操作。

3. 发明申请

US20100098409A1 COMMUNICATION PATH SETTING METHOD, COMMUNICATION SYSTEM, OPTICAL PROPAGATION APPARATUS AND OPTICAL TRANSMISSION/RECEPTION DEVICE 审中-公开
标题翻译：通信路径设置方法，通信系统，光学传播装置和光传输/接收装置
公开(公告)号：US20100098409A1
公开(公告)日：2010-04-22
申请号：US12581450
申请日：2009-10-19
申请人： Shigeaki Saito , Hajime Morikawa
发明人： Shigeaki Saito , Hajime Morikawa
IPC分类号： H04B10/08
CPC分类号： H04Q11/0062 , H04Q2011/0079 , H04Q2011/0083
摘要： An optical propagation apparatus and method setting a communication path to propagate a signal light between optical transmission/reception devices in different optical propagation apparatuses through a propagation path for multiplex communication. The optical propagation apparatus includes a conduction confirmation unit to confirm the conduction of the conduction confirming light output from one of the optical transmission/reception devices, and a setting unit to set, as a part of the communication path, the propagation path of the conduction confirming light following a point where the conduction of the conduction confirming light is confirmed by the conduction confirmation unit.
摘要翻译：一种光传播装置和方法，其设置通信路径，以通过用于多路复用通信的传播路径在不同光传播装置中的光发送/接收装置之间传播信号光。光传播装置包括：导通确认单元，用于确认从光发送/接收装置之一输出的导通确认光的导通;以及设定单元，将通信路径的传播路径设置为通信路径的一部分在通过导通确认单元确认导通确认光的导通之后确认光。

4. 发明授权

US5448588A Data transmission circuit capable of avoiding repeated reception and transmission of an identical transmission signal 失效
标题翻译：数据传输电路能够避免重复接收和发送相同的传输信号
公开(公告)号：US5448588A
公开(公告)日：1995-09-05
申请号：US842719
申请日：1992-02-27
申请人： Shigeaki Saito
发明人： Shigeaki Saito
IPC分类号： H04L12/42 , H04L12/28
CPC分类号： H04L12/42
摘要： In a transmission system comprising a plurality of data transmission circuits connected through a transmission line to form a loop, a local transmission signal is transmitted from a selected one of the data transmission circuits to the other data transmission circuits through the transmission line to be returned back to the selected data transmission circuit. The selected data transmission circuit interrupts the local transmission signal by detecting an identification signal preassigned to the selected data transmission circuit in a signal selecting circuit and by putting a switch circuit into an off-state during the local transmission signal sent from the selected data transmission circuit.
摘要翻译：在包括通过传输线连接以形成环路的多个数据传输电路的传输系统中，本地传输信号通过传输线从所选择的一个数据传输电路发送到其他数据传输电路以返回到所选择的数据传输电路。所选择的数据传输电路通过检测在信号选择电路中预分配给所选择的数据传输电路的识别信号，并且在从选择的数据传输电路发送的本地传输信号期间将开关电路置于断开状态来中断本地传输信号。

5. 发明授权

US4929572A Dopant of arsenic, method for the preparation thereof and method for doping of semiconductor therewith 失效
标题翻译：砷的掺杂剂，其制备方法和掺杂半导体的方法
公开(公告)号：US4929572A
公开(公告)日：1990-05-29
申请号：US380616
申请日：1989-07-17
申请人： Shigeaki Saito , Toshiharu Matsueda , Yoshihiro Kubota , Masaaki Iguchi
发明人： Shigeaki Saito , Toshiharu Matsueda , Yoshihiro Kubota , Masaaki Iguchi
IPC分类号： H01L21/22 , H01L21/223
CPC分类号： H01L21/223 , H01L21/2225 , Y10S252/95
摘要： The dopant body of arsenic for doping of a semiconductor substrate, e.g., silicon wafer, is a sintered body of a powder mixture comprising silicon arsenide, silica and, optionally, arsenic oxide in a specified proportion. The dopant body can be easily prepared and has various advantages over conventional elementary arsenic powder or a shaped body of silicon arsenide alone in respect of the high mechanical strength of the dopant body and absence of the problem of environmental contamination.
摘要翻译：用于掺杂半导体衬底（例如硅晶片）的砷的掺杂剂体是包含砷化硅，二氧化硅和任选地以特定比例的氧化砷的粉末混合物的烧结体。相对于掺杂剂体的高机械强度和不存在环境污染的问题，掺杂剂体可以容易地制备并且具有优于常规的基本砷粉末或单独的砷化硅成形体的各种优点。

6. 发明授权

US4686668A Loopback of a PCM signal with loopback command signal bits placed in each frame of the signal as predetermined ones of overhead bits 失效
标题翻译：环回PCM信号，其环回命令信号位置于信号的每个帧中，作为开销位的预定值
公开(公告)号：US4686668A
公开(公告)日：1987-08-11
申请号：US730900
申请日：1985-05-06
申请人： Toshikazu Koseki , Shigeaki Saito
发明人： Toshikazu Koseki , Shigeaki Saito
IPC分类号： H04B3/36 , H04B3/46 , H04B17/02 , H04B17/40 , H04J1/16
CPC分类号： H04B17/406
摘要： A first terminal station (11) comprises a loopback signal producing circuit (L1.about.L5) for producing a loopback command signal having a predetermined number of command bits in each frame of a first PCM signal, and a signal multiplexing circuit (42) for multiplexing input signals and overhead bits into successive frames of the PCM signal with the command bits used as predetermined ones of the overhead bits. The command bits indicate a repeater station (21) which should loop back the PCM signal and a second terminal station (12) which should not loop back the PCM signal. The repeater station comprises a signal detector (45) for detecting the command bits indicative of loopback of the PCM signal at the repeater station to produce a loopback control signal, and a loopback carrying out device (63) responsive to the loopback control signal for looping back the PCM signal. The first terminal station further comprises a signal detector (65) for detecting like command bits indicative of loopback of a second PCM signal at the first terminal station to produce a terminal loopback control signal, and a loopback carrying out device (43) responsive to the terminal loopback control signal for looping back the second PCM signal as at least a part of the first PCM signal.
摘要翻译：第一终端站（11）包括用于产生在第一PCM信号的每一帧中具有预定数量的命令位的环回命令信号的环回信号产生电路（L1差分L5）和用于复用的信号复用电路（42）将输入信号和开销比特转换成PCM信号的连续帧，其中命令比特用作开销比特的预定值。命令位指示应该回放PCM信号的中继站（21）和不应该环回PCM信号的第二终端站（12）。中继站包括信号检测器（45），用于检测指示在中继站处的PCM信号的环回的命令位，以产生一个环回控制信号;以及环回执行装置（63），响应环路控制信号进行循环返回PCM信号。第一终端还包括信号检测器（65），用于在第一终端站检测表示第二PCM信号的环回的类似命令比特以产生终端环回控制信号，以及环回执行装置（43），响应于终端环回控制信号，用于将第二PCM信号作为第一PCM信号的至少一部分进行回送。

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