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1. 发明申请

US20130087829A1 SEMICONDUCTOR DEVICE 有权
标题翻译：半导体器件
公开(公告)号：US20130087829A1
公开(公告)日：2013-04-11
申请号：US13805740
申请日：2011-06-29
申请人： Hiromitsu Tanabe , Kenji Kouno , Yukio Tsuzuki
发明人： Hiromitsu Tanabe , Kenji Kouno , Yukio Tsuzuki
IPC分类号： H01L27/07
CPC分类号： H01L27/0664 , H01L27/0722 , H01L29/0696 , H01L29/4236 , H01L29/66348 , H01L29/7395 , H01L29/7397 , H01L29/861
摘要： In a semiconductor device including an IGBT and a freewheeling diode (FWD), W1, W2, and W3 satisfy predetermined formulas. W1 denotes a distance from a boundary between a cathode region and a collector region to a position, where a peripheral-region-side end of the well layer is projected, on a back side of the drift layer. W2 denotes a distance from a boundary between the IGBT and the FWD in a base region to the peripheral-region-side end of the well layer. W3 denotes a distance from the boundary between the cathode region and the collector region to a position, where a boundary between the base region and the well layer is projected, on the back side.
摘要翻译：在包括IGBT和续流二极管（FWD）的半导体器件中，W1，W2和W3满足预定的公式。 W1表示从阴极区域和集电极区域之间的边界到阱层的周边区域侧端部投射在位于漂移层的背面的位置的距离。 W2表示从基极区域到阱区域的周边区域侧的IGBT与FWD之间的边界的距离。 W3表示从阴极区域和集电极区域之间的边界到背面侧的基底区域和阱层之间的边界的位置的距离。

2. 发明申请

US20120132954A1 SEMICONDUCTOR DEVICE 有权
标题翻译：半导体器件
公开(公告)号：US20120132954A1
公开(公告)日：2012-05-31
申请号：US13301973
申请日：2011-11-22
申请人： Kenji KOUNO , Hiromitsu Tanabe , Yukio Tsuzuki
发明人： Kenji KOUNO , Hiromitsu Tanabe , Yukio Tsuzuki
IPC分类号： H01L27/06 , H01L29/772 , H01L29/06
CPC分类号： H01L29/7397 , H01L29/0619 , H01L29/0696 , H01L29/0834 , H01L29/7811 , H01L29/7813 , H01L29/8611
摘要： A semiconductor device includes a semiconductor substrate with a first surface and a second surface. The semiconductor substrate has an element region including an IGBT region and a diode region located adjacent to the IGBT region. An IGBT element is formed in the IGBT region. A diode element is formed in the diode region. A heavily doped region of first conductivity type is located on the first surface side around the element region. An absorption region of first conductivity type is located on the second surface side around the element region. A third semiconductor region of second conductivity type is located on the second surface side around the element region.
摘要翻译：半导体器件包括具有第一表面和第二表面的半导体衬底。半导体基板具有包括IGBT区域和位于IGBT区域附近的二极管区域的元件区域。在IGBT区域中形成IGBT元件。在二极管区域中形成二极管元件。第一导电类型的重掺杂区域位于围绕元件区域的第一表面侧上。第一导电类型的吸收区域位于元件区域周围的第二表面侧。第二导电类型的第三半导体区域位于元件区域周围的第二表面侧。

3. 发明申请

US20100187567A1 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US20100187567A1
公开(公告)日：2010-07-29
申请号：US12656340
申请日：2010-01-26
申请人： Hiromitsu Tanabe , Kenji Kouno , Yukio Tsuzuki , Shinji Amano
发明人： Hiromitsu Tanabe , Kenji Kouno , Yukio Tsuzuki , Shinji Amano
IPC分类号： H01L29/739
CPC分类号： H01L29/0834 , H01L29/0615 , H01L29/1095 , H01L29/7397 , H01L29/861 , H01L2924/0002 , H03K2217/0027 , H01L2924/00
摘要： A semiconductor device includes a semiconductor substrate having a first surface and a second surface. A main region and a sensing region are formed on the first surface side of the semiconductor substrate. A RC-IGBT is formed in the main region and a sensing element for passing electric currents proportional to electric currents flowing through the RC-IGBT is formed in the sensing region. A collector region and a cathode region of the sensing element are formed on the second surface side of the semiconductor substrate. The collector region is located directly below the sensing region in a thickness direction of the semiconductor substrate. The cathode region is not located directly below the sensing region in the thickness direction.
摘要翻译：半导体器件包括具有第一表面和第二表面的半导体衬底。主区域和感测区域形成在半导体衬底的第一表面侧上。在主区域中形成RC-IGBT，并且在感测区域中形成用于使电流与流过RC-IGBT的电流成比例的电流的感测元件。感测元件的集电极区域和阴极区域形成在半导体衬底的第二表面侧上。集电极区域位于半导体基板的厚度方向的感测区域正下方。阴极区域不位于厚度方向的感测区域正下方。

4. 发明授权

US08847276B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US08847276B2
公开(公告)日：2014-09-30
申请号：US13805740
申请日：2011-06-29
申请人： Hiromitsu Tanabe , Kenji Kouno , Yukio Tsuzuki
发明人： Hiromitsu Tanabe , Kenji Kouno , Yukio Tsuzuki
IPC分类号： H01L29/739 , H01L27/07 , H01L29/66 , H01L29/861 , H01L29/06
CPC分类号： H01L27/0664 , H01L27/0722 , H01L29/0696 , H01L29/4236 , H01L29/66348 , H01L29/7395 , H01L29/7397 , H01L29/861
摘要： In a semiconductor device including an IGBT and a freewheeling diode (FWD), W1, W2, and W3 satisfy predetermined formulas. W1 denotes a distance from a boundary between a cathode region and a collector region to a position, where a peripheral-region-side end of the well layer is projected, on a back side of the drift layer. W2 denotes a distance from a boundary between the IGBT and the FWD in a base region to the peripheral-region-side end of the well layer. W3 denotes a distance from the boundary between the cathode region and the collector region to a position, where a boundary between the base region and the well layer is projected, on the back side.
摘要翻译：在包括IGBT和续流二极管（FWD）的半导体器件中，W1，W2和W3满足预定的公式。 W1表示从阴极区域和集电极区域之间的边界到阱层的周边区域侧端部投射在位于漂移层的背面的位置的距离。 W2表示从基极区域到阱区域的周边区域侧的IGBT与FWD之间的边界的距离。 W3表示从阴极区域和集电极区域之间的边界到背面侧的基底区域和阱层之间的边界的位置的距离。

5. 发明申请

US20130009205A1 SEMICONDUCTOR DEVICE 有权
标题翻译：半导体器件
公开(公告)号：US20130009205A1
公开(公告)日：2013-01-10
申请号：US13534530
申请日：2012-06-27
申请人： Yukio TSUZUKI , Kenji Kouno , Hiromitsu Tanabe
发明人： Yukio TSUZUKI , Kenji Kouno , Hiromitsu Tanabe
IPC分类号： H01L29/739
CPC分类号： H01L29/7397 , H01L29/0696 , H01L29/0834 , H01L29/1095 , H01L29/32 , H01L29/36 , H01L29/861
摘要： A semiconductor device has a first conductivity-type semiconductor substrate, second conductivity-type channel regions, and second conductivity-type thinning-out regions. The channel regions and the thinning-out regions are formed adjacent to a substrate surface of the semiconductor substrate. Further, a hole stopper layer is formed in each of the thinning-out regions to divide the thinning-out region into a first part adjacent to the substrate surface and a second part adjacent to a bottom of the thinning-out region. The hole stopper layer has an area density of equal to or less than 4.0×1012 cm−2 to permit a depletion layer to punch through the hole stopper layer, thereby to restrict breakdown properties from being decreased.
摘要翻译：半导体器件具有第一导电型半导体衬底，第二导电型沟道区和第二导电型稀疏区。沟道区域和稀疏区域形成为与半导体衬底的衬底表面相邻。此外，在每个稀疏区域中形成孔阻挡层，以将稀疏区域划分成与衬底表面相邻的第一部分和与稀疏区域的底部相邻的第二部分。该孔阻挡层的面积密度为4.0×10 12 cm -2以下，能够使耗尽层穿过该阻挡层，从而能够抑制击穿性的降低。

6. 发明申请

US20120146091A1 INSULATED GATE SEMICONDUCTOR DEVICE 有权
标题翻译：绝缘栅半导体器件
公开(公告)号：US20120146091A1
公开(公告)日：2012-06-14
申请号：US13313050
申请日：2011-12-07
申请人： Hiromitsu Tanabe , Yukio Tsuzuki , Kenji Kouno , Tomofusa Shiga
发明人： Hiromitsu Tanabe , Yukio Tsuzuki , Kenji Kouno , Tomofusa Shiga
IPC分类号： H01L29/739
CPC分类号： H01L29/7397 , H01L29/0696 , H01L29/1095 , H01L29/36 , H01L29/4236 , H01L29/66348
摘要： An insulated gate semiconductor device includes a first conductivity-type semiconductor substrate, a second conductivity-type base layer on a first surface side of the substrate, a trench dividing the base layer into channel and floating layers, and a first conductivity-type emitter region that is formed in the channel layer and in contact with the trench. The semiconductor device includes a gate insulation layer in the trench, a gate electrode on the insulation layer, an emitter electrode electrically connected to the emitter region and the floating layer, a second conductivity-type collector layer in the substrate, and a collector electrode on the collector layer. The floating layer has a lower impurity concentration than the channel layer. The floating layer has a first conductivity-type hole stopper layer located at a predetermined depth from the first surface of the substrate and at least partially spaced from the insulation layer.
摘要翻译：绝缘栅半导体器件包括第一导电型半导体衬底，在衬底的第一表面侧上的第二导电型基极层，将基极层分为沟道和浮动层的沟槽，以及第一导电型发射极区域其形成在沟道层中并与沟槽接触。半导体器件包括沟槽中的栅极绝缘层，绝缘层上的栅极电极，电连接到发射极区域和浮置层的发射极电极，衬底中的第二导电型集电极层，以及集电极电极集电极层。浮置层的杂质浓度低于沟道层。浮动层具有位于距离基板的第一表面预定深度并且至少部分地与绝缘层间隔开的第一导电型孔阻挡层。

7. 发明授权

US08841699B2 Semiconductor device including insulated gate bipolar transistor and diode 有权
标题翻译：半导体器件包括绝缘栅双极晶体管和二极管
公开(公告)号：US08841699B2
公开(公告)日：2014-09-23
申请号：US13495051
申请日：2012-06-13
申请人： Yukio Tsuzuki , Hiromitsu Tanabe , Kenji Kouno
发明人： Yukio Tsuzuki , Hiromitsu Tanabe , Kenji Kouno
IPC分类号： H01L29/04 , H01L29/10 , H01L29/66 , H01L29/739 , H01L29/861 , H01L29/32 , H01L21/263
CPC分类号： H01L21/263 , H01L29/1095 , H01L29/32 , H01L29/7397 , H01L29/861
摘要： A semiconductor device includes an IGBT forming region and a diode forming region. The IGBT forming region includes an IGBT operating section that operates as an IGBT and a thinned-out section that does not operate as an IGBT. The IGBT operating section includes a channel region, and the thinned-out section includes a first anode region. The diode forming region includes a second anode region. When an area density is defined as a value calculated by integrating a concentration profile of second conductivity type impurities in each of the channel region, the first anode region, and the second anode region in a depth direction, an area density of the channel region is higher than an area density of the first anode region and an area density of the second anode region.
摘要翻译：半导体器件包括IGBT形成区域和二极管形成区域。 IGBT形成区域包括作为IGBT工作的IGBT工作部和不作为IGBT工作的稀疏部。 IGBT操作部分包括沟道区，并且所述稀疏部包括第一阳极区。二极管形成区域包括第二阳极区域。当区域密度定义为通过在深度方向上积分沟道区域，第一阳极区域和第二阳极区域中的每一个中的第二导电类型杂质的浓度分布而计算出的值时，沟道区域的面积密度为高于第一阳极区域的面积密度和第二阳极区域的面积密度。

8. 发明授权

US08729600B2 Insulated gate bipolar transistor (IGBT) with hole stopper layer 有权
标题翻译：绝缘栅双极晶体管（IGBT），带有阻塞层
公开(公告)号：US08729600B2
公开(公告)日：2014-05-20
申请号：US13534530
申请日：2012-06-27
申请人： Yukio Tsuzuki , Kenji Kouno , Hiromitsu Tanabe
发明人： Yukio Tsuzuki , Kenji Kouno , Hiromitsu Tanabe
IPC分类号： H01L29/66
CPC分类号： H01L29/7397 , H01L29/0696 , H01L29/0834 , H01L29/1095 , H01L29/32 , H01L29/36 , H01L29/861
摘要： A semiconductor device has a first conductivity-type semiconductor substrate, second conductivity-type channel regions, and second conductivity-type thinning-out regions. The channel regions and the thinning-out regions are formed adjacent to a substrate surface of the semiconductor substrate. Further, a hole stopper layer is formed in each of the thinning-out regions to divide the thinning-out region into a first part adjacent to the substrate surface and a second part adjacent to a bottom of the thinning-out region. The hole stopper layer has an area density of equal to or less than 4.0×1012 cm−2 to permit a depletion layer to punch through the hole stopper layer, thereby to restrict breakdown properties from being decreased.
摘要翻译：半导体器件具有第一导电型半导体衬底，第二导电型沟道区和第二导电型稀疏区。沟道区域和稀疏区域形成为与半导体衬底的衬底表面相邻。此外，在每个稀疏区域中形成孔阻挡层，以将稀疏区域划分成与衬底表面相邻的第一部分和与稀疏区域的底部相邻的第二部分。该孔阻挡层的面积密度为4.0×10 12 cm -2以下，能够使耗尽层穿过该阻挡层，从而能够抑制击穿性的降低。

9. 发明授权

US08648385B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US08648385B2
公开(公告)日：2014-02-11
申请号：US13301973
申请日：2011-11-22
申请人： Kenji Kouno , Hiromitsu Tanabe , Yukio Tsuzuki
发明人： Kenji Kouno , Hiromitsu Tanabe , Yukio Tsuzuki
IPC分类号： H01L29/66
CPC分类号： H01L29/7397 , H01L29/0619 , H01L29/0696 , H01L29/0834 , H01L29/7811 , H01L29/7813 , H01L29/8611
摘要： A semiconductor device includes a semiconductor substrate with a first surface and a second surface. The semiconductor substrate has an element region including an IGBT region and a diode region located adjacent to the IGBT region. An IGBT element is formed in the IGBT region. A diode element is formed in the diode region. A heavily doped region of first conductivity type is located on the first surface side around the element region. An absorption region of first conductivity type is located on the second surface side around the element region. A third semiconductor region of second conductivity type is located on the second surface side around the element region.
摘要翻译：半导体器件包括具有第一表面和第二表面的半导体衬底。半导体基板具有包括IGBT区域和位于IGBT区域附近的二极管区域的元件区域。在IGBT区域中形成IGBT元件。在二极管区域中形成二极管元件。第一导电类型的重掺杂区域位于围绕元件区域的第一表面侧上。第一导电类型的吸收区域位于元件区域周围的第二表面侧。第二导电类型的第三半导体区域位于元件区域周围的第二表面侧。

10. 发明授权

US08614483B2 Insulated gate semiconductor device 有权
标题翻译：绝缘栅半导体器件
公开(公告)号：US08614483B2
公开(公告)日：2013-12-24
申请号：US13313050
申请日：2011-12-07
申请人： Hiromitsu Tanabe , Yukio Tsuzuki , Kenji Kouno , Tomofusa Shiga
发明人： Hiromitsu Tanabe , Yukio Tsuzuki , Kenji Kouno , Tomofusa Shiga
IPC分类号： H01L29/66
CPC分类号： H01L29/7397 , H01L29/0696 , H01L29/1095 , H01L29/36 , H01L29/4236 , H01L29/66348
摘要： An insulated gate semiconductor device includes a first conductivity-type semiconductor substrate, a second conductivity-type base layer on a first surface side of the substrate, a trench dividing the base layer into channel and floating layers, and a first conductivity-type emitter region that is formed in the channel layer and in contact with the trench. The semiconductor device includes a gate insulation layer in the trench, a gate electrode on the insulation layer, an emitter electrode electrically connected to the emitter region and the floating layer, a second conductivity-type collector layer in the substrate, and a collector electrode on the collector layer. The floating layer has a lower impurity concentration than the channel layer. The floating layer has a first conductivity-type hole stopper layer located at a predetermined depth from the first surface of the substrate and at least partially spaced from the insulation layer.
摘要翻译：绝缘栅半导体器件包括第一导电型半导体衬底，在衬底的第一表面侧上的第二导电型基极层，将基极层分为沟道和浮动层的沟槽，以及第一导电型发射极区域其形成在沟道层中并与沟槽接触。半导体器件包括沟槽中的栅极绝缘层，绝缘层上的栅极电极，电连接到发射极区域和浮置层的发射极电极，衬底中的第二导电型集电极层，以及集电极电极集电极层。浮置层的杂质浓度低于沟道层。浮动层具有位于距离基板的第一表面预定深度并且至少部分地与绝缘层间隔开的第一导电型孔阻挡层。

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