专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US08196071B2 Creating mask data of integrated circuit patterns using calculated etching conversion difference 失效
标题翻译：使用计算出的蚀刻转换差异创建集成电路图案的掩模数据
公开(公告)号：US08196071B2
公开(公告)日：2012-06-05
申请号：US12688644
申请日：2010-01-15
申请人： Hiromitsu Mashita , Katsumi Iyanagi , Takafumi Taguchi , Toshiya Kotani , Hidefumi Mukai , Taiga Uno , Takashi Nakazawa
发明人： Hiromitsu Mashita , Katsumi Iyanagi , Takafumi Taguchi , Toshiya Kotani , Hidefumi Mukai , Taiga Uno , Takashi Nakazawa
IPC分类号： G06F17/50
CPC分类号： G03F1/80 , G03F1/36 , G03F1/54
摘要： A pattern data creating method comprising: referring to a first correspondence relation between an amount of dimension variation between a first pattern formed on a substrate and a second pattern formed by processing the substrate using the first pattern and either one of a pattern total surface area and a pattern boundary length of the first pattern; and creating pattern data for forming the first pattern.
摘要翻译：一种图形数据生成方法，包括：参照形成在基板上的第一图案和通过使用第一图案处理基板而形成的第二图案之间的尺寸变化量之间的第一对应关系，以及图案总表面积和第一图案的图案边界长度; 以及创建用于形成第一图案的图案数据。

2. 发明申请

US20100185313A1 PATTERN DATA CREATING METHOD, COMPUTER PROGRAM PRODUCT, AND SEMICONDUCTOR DEVICE MANUFACTURING METHOD 失效
标题翻译：图形数据创建方法，计算机程序产品和半导体器件制造方法
公开(公告)号：US20100185313A1
公开(公告)日：2010-07-22
申请号：US12688644
申请日：2010-01-15
申请人： Hiromitsu MASHITA , Katsumi Iyanagi , Takafumi Taguchi , Toshiya Kotani , Hidefumi Mukai , Taiga Uno , Takashi Nakazawa
发明人： Hiromitsu MASHITA , Katsumi Iyanagi , Takafumi Taguchi , Toshiya Kotani , Hidefumi Mukai , Taiga Uno , Takashi Nakazawa
IPC分类号： G06F17/50
CPC分类号： G03F1/80 , G03F1/36 , G03F1/54
摘要： A pattern data creating method comprising: referring to a first correspondence relation between an amount of dimension variation between a first pattern formed on a substrate and a second pattern formed by processing the substrate using the first pattern and either one of a pattern total surface area and a pattern boundary length of the first pattern; and creating pattern data for forming the first pattern.
摘要翻译：一种图形数据生成方法，包括：参照形成在基板上的第一图案和通过使用第一图案处理基板而形成的第二图案之间的尺寸变化量之间的第一对应关系，以及图案总表面积和第一图案的图案边界长度; 以及创建用于形成第一图案的图案数据。

3. 发明申请

US20100241261A1 PATTERN GENERATING METHOD, METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE, AND COMPUTER PROGRAM PRODUCT 有权
标题翻译：图案生成方法，制造半导体器件的方法和计算机程序产品
公开(公告)号：US20100241261A1
公开(公告)日：2010-09-23
申请号：US12705640
申请日：2010-02-15
申请人： Takafumi TAGUCHI , Toshiya Kotani , Michiya Takimoto , Fumiharu Nakajima , Ryota Aburada , Hiromitsu Mashita , Katsumi Iyanagi , Chikaaki Kodama
发明人： Takafumi TAGUCHI , Toshiya Kotani , Michiya Takimoto , Fumiharu Nakajima , Ryota Aburada , Hiromitsu Mashita , Katsumi Iyanagi , Chikaaki Kodama
IPC分类号： G05B13/04 , G06F17/50 , G06F19/00
CPC分类号： G03F1/36
摘要： Pattern formation simulations are performed based on design layout data subjected to OPC processing with a plurality of process parameters set in process conditions. A worst condition of the process conditions is calculated based on risk points extracted from simulation results. The design layout data or the OPC processing is changed such that when a pattern is formed under the worst condition based on the changed design layout data or the changed OPC processing a number of the risk points or a risk degree of the risk points of the pattern is smaller than the simulation result.
摘要翻译：基于在处理条件下设置的多个处理参数进行OPC处理的设计布局数据执行模式形成模拟。根据模拟结果提取的风险点计算过程条件的最差条件。改变设计布局数据或OPC处理，使得当在最坏条件下基于改变的设计布局数据形成图案时，或者改变的OPC处理多个风险点或图案的风险点的风险程度小于模拟结果。

4. 发明授权

US08266552B2 Pattern generating method, method of manufacturing semiconductor device, and recording medium 有权
标题翻译：图案生成方法，制造半导体器件的方法和记录介质
公开(公告)号：US08266552B2
公开(公告)日：2012-09-11
申请号：US12705640
申请日：2010-02-15
申请人： Takafumi Taguchi , Toshiya Kotani , Michiya Takimoto , Fumiharu Nakajima , Ryota Aburada , Hiromitsu Mashita , Katsumi Iyanagi , Chikaaki Kodama
发明人： Takafumi Taguchi , Toshiya Kotani , Michiya Takimoto , Fumiharu Nakajima , Ryota Aburada , Hiromitsu Mashita , Katsumi Iyanagi , Chikaaki Kodama
IPC分类号： G06F17/50 , G06F19/00 , G05B13/04
CPC分类号： G03F1/36
摘要： Pattern formation simulations are performed based on design layout data subjected to OPC processing with a plurality of process parameters set in process conditions. A worst condition of the process conditions is calculated based on risk points extracted from simulation results. The design layout data or the OPC processing is changed such that when a pattern is formed under the worst condition based on the changed design layout data or the changed OPC processing a number of the risk points or a risk degree of the risk points of the pattern is smaller than the simulation result.
摘要翻译：基于在处理条件下设置的多个处理参数进行OPC处理的设计布局数据来执行模式形成模拟。根据模拟结果提取的风险点计算过程条件的最差条件。改变设计布局数据或OPC处理，使得当在最坏条件下基于改变的设计布局数据形成图案时，或者改变的OPC处理多个风险点或图案的风险点的风险程度小于模拟结果。

5. 发明申请

US20110047518A1 PATTERN DETERMINING METHOD 审中-公开
标题翻译：图案确定方法
公开(公告)号：US20110047518A1
公开(公告)日：2011-02-24
申请号：US12860278
申请日：2010-08-20
申请人： Issui Aiba , Takafumi Taguchi , Hiromitsu Mashita , Taiga Uno , Fumiharu Nakajima , Toshiya Kotani , Tadahito Fujisawa
发明人： Issui Aiba , Takafumi Taguchi , Hiromitsu Mashita , Taiga Uno , Fumiharu Nakajima , Toshiya Kotani , Tadahito Fujisawa
IPC分类号： G06F17/50
CPC分类号： G06F17/5068 , G03F1/36
摘要： According to the embodiments, a first representative point is set on outline pattern data on a pattern formed in a process before a processed pattern. Then, a minimum distance from the first representative point to a peripheral pattern is calculated. Then, area of a region with no pattern, which is sandwiched by the first representative point and the peripheral pattern, in a region within a predetermined range from the first representative point is calculated. Then, it is determined whether the first representative point becomes a processing failure by using the minimum distance and the area.
摘要翻译：根据实施例，在处理图案之前的处理中形成的图案上的轮廓图案数据上设置第一代表点。然后，计算从第一代表点到外围图案的最小距离。然后，计算出与第一代表点和外围图案夹着的没有图案的区域的区域在距离第一代表点的预定范围内的区域中。然后，通过使用最小距离和面积确定第一代表点是否变为处理失败。

6. 发明申请

US20120244707A1 METHOD OF CORRECTING MASK PATTERN, COMPUTER PROGRAM PRODUCT, MASK PATTERN CORRECTING APPARATUS, AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE 有权
标题翻译：校正掩模图案，计算机程序产品，掩模图案校正装置的方法和制造半导体器件的方法
公开(公告)号：US20120244707A1
公开(公告)日：2012-09-27
申请号：US13239019
申请日：2011-09-21
申请人： Taiga Uno , Toshiya Kotani , Hiromitsu Mashita , Yukiyasu Arisawa
发明人： Taiga Uno , Toshiya Kotani , Hiromitsu Mashita , Yukiyasu Arisawa
IPC分类号： G03F1/70 , H01L21/311 , G06F17/50
CPC分类号： G03F1/36 , G03F1/70 , G03F7/70441 , G03F7/70941
摘要： In the method of correcting a mask pattern according to the embodiments, a mask pattern correction amount for a reference flare value is calculated as a reference mask correction amount, for every type of patterns within the layout, and a change amount of the mask pattern correction amount corresponding to the change amount of the flare value is calculated as the change amount information. A mask pattern corresponding to the flare value of the pattern is created based on the reference mask correction amount and the change amount information corresponding to the pattern, extracted from the information having the pattern, the reference mask correction amount, and the change amount information correlated with each other, and based on a difference between the flare value of the pattern and the reference flare value.
摘要翻译：在根据实施例的校正掩模图案的方法中，对于布局中的每种类型的图案，计算用于参考闪光值的掩模图案校正量作为参考掩模校正量，以及掩模图案校正的改变量计算与闪光值的变化量对应的量作为变化量信息。基于从具有图案的信息提取参考掩模校正量和变化量信息相关联的参考掩模校正量和对应于图案的改变量信息，创建与图案的闪光值相对应的掩模图案并且基于图案的耀斑值和参考闪光值之间的差异。

7. 发明授权

US08617773B2 Method of correcting mask pattern, computer program product, and method of manufacturing semiconductor device 有权
标题翻译：掩模图案校正方法，计算机程序产品和半导体器件制造方法
公开(公告)号：US08617773B2
公开(公告)日：2013-12-31
申请号：US13239019
申请日：2011-09-21
申请人： Taiga Uno , Toshiya Kotani , Hiromitsu Mashita , Yukiyasu Arisawa
发明人： Taiga Uno , Toshiya Kotani , Hiromitsu Mashita , Yukiyasu Arisawa
IPC分类号： G03F1/44 , G03F1/72 , G03F1/38
CPC分类号： G03F1/36 , G03F1/70 , G03F7/70441 , G03F7/70941
摘要： In the method of correcting a mask pattern according to the embodiments, a mask pattern correction amount for a reference flare value is calculated as a reference mask correction amount, for every type of patterns within the layout, and a change amount of the mask pattern correction amount corresponding to the change amount of the flare value is calculated as the change amount information. A mask pattern corresponding to the flare value of the pattern is created based on the reference mask correction amount and the change amount information corresponding to the pattern, extracted from the information having the pattern, the reference mask correction amount, and the change amount information correlated with each other, and based on a difference between the flare value of the pattern and the reference flare value.
摘要翻译：在根据实施例的校正掩模图案的方法中，对于布局中的每种类型的图案，计算用于参考闪光值的掩模图案校正量作为参考掩模校正量，以及掩模图案校正的改变量计算与闪光值的变化量对应的量作为变化量信息。基于从具有图案的信息提取参考掩模校正量和变化量信息相关联的参考掩模校正量和对应于图案的改变量信息，创建与图案的闪光值相对应的掩模图案并且基于图案的耀斑值和参考闪光值之间的差异。

8. 发明授权

US09268208B2 Pattern generating method, pattern forming method, and pattern generating program 有权
标题翻译：图案生成方法，图案形成方法和图案生成程序
公开(公告)号：US09268208B2
公开(公告)日：2016-02-23
申请号：US13421688
申请日：2012-03-15
申请人： Ryota Aburada , Hiromitsu Mashita , Taiga Uno , Masahiro Miyairi , Toshiya Kotani
发明人： Ryota Aburada , Hiromitsu Mashita , Taiga Uno , Masahiro Miyairi , Toshiya Kotani
IPC分类号： G03B27/42 , G03B27/54 , G03B27/68 , G03F1/36 , G03F7/20 , G03F1/70
CPC分类号： G03F1/36 , G03F1/22 , G03F1/70 , G03F7/70441 , G03F7/70941
摘要： One embodiment includes: a step of evaluating an amount of flare occurring through a mask at EUV exposure; a step of providing a dummy mask pattern on the mask based on the evaluated result of the amount of flare; and a step of executing a flare correction and an optical proximity correction on a layout pattern. The layout pattern is provided by the EUV exposure through the mask with the dummy mask pattern.
摘要翻译：一个实施例包括：评估在EUV暴露下通过掩模发生的耀斑的量的步骤; 基于闪光量的评价结果，在掩模上设置虚拟掩模图案的步骤; 以及在布局图案上执行闪光校正和光学邻近校正的步骤。布局图案由通过掩模的EUV曝光与伪掩模图案提供。

9. 发明申请

US20130063707A1 PATTERN GENERATING METHOD, PATTERN FORMING METHOD, AND PATTERN GENERATING PROGRAM 有权
标题翻译：图案生成方法，图案形成方法和图案生成程序
公开(公告)号：US20130063707A1
公开(公告)日：2013-03-14
申请号：US13421688
申请日：2012-03-15
申请人： Ryota ABURADA , Hiromitsu Mashita , Taiga Uno , Masahiro Miyairi , Toshiya Kotani
发明人： Ryota ABURADA , Hiromitsu Mashita , Taiga Uno , Masahiro Miyairi , Toshiya Kotani
IPC分类号： G03B27/42
CPC分类号： G03F1/36 , G03F1/22 , G03F1/70 , G03F7/70441 , G03F7/70941
摘要： One embodiment includes: a step of evaluating an amount of flare occurring through a mask at EUV exposure; a step of providing a dummy mask pattern on the mask based on the evaluated result of the amount of flare; and a step of executing a flare correction and an optical proximity correction on a layout pattern. The layout pattern is provided by the EUV exposure through the mask with the dummy mask pattern.
摘要翻译：一个实施例包括：评估在EUV暴露下通过掩模发生的耀斑的量的步骤; 基于闪光量的评价结果，在掩模上设置虚拟掩模图案的步骤; 以及在布局图案上执行闪光校正和光学邻近校正的步骤。布局图案由通过掩模的EUV曝光与伪掩模图案提供。

10. 发明授权

US07713833B2 Method for manufacturing semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US07713833B2
公开(公告)日：2010-05-11
申请号：US12557111
申请日：2009-09-10
申请人： Hiromitsu Mashita , Toshiya Kotani , Hidefumi Mukai , Fumiharu Nakajima , Chikaaki Kodama
发明人： Hiromitsu Mashita , Toshiya Kotani , Hidefumi Mukai , Fumiharu Nakajima , Chikaaki Kodama
IPC分类号： H01L21/76
CPC分类号： H01L27/11524 , H01L21/0337 , H01L21/32139
摘要： According to an aspect of the present invention, there is provided a method of manufacturing a semiconductor device, the method including: forming a first film on a target film; forming resist patterns on the first film; processing the first film with the resist patterns to form first patterns including: periodic patterns; and aperiodic patterns; removing the resist patterns; forming a second film over the target film; processing the second film to form second side wall patterns on side walls of the first patterns; removing the periodic patterns; and processing the target film with the aperiodic patterns and the second side wall patterns, thereby forming a target patterns including: periodic target patterns; aperiodic target patterns; and dummy patterns arranged between the periodic target patterns and the aperiodic patterns and arranged periodically with the periodic target patterns.
摘要翻译：根据本发明的一个方面，提供一种制造半导体器件的方法，所述方法包括：在靶膜上形成第一膜; 在第一膜上形成抗蚀剂图案; 用抗蚀剂图案处理第一膜以形成第一图案，包括：周期图案; 和非周期性模式; 去除抗蚀剂图案; 在目标膜上形成第二膜; 处理所述第二膜以在所述第一图案的侧壁上形成第二侧壁图案; 去除周期性模式; 用非周期图案和第二侧壁图案处理目标薄膜，从而形成包括周期性目标图案的目标图案; 非周期目标模式; 以及布置在周期性目标图案和非周期性图案之间的虚拟图案，并且周期性地布置有周期性目标图案。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式