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1. 发明授权

US4980748A Semiconductor device made with a trenching process 失效
标题翻译：半导体器件采用开沟工艺制成
公开(公告)号：US4980748A
公开(公告)日：1990-12-25
申请号：US361554
申请日：1989-06-05
申请人： Hiroki Hozumi , Minoru Nakamura , Hiroyuki Miwa , Akio Kayanuma
发明人： Hiroki Hozumi , Minoru Nakamura , Hiroyuki Miwa , Akio Kayanuma
IPC分类号： H01L29/73 , H01L21/331 , H01L21/763 , H01L23/485 , H01L29/732
CPC分类号： H01L29/66272 , H01L21/763 , H01L23/485 , H01L2924/0002
摘要： In a semiconductor device having trench-shaped element isolating regions formed in a semiconductor body and also a conductive layer extending on each element isolating region and connected to an impurity diffusion region of the semiconductor body, there is formed an insulator layer region between an extension of the conductive layer and the element isolating region, and the insulator layer region is buried in the surface portion of the semiconductor body. In such construction, the insulation space between the conductive layer and the semiconductor body can be increased while the distance between the element isolating region and the impurity diffusion region can be shortened to consequently diminish the parasitic capacitance between the conductive layer and the semiconductor body, hence attaining a faster operation in the semiconductor device. When the present invention is applied to a bipolar transistor integrated circuit, a superfast operation is ensured due to the reduction of the base-to-collector capacitance.

2. 发明授权

US5121194A Substrate output for a semiconductor device and a method of fabricating the same 失效
标题翻译：半导体器件的基板输出及其制造方法
公开(公告)号：US5121194A
公开(公告)日：1992-06-09
申请号：US633982
申请日：1990-12-26
申请人： Hiroki Hozumi , Kichio Aida
发明人： Hiroki Hozumi , Kichio Aida
IPC分类号： H01L21/316 , H01L21/74 , H01L21/76 , H01L21/768 , H01L23/522 , H01L27/02 , H01L29/41
CPC分类号： H01L21/743 , H01L27/0214
摘要： In a semiconductor device, a first diffusion region on a surface of an output region for a substrate electric potential, and an element segregation third diffusion region under a field insulating layer, are electrically connected together through a second diffusion region. Thus, the substrate electric potential can be easily output at the surface of the output region, even if the first diffusion region on the surface of the output region is formed shallow by a fabrication process at low temperature due to fine designing of the semiconductor device. A patterning process of the output region in the form of a protruded shape is also required, but the process is completed through a procedure using only one ion implantation and one low temperature thermal oxidation, thereby dramatically simplifying the fabrication process.
摘要翻译：在半导体装置中，在基板电位的输出区域的表面上的第一扩散区域和场绝缘层下的元件偏析第三扩散区域通过第二扩散区域电连接在一起。因此，即使由于半导体器件的精细设计，通过低温制造工艺在输出区域的表面上的第一扩散区域形成为浅，所以可以容易地在输出区域的表面处输出衬底电位。还需要突出形状的输出区域的图案化工艺，但是通过仅使用一个离子注入和一个低温热氧化的工艺完成该工艺，从而大大简化了制造工艺。

3. 发明授权

US5356825A Method of manufacturing semiconductor devices 失效
标题翻译：制造半导体器件的方法
公开(公告)号：US5356825A
公开(公告)日：1994-10-18
申请号：US752592
申请日：1991-09-26
申请人： Hiroki Hozumi , Shinichi Araki
发明人： Hiroki Hozumi , Shinichi Araki
IPC分类号： H01L27/04 , H01L21/331 , H01L21/822 , H01L21/8222 , H01L27/06 , H01L29/73 , H01L29/732 , H01L21/70
CPC分类号： H01L27/0688 , Y10S148/136 , Y10S438/909
摘要： A resistor (45) of semiconductor material is formed on an insulating layer (42), then a silicon nitride film (46) is deposited on the entire surface including the resistor (45), and a silicon dioxide film (47) is sequentially deposited thereon, and thereafter electrodes (49A) and (49B)of the resistor (45) are formed, thereby preventing the fragility of the insulating layer (51) at step portions of the resistor (45), preventing the breakage of the electrodes and interconnections, and improving a withstand voltage between the resistor (45) and the interconnections crossing over it to thereby improve yield of a semiconductor device. An impurity (64) is introduced into a semiconductor film (63) to be a resistor by the ion implantation technique to thereby change the state of the film into an amorphous state, semiconductor film (63a) is heated in atmosphere including hydrogen compound gas and/or hydrogen gas, and then heated to activate it to thereby form a resistor (67), so that a resistance value of the resistor (67) at a region where the impurity is highly dosed can be decreased progressively.
摘要翻译： PCT No.PCT / JP90 / 01698 Sec。 371日期1991年9月26日 102（e）1991年9月26日PCT PCT 1990年12月26日PCT公布。出版物WO91 / 10262 日期：1991年7月11日。在绝缘层（42）上形成半导体材料的电阻器（45），然后在包括电阻器（45）的整个表面上沉积氮化硅膜（46），并且将二氧化硅薄膜（47）依次沉积在其上，然后形成电阻器（45）的电极（49A）和（49B），从而防止在电阻器（45）的台阶处绝缘层（51）的脆弱性，从而防止电极和互连的断裂，以及改善电阻器（45）和与其交叉的互连之间的耐受电压，从而提高半导体器件的产量。通过离子注入技术将杂质（64）引入到半导体膜（63）中作为电阻器，从而将膜的状态改变为非晶态，半导体膜（63a）在包含氢化合物气体的气氛中被加热， /或氢气，然后加热以使其激活，从而形成电阻器（67），使得电阻器（67）在杂质浓度高的区域的电阻值可以逐渐降低。

4. 发明授权

US08395230B2 Semiconductor device and method of manufacturing the same 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US08395230B2
公开(公告)日：2013-03-12
申请号：US12498674
申请日：2009-07-07
申请人： Hiroki Hozumi , Yuji Sasaki , Shusaku Yanagawa
发明人： Hiroki Hozumi , Yuji Sasaki , Shusaku Yanagawa
IPC分类号： H01L29/66 , H01L21/20 , H01L21/768
CPC分类号： H01L29/66712 , H01L29/0615 , H01L29/063 , H01L29/0634 , H01L29/0696 , H01L29/1095 , H01L29/7811
摘要： A semiconductor device includes: a first semiconductor region of a first conductivity type disposed on the side of a first electrode; and a second semiconductor region having first pillar regions of the first conductivity type and second pillar regions of a second conductivity type, the first pillar regions and the second pillar regions being provided in paired state and alternately, in a device portion and a terminal portion surrounding the device portion, along a surface on the side of a second electrode disposed on the opposite side of the first semiconductor region from the first electrode. The semiconductor device further includes a lateral RESURF (reduced surface field) region of the second conductivity type disposed at a surface portion, on the opposite side from the first semiconductor region, of the second semiconductor region in the terminal portion.
摘要翻译：半导体器件包括：设置在第一电极侧的第一导电类型的第一半导体区域; 以及第二半导体区域，具有第一导电类型的第一支柱区域和第二导电类型的第二支柱区域，第一支柱区域和第二支柱区域设置成成对状态，交替地设置在围绕所述器件部分沿着设置在与所述第一电极的所述第一半导体区域相反的一侧上的第二电极的一侧的表面。半导体器件还包括设置在端子部分中的第二半导体区域的与第一半导体区域相反的一侧的表面部分处的第二导电类型的横向RESURF（减小的表面场）区域。

5. 发明授权

US08106447B2 Semiconductor device and method of manufacturing the same 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US08106447B2
公开(公告)日：2012-01-31
申请号：US12502067
申请日：2009-07-13
申请人： Hiroki Hozumi , Yuji Sasaki , Shusaku Yanagawa
发明人： Hiroki Hozumi , Yuji Sasaki , Shusaku Yanagawa
IPC分类号： H01L29/66
CPC分类号： H01L29/7813 , H01L29/045 , H01L29/0619 , H01L29/0634 , H01L29/0638 , H01L29/0696 , H01L29/1095 , H01L29/4238 , H01L29/66734 , H01L29/7811
摘要： Disclosed herein is a semiconductor device, including: a first semiconductor region of a first conductivity type; a second semiconductor region having pairs of first pillar regions of the first conductivity type, and second pillar regions of a second conductivity type alternately provided; a third semiconductor region of the second conductivity type; a fourth semiconductor region of the first conductivity type; and control electrodes each provided within a trench through an insulating film, a sidewall of the trench being formed so as to contact each of the third semiconductor region and the fourth semiconductor region.
摘要翻译：本文公开了一种半导体器件，包括：第一导电类型的第一半导体区域; 具有交替设置的具有第一导电类型的第一支柱区域和第二导电类型的第二柱状区域的第二半导体区域; 第二导电类型的第三半导体区域; 第一导电类型的第四半导体区域; 以及控制电极，每个控制电极通过绝缘膜设置在沟槽内，所述沟槽的侧壁形成为与第三半导体区域和第四半导体区域接触。

6. 发明授权

US5256589A Method of improving the flatness of wiring layer 失效
标题翻译：提高布线层平坦度的方法
公开(公告)号：US5256589A
公开(公告)日：1993-10-26
申请号：US880555
申请日：1992-05-08
申请人： Hiroki Hozumi
发明人： Hiroki Hozumi
IPC分类号： H01L21/306 , H01L21/3105 , H01L21/316 , H01L21/331 , H01L21/76 , H01L21/762 , H01L21/768 , H01L29/73 , H01L29/732 , H01L21/70
CPC分类号： H01L21/31056 , H01L21/76202 , H01L21/7684
摘要： A semiconductor device fabricating method removes bird's head formed in the edges of a SiO.sub.2 film formed by a recessed LOCOS process in fabricating a semiconductor device. The semiconductor device fabricating method comprises steps of forming device isolating regions (6) on a silicon substrate (1) by a recessed LOCOS process, forming an insulating film (10) over the entire surface of the work, and simultaneously forming contacts of a polycrystalline silicon film (15) between the device isolating regions (6) and resistors of the polycrystalline silicon film (15) over the device isolating regions (6). Portions of the polycrystalline silicon film (15) corresponding to the bird's heads in the edges of the insulating film (10) are removed selectively, and exposed portions of the insulating film (10) and the bird's heads in the device isolating regions (6) are removed sequentially by etching to flatten the surface of the work.
摘要翻译：半导体器件制造方法除去在制造半导体器件中通过凹陷LOCOS工艺形成的SiO 2膜的边缘中形成的鸟头。半导体器件制造方法包括以下步骤：通过凹陷LOCOS工艺在硅衬底（1）上形成器件隔离区（6），在工件的整个表面上形成绝缘膜（10），同时形成多晶在器件隔离区域（6）和器件隔离区域（6）之间的多晶硅膜（15）的电阻器之间的硅膜（15）。选择性地去除与绝缘膜（10）的边缘中的鸟头对应的多晶硅膜（15）的部分，绝缘膜（10）和装置隔离区域（6）中的鸟头的露出部分，通过蚀刻顺序地去除以使工件的表面变平。

7. 发明授权

US5013677A Method for manufacture of semiconductor device 失效
标题翻译：半导体器件的制造方法
公开(公告)号：US5013677A
公开(公告)日：1991-05-07
申请号：US538727
申请日：1990-06-18
申请人： Hiroki Hozumi
发明人： Hiroki Hozumi
IPC分类号： H01L29/73 , H01L21/033 , H01L21/28 , H01L21/285 , H01L21/331 , H01L21/8222 , H01L27/06 , H01L29/732
CPC分类号： H01L29/66272 , H01L21/033 , H01L21/28525 , H01L21/8222
摘要： A method for the manufacture of a semiconductor device, comprising the steps of forming ohmic contact portions at the same time, then forming a semiconductor layer on the entire surface including the open portions, and selectively introducing impurities by ion implantation into the contact portions of the semiconductor layer and isolated other element regions, thereby producing a transistor and other elements. This method results in the simultaneous production of a transistor and other elements and simplifies the steps of the process of manufacture.

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