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1. 发明授权

US5252433A Method of forming and removing resist pattern 失效
标题翻译：形成和去除抗蚀剂图案的方法
公开(公告)号：US5252433A
公开(公告)日：1993-10-12
申请号：US667986
申请日：1991-03-12
申请人： Hirofumi Fujioka , Yasuhiro Yoshida , Hiroyuki Nakajima , Hitoshi Nagata , Shinji Kishimura
发明人： Hirofumi Fujioka , Yasuhiro Yoshida , Hiroyuki Nakajima , Hitoshi Nagata , Shinji Kishimura
IPC分类号： G03F7/038 , C08F30/00 , C08F30/04 , C08F30/10 , G03F7/039 , G03F7/26 , G03F7/42 , H01L21/027 , H01L21/30 , G03C5/00 , G03C5/16
CPC分类号： G03F7/265 , G03F7/422
摘要： The present invention is directed to a method of forming and removing a resist pattern, used in a semiconductor manufacture. In a first mode of the present invention, an upper resist layer containing germanium is selectively formed on a bottom resist layer and a resist pattern is formed with the upper resist layer as a mask. In a second mode of the present invention, a resist layer formed on a substrate is selectively exposed to introduce a germanium compound into the exposed portions and the above described resist layer is subjected to an anisotropic dry etching to remove the nonexposed portions of the resist layer, whereby forming a resist pattern. Accordingly, the fine pattern can be formed on the substrate in high accuracy by the use of the above described resist pattern. In addition, in the first and the second modes of the present invention, the resist pattern is removed by the use of an acid having an oxidizing power, so that the resist pattern can be easily removed from the substrate.
摘要翻译：本发明涉及用于半导体制造中的形成和去除抗蚀剂图案的方法。在本发明的第一模式中，在底部抗蚀剂层上选择性地形成含有锗的上抗蚀剂层，并且以上抗蚀剂层形成抗蚀剂图案作为掩模。在本发明的第二方式中，选择性地暴露在基板上形成的抗蚀剂层，以将锗化合物引入到暴露部分中，并且对上述抗蚀剂层进行各向异性干法蚀刻以除去抗蚀剂层的未曝光部分，从而形成抗蚀剂图案。因此，可以通过使用上述抗蚀剂图案以高精度在基板上形成精细图案。此外，在本发明的第一和第二模式中，通过使用具有氧化能力的酸去除抗蚀剂图案，使得抗蚀剂图案可以容易地从基板去除。

2. 发明授权

US5426016A Method of forming and removing resist pattern 失效
标题翻译：形成和去除抗蚀剂图案的方法
公开(公告)号：US5426016A
公开(公告)日：1995-06-20
申请号：US87100
申请日：1993-07-07
申请人： Hirofumi Fujioka , Yasuhiro Yoshida , Hiroyuki Nakajima , Hitoshi Nagata , Shinji Kishimura
发明人： Hirofumi Fujioka , Yasuhiro Yoshida , Hiroyuki Nakajima , Hitoshi Nagata , Shinji Kishimura
IPC分类号： G03F7/038 , C08F30/00 , C08F30/04 , C08F30/10 , G03F7/039 , G03F7/26 , G03F7/42 , H01L21/027 , H01L21/30 , G03C5/00
CPC分类号： G03F7/265 , G03F7/422
摘要： The present invention is directed to a method of forming and removing a resist pattern, used in a semiconductor manufacture.In a first mode of the present invention, an upper resist layer containing germanium is selectively formed on a bottom resist layer and a resist pattern is formed with the upper resist layer as a mask. In a second mode of the present invention, a resist layer formed on a substrate is selectively exposed to introduce a germanium compound into the exposed portions and the above described resist layer is subjected to an anisotropic dry etching to remove the nonexposed portions of the resist layer, whereby forming a resist pattern. Accordingly, the fine pattern can be formed on the substrate in high accuracy by the use of the above described resist pattern. In addition, in the first and the second modes of the present invention, the resist pattern is removed by the use of an acid having an oxidizing power, so that the resist pattern can be easily removed from the substrate.
摘要翻译：本发明涉及用于半导体制造中的形成和去除抗蚀剂图案的方法。在本发明的第一模式中，在底部抗蚀剂层上选择性地形成含有锗的上抗蚀剂层，并且以上抗蚀剂层形成抗蚀剂图案作为掩模。在本发明的第二模式中，选择性地暴露形成在基板上的抗蚀剂层，以将锗化合物引入到暴露部分中，并且对上述抗蚀剂层进行各向异性干蚀刻以除去抗蚀剂层的未涂覆部分，从而形成抗蚀剂图案。因此，可以通过使用上述抗蚀剂图案以高精度在基板上形成精细图案。此外，在本发明的第一和第二模式中，通过使用具有氧化能力的酸去除抗蚀剂图案，使得抗蚀剂图案可以容易地从基板去除。

3. 发明授权

US08389315B2 Method for manufacturing display device 有权
标题翻译：显示装置制造方法
公开(公告)号：US08389315B2
公开(公告)日：2013-03-05
申请号：US13491237
申请日：2012-06-07
申请人： Akiko Tsuji , Toshiki Matsumoto , Hirofumi Fujioka , Mitsuru Asano , Hiroshi Sagawa , Kiwamu Miura
发明人： Akiko Tsuji , Toshiki Matsumoto , Hirofumi Fujioka , Mitsuru Asano , Hiroshi Sagawa , Kiwamu Miura
IPC分类号： H01L33/16
CPC分类号： H01L27/3272 , H01L27/12 , H01L27/3246 , H01L27/3258 , H01L51/5228 , H01L51/5234 , H01L51/5246 , H01L51/5253 , H01L51/56 , H01L2251/5315
摘要： A method for manufacturing a display device is provided. The method includes forming a circuit part; forming a planarization insulating layer on the circuit part; forming a separator in an area outside a display area in which a plurality of light emitting elements are formed by removing the planarization insulating layer at a position surrounding the display area; forming an electrically-conductive layer including a plurality of first electrodes and an auxiliary interconnect on the planarization insulating layer; forming an aperture-defining insulating layer that insulates the first electrodes from each other and has an aperture through which part of the first electrode is exposed; and forming a plurality of light emitting elements by stacking the first electrode, an organic layer, and a second electrode common to the plurality of light emitting elements.
摘要翻译：提供一种制造显示装置的方法。该方法包括形成电路部分; 在电路部分上形成平坦化绝缘层; 通过在围绕所述显示区域的位置去除所述平坦化绝缘层，在其中形成有多个发光元件的显示区域外的区域中形成隔板; 在平坦化绝缘层上形成包括多个第一电极和辅助互连的导电层; 形成孔径限定绝缘层，其将所述第一电极彼此绝缘并且具有所述第一电极的一部分被暴露的孔; 以及通过堆叠多个发光元件共同的第一电极，有机层和第二电极来形成多个发光元件。

4. 发明申请

US20120244775A1 METHOD FOR MANUFACTURING DISPLAY DEVICE 有权
标题翻译：制造显示装置的方法
公开(公告)号：US20120244775A1
公开(公告)日：2012-09-27
申请号：US13491237
申请日：2012-06-07
申请人： Akiko Tsuji , Toshiki Matsumoto , Hirofumi Fujioka , Mitsuru Asano , Hiroshi Sagawa , Kiwamu Miura
发明人： Akiko Tsuji , Toshiki Matsumoto , Hirofumi Fujioka , Mitsuru Asano , Hiroshi Sagawa , Kiwamu Miura
IPC分类号： H05B33/10
CPC分类号： H01L27/3272 , H01L27/12 , H01L27/3246 , H01L27/3258 , H01L51/5228 , H01L51/5234 , H01L51/5246 , H01L51/5253 , H01L51/56 , H01L2251/5315
摘要： A method for manufacturing a display device is provided. The method includes forming a circuit part; forming a planarization insulating layer on the circuit part; forming a separator in an area outside a display area in which a plurality of light emitting elements are formed by removing the planarization insulating layer at a position surrounding the display area; forming an electrically-conductive layer including a plurality of first electrodes and an auxiliary interconnect on the planarization insulating layer; forming an aperture-defining insulating layer that insulates the first electrodes from each other and has an aperture through which part of the first electrode is exposed; and forming a plurality of light emitting elements by stacking the first electrode, an organic layer, and a second electrode common to the plurality of light emitting elements.
摘要翻译：提供一种制造显示装置的方法。该方法包括形成电路部分; 在电路部分上形成平坦化绝缘层; 通过在围绕所述显示区域的位置去除所述平坦化绝缘层，在其中形成有多个发光元件的显示区域外的区域中形成隔板; 在平坦化绝缘层上形成包括多个第一电极和辅助互连的导电层; 形成孔径限定绝缘层，其将所述第一电极彼此绝缘并且具有所述第一电极的一部分被暴露的孔; 以及通过堆叠多个发光元件共同的第一电极，有机层和第二电极来形成多个发光元件。

5. 发明申请

US20100244664A1 LIGHT-EMITTING DISPLAY AND METHOD OF MANUFACTURING THE SAME 有权
标题翻译：发光显示器及其制造方法
公开(公告)号：US20100244664A1
公开(公告)日：2010-09-30
申请号：US12304094
申请日：2007-06-07
申请人： Hirofumi Fujioka , Nobuo Ozawa
发明人： Hirofumi Fujioka , Nobuo Ozawa
IPC分类号： H05B33/06 , H05B33/10
CPC分类号： H05B33/10 , H01L27/3246 , H01L51/5212 , H01L51/5228
摘要： A light-emitting display capable of maintaining low power consumption and improving display quality irrespective of the configuration of an auxiliary wiring is provided. A second electrode 20 and an auxiliary wiring 18B are electrically connected to each other through a conductive contact section 15B. Moreover, only a part of the auxiliary wiring 18B is connected to the contact section 15B. Even if the surface of the auxiliary wiring 18B is oxidized, an increase in connection resistance is prevented. Moreover, a restriction on layout is not imposed at the time of forming the contact section 15B.
摘要翻译：提供能够维持低功耗并且提高显示质量的发光显示器，而与辅助布线的配置无关。第二电极20和辅助布线18B通过导电接触部分15B彼此电连接。此外，只有一部分辅助布线18B连接到接触部分15B。即使辅助布线18B的表面被氧化，也防止了连接电阻的增加。此外，在形成接触部分15B时不施加对布局的限制。

6. 发明授权

US06939760B2 Method for semiconductor device manufacturing to include multistage chemical vapor deposition of material oxide film 失效
标题翻译：半导体器件制造方法包括材料氧化膜的多级化学气相沉积
公开(公告)号：US06939760B2
公开(公告)日：2005-09-06
申请号：US10609476
申请日：2003-07-01
申请人： Hirofumi Fujioka , Kenichi Koyanagi , Hiroyuki Kitamura
发明人： Hirofumi Fujioka , Kenichi Koyanagi , Hiroyuki Kitamura
IPC分类号： C23C16/44 , C23C16/40 , C23C16/455 , G11C7/00 , H01L21/02 , H01L21/205 , H01L21/316 , H01L21/8242 , H01L27/108
CPC分类号： H01L21/0228 , C23C16/405 , C23C16/45553 , H01L21/02181 , H01L21/02183 , H01L21/02189 , H01L21/31637 , H01L27/10852 , H01L28/40
摘要： There is provided a method for manufacturing a semiconductor device including a capacitor having a lower electrode, an upper electrode and a capacitive insulating film between the lower electrode and the upper electrode on a semiconductor substrate, wherein the capacitive insulating film is formed on the lower electrode over the semiconductor substrate using a chemical vapor deposition method, the method including: a lower electrode forming step of forming the lower electrode on the semiconductor, a dual-stage deposition step including a first stage for introducing a material gas containing a specified metal into a reactor in which the semiconductor substrate is placed and a second stage for subsequently introducing an oxidizing gas into the reactor, and wherein a metal oxide film as an oxide of the specified metal is formed on the lower electrode over the semiconductor substrate, by repeating the dual-stage deposition step two or more times, thereby forming the capacitive insulating film; and an upper electrode forming step of forming the upper electrode on the capacitive insulating film. Thus, it is possible to obtain the capacitive insulating film having good step coverage and a good film quality, without reducing throughput.
摘要翻译：提供一种制造半导体器件的方法，该半导体器件包括在半导体衬底上的下电极和上电极之间具有下电极，上电极和电容绝缘膜的电容器，其中电容绝缘膜形成在下电极在半导体基板上使用化学气相沉积法，该方法包括：在半导体上形成下电极的下电极形成步骤，包括用于将含有特定金属的材料气体引入到第一级的第一级的双级沉积步骤其中放置半导体衬底的反应器和用于随后将氧化气体引入反应器的第二阶段，并且其中在半导体衬底上的下电极上形成作为特定金属的氧化物的金属氧化物膜，阶段沉积步骤两次或更多次，从而形成电容绝缘f ; 以及在电容绝缘膜上形成上电极的上电极形成步骤。因此，可以获得具有良好的台阶覆盖率和良好的膜质量的电容绝缘膜，而不降低生产量。

7. 发明授权

US5723813A Insulating spacer with shield electrodes having a graded resistance 失效
标题翻译：绝缘垫片与屏蔽电极具有分级电阻
公开(公告)号：US5723813A
公开(公告)日：1998-03-03
申请号：US663733
申请日：1996-06-14
申请人： Hiromi Ito , Kenji Mimura , Hirofumi Fujioka , Etsuro Tomonaga , Hiroshi Aoki , Hiroyuki Hama
发明人： Hiromi Ito , Kenji Mimura , Hirofumi Fujioka , Etsuro Tomonaga , Hiroshi Aoki , Hiroyuki Hama
IPC分类号： H02G5/06 , H01B7/00
CPC分类号： H02G5/068 , Y10T29/49227
摘要： The present invention provides an insulating spacer for a high-voltage conductor constructed with a plastic made of an epoxy resin composition so that the volumetric specific resistance of the shield electrode increases toward the median point between a container and the conductor and a method for manufacturing shield electrode used therein. The insulating spacer according to the present invention can lessen the concentration of electric fields in the boundary areas between the shield electrode and the insulating member with the result that reliability is improved and service life is lengthened.
摘要翻译：本发明提供一种用由环氧树脂组合物制成的塑料构成的高压导体的绝缘间隔件，使得屏蔽电极的体积电阻率朝向容器和导体之间的中点增加，并且制造屏蔽的方法电极。根据本发明的绝缘间隔物可以减小屏蔽电极和绝缘构件之间的边界区域中的电场浓度，从而提高可靠性并延长使用寿命。

8. 发明授权

US5236984A Cold-curable silicone resin composition 失效
标题翻译：可固化硅树脂组合物
公开(公告)号：US5236984A
公开(公告)日：1993-08-17
申请号：US793976
申请日：1991-11-18
申请人： Shigeyuki Yamamoto , Hiroshi Adachi , Hirofumi Fujioka , Hirozon Kanegae
发明人： Shigeyuki Yamamoto , Hiroshi Adachi , Hirofumi Fujioka , Hirozon Kanegae
IPC分类号： C08L83/04 , C08L83/07 , C09D183/04 , C09D183/07 , H01L21/312
CPC分类号： C09D183/04 , C08L83/04 , C08G77/12 , C08G77/16 , C08G77/18 , C08G77/20 , C08G77/70
摘要： Provided is a silicone resin composition, which is curable at a temperature of not more than 270.degree. C., consisting essentially of a silicone ladder polymer expressed in the following general formula (I): ##STR1## where R.sup.1 to R.sup.4 represent hydrogen atoms or lower alkyl groups respectively, R.sup.5 and R.sup.6 represent aryl groups, alkyl groups or alkenyl groups with alkenyl groups occupying at least 2% of 2n groups R.sup.5 and R.sup.6, and n represents an integer of 5 to 1600, an organic solvent, and/or 0.2 to 20.0 percent by weight of a catalyst with respect to the silicone ladder polymer. This composition is cured at a temperature of not more than 270.degree. C., to form a thin film having excellent solvent resistance and heat resistance.
摘要翻译：提供一种有机硅树脂组合物，其可在不高于270℃的温度下固化，基本上由以下通式（I）表示的硅树脂聚合物组成：其中R 1至R 4表示分别为氢原子或低级烷基，R 5和R 6表示芳基，具有烯基的烷基或烯基占2n组R 5和R 6的至少2％，n表示5至1600的整数，有机溶剂和 /或相对于硅树脂聚合物为0.2〜20.0重量％的催化剂。该组合物在不高于270℃的温度下固化，形成耐溶剂性和耐热性优异的薄膜。

9. 发明授权

US08232719B2 Organic electroluminescence display device 有权
标题翻译：有机电致发光显示装置
公开(公告)号：US08232719B2
公开(公告)日：2012-07-31
申请号：US12902778
申请日：2010-10-12
申请人： Mitsuhiro Kashiwabara , Jiro Yamada , Hiroshi Fujimaki , Hirofumi Fujioka , Reo Asaki
发明人： Mitsuhiro Kashiwabara , Jiro Yamada , Hiroshi Fujimaki , Hirofumi Fujioka , Reo Asaki
IPC分类号： H01L51/00 , H01L51/50
CPC分类号： H01L51/5203 , H01L27/3246 , H01L27/3279 , H01L33/40 , H01L51/5234 , H01L2251/5315
摘要： An organic electroluminescence display device is provided. The organic electroluminescence display device includes plural organic electroluminescence elements. Each organic electroluminescence element includes: a lower electrode; an insulating layer having an opening, in which a lower electrode is exposed at the bottom of the opening; an auxiliary wiring; a stacked structure provided from a portion over the lower electrode exposed at the bottom of the opening to a portion of the insulating layer surrounding the opening, including a light emitting layer made of an organic light-emitting material; and an upper electrode. At least one layer of the stacked structure partially contacts the auxiliary wiring. The insulating layer and the auxiliary wiring are provided in common to the plurality of organic EL elements. The upper electrode covers the whole surface of the stacked structures and the auxiliary wiring.
摘要翻译：提供了一种有机电致发光显示装置。有机电致发光显示装置包括多个有机电致发光元件。每个有机电致发光元件包括：下电极; 具有开口的绝缘层，其中下电极在开口的底部露出; 辅助接线从所述下部电极的露出在所述开口底部的部分的一部分设置在所述绝缘层的围绕所述开口的部分，包括由有机发光材料制成的发光层; 和上电极。层叠结构的至少一层部分地接触辅助布线。绝缘层和辅助布线与多个有机EL元件共同设置。上电极覆盖堆叠结构和辅助配线的整个表面。

10. 发明申请

US20120086328A1 LIGHT-EMITTING DISPLAY AND METHOD OF MANUFACTURING THE SAME 有权
标题翻译：发光显示器及其制造方法
公开(公告)号：US20120086328A1
公开(公告)日：2012-04-12
申请号：US13328136
申请日：2011-12-16
申请人： Hirofumi Fujioka , Nobuo Ozawa
发明人： Hirofumi Fujioka , Nobuo Ozawa
IPC分类号： H05B33/26 , H05B33/10
CPC分类号： H05B33/10 , H01L27/3246 , H01L51/5212 , H01L51/5228
摘要： A light-emitting display capable of maintaining low power consumption and improving display quality irrespective of the configuration of an auxiliary wiring. A second electrode and an auxiliary wiring are electrically connected to each other through a conductive contact section. Moreover, only a part of the auxiliary wiring is connected to the contact section. Even if the surface of the auxiliary wiring is oxidized, an increase in connection resistance is prevented. Moreover, a restriction on layout is not imposed at the time of forming the contact section.
摘要翻译：一种能够保持低功耗并且提高显示质量而不管辅助布线的配置的发光显示器。第二电极和辅助布线通过导电接触部分彼此电连接。此外，只有一部分辅助布线连接到接触部分。即使辅助布线的表面被氧化，也可以防止连接电阻的增加。此外，在形成接触部时，不施加对布局的限制。

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