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1. 发明申请

US20060236145A1 Contents reproduction device 审中-公开
标题翻译：内容再现设备
公开(公告)号：US20060236145A1
公开(公告)日：2006-10-19
申请号：US11214868
申请日：2005-08-31
申请人： Takafumi Yuasa , Yukio Fujii , Kazuhiko Tanaka , Koji Hosogi , Hiroaki Nakata , Masakazu Ehama
发明人： Takafumi Yuasa , Yukio Fujii , Kazuhiko Tanaka , Koji Hosogi , Hiroaki Nakata , Masakazu Ehama
IPC分类号： G06F1/32
CPC分类号： G06F1/3203 , G06F1/3265 , Y02D10/153
摘要： A contents reproduction device realizes reduction of power consumption by controlling power supply control according to the input contents. More specifically, in the contents reproduction device, the PSI analysis unit analyzes additional information in the inputted contents so as to check whether video contents are contained or the signal detection unit checks whether the inputted contents contain a video signal. According to the check result, the video information detection unit detects whether the inputted contents contain video information and outputs the detection result to the power control unit. When the inputted contents contain video information, the power control unit supplies power to the display. When no video information is contained, the power control unit stops power supply to the display and turns off power supply to the display.
摘要翻译：内容再现装置通过根据输入内容控制电源控制来实现功耗的降低。更具体地，在内容再现装置中，PSI分析单元分析输入的内容中的附加信息，以便检查视频内容是否包含，或者信号检测单元检查输入的内容是否包含视频信号。根据检查结果，视频信息检测单元检测输入的内容是否包含视频信息，并将检测结果输出到电源控制单元。当输入的内容包含视频信息时，电源控制单元向显示器供电。当没有包含视频信息时，电源控制单元停止对显示器的电力供应，并且关闭对显示器的电源。

2. 发明申请

US20050119870A1 Processor system with execution-reservable accelerator 审中-公开
标题翻译：具有可执行加速器的处理器系统
公开(公告)号：US20050119870A1
公开(公告)日：2005-06-02
申请号：US10982830
申请日：2004-11-08
申请人： Koji Hosogi , Yukio Fujii , Kazuhiko Tanaka , Hiroaki Nakata , Masakazu Ehama
发明人： Koji Hosogi , Yukio Fujii , Kazuhiko Tanaka , Hiroaki Nakata , Masakazu Ehama
IPC分类号： G06F12/08 , G06F9/38 , G06F9/50 , G06F15/78 , G06F17/50 , G06T1/20 , H04N19/423 , H04N19/436 , H04N19/44 , H04N19/50 , H04N19/503 , H04N19/61 , H04N19/625 , H04N19/91
CPC分类号： G06T1/20 , G06F9/5083 , G06F15/7864 , H04N19/42
摘要： A processor system capable of performing high-speed image processing is provided. The processor system includes a CPU and an accelerator. The CPU connected to the accelerator issues reservations of activation requests to said accelerator. The accelerator has an issued request number counter for counting the number of requests issued by the CPU and a processed request number counter for counting the number of processed requests. The accelerator can activate itself when a counter value of the issued request number counter is larger than a counter value of the processed request number counter.
摘要翻译：提供了能够执行高速图像处理的处理器系统。处理器系统包括CPU和加速器。连接到加速器的CPU发出对所述加速器的激活请求的保留。加速器具有发出的请求号码计数器，用于对CPU发出的请求数进行计数，以及处理的请求号计数器，用于计数处理的请求数。当所发出的请求号码计数器的计数器值大于处理后的请求号码计数器的计数器值时，加速器可以自动激活。

3. 发明申请

US20050162438A1 System including address generator and address generator 审中-公开
标题翻译：系统包括地址发生器和地址发生器
公开(公告)号：US20050162438A1
公开(公告)日：2005-07-28
申请号：US10984974
申请日：2004-11-10
申请人： Hiroaki Nakata , Yukio Fujii , Kazuhiko Tanaka , Koji Hosogi , Masakazu Ehama
发明人： Hiroaki Nakata , Yukio Fujii , Kazuhiko Tanaka , Koji Hosogi , Masakazu Ehama
IPC分类号： G06F12/02 , G06F9/345 , G06F12/06 , G06F13/28 , G09G3/20 , G09G5/37 , G09G5/39
CPC分类号： G06F9/345 , G09G3/20 , G09G2340/0407
摘要： There are provided a system including an address generator and its address generator, capable of generating an address needed for resolution conversion or the like of display data, by using an adder and counters without using a multiplier, which is disadvantageous as regards the mounting area and operation speed when mounting the address generator on an integrated circuit. A first portion for selecting a value from a plurality of values prepared to calculate the next address and adding the selected value, and a second portion for generating a signal to control selection of the value to be added are prepared. A plurality of counters are prepared in the second portion, and the value to be added is selected based on values in these counters. This address generator is incorporated in a DMA controller, memory access controller, display controller or the like, to implement resolution conversion or the like.
摘要翻译：提供了一种包括地址发生器及其地址生成器的系统，其能够通过使用加法器和计数器而不使用乘法器来生成显示数据的分辨率转换等所需的地址，这对于安装区域是不利的，并且将地址发生器安装在集成电路上时的运行速度。准备用于从准备计算下一地址并添加所选值的多个值中选择值的第一部分，以及用于生成用于控制要添加的值的选择的信号的第二部分。在第二部分准备多个计数器，并且基于这些计数器中的值来选择要添加的值。该地址生成器被并入DMA控制器，存储器访问控制器，显示控制器等中，以实现分辨率转换等。

4. 发明授权

US07177996B2 Arrangements having security protection 有权
标题翻译：有安全保护的安排
公开(公告)号：US07177996B2
公开(公告)日：2007-02-13
申请号：US10801834
申请日：2004-03-17
申请人： Masakazu Ehama , Kazuhiko Tanaka , Koji Hosogi , Hiroaki Nakata
发明人： Masakazu Ehama , Kazuhiko Tanaka , Koji Hosogi , Hiroaki Nakata
IPC分类号： G06F12/00
CPC分类号： G06F12/1441 , G06F12/1027 , G06F12/1425
摘要： Security threats are reduced by providing a TLB in a bus interface unit of a media processor whose contents can be updated only from inside the media processor. The TLB checks whether an address specified by an external access request falls within access-permitted areas registered in it. If it does, an access request from outside is passed on to an inside of the media processor; otherwise, it is rejected.
摘要翻译：通过在媒体处理器的总线接口单元中提供TLB来减少安全威胁，其媒体处理器的内容可以仅从媒体处理器内部更新。 TLB检查由外部访问请求指定的地址是否落在其中注册的访问允许区域内。如果是这样，则来自外部的访问请求被传递到媒体处理器的内部; 否则就被拒绝。

5. 发明申请

US20050005081A1 Security system 有权
标题翻译：保安系统
公开(公告)号：US20050005081A1
公开(公告)日：2005-01-06
申请号：US10801834
申请日：2004-03-17
申请人： Masakazu Ehama , Kazuhiko Tanaka , Koji Hosogi , Hiroaki Nakata
发明人： Masakazu Ehama , Kazuhiko Tanaka , Koji Hosogi , Hiroaki Nakata
IPC分类号： G06F12/14 , G06F12/08 , G06F12/10
CPC分类号： G06F12/1441 , G06F12/1027 , G06F12/1425
摘要： A processor connected to an external bus in a conventional configuration made it possible to access its internal registers and local memory through the external bus and to read or update their contents. This created potential security threats including confidential data such as cryptographic keys being stolen and a newly developed piece of software being copied. In a conventional media processor connected to an external bus all access requests from a device connected on the external bus are honored. Security threats are reduced by providing a TLB in the bus interface unit of the media processor whose contents can be updated only from inside the media processor. The TLB checks whether the address specified by an external access request falls within the access-permitted areas registered in it. If it does, the access request from outside is passed on to the inside of the media processor; otherwise, it is rejected.
摘要翻译：以常规配置连接到外部总线的处理器使得可以通过外部总线访问其内部寄存器和本地存储器并读取或更新其内容。这产生了潜在的安全威胁，包括机密数据，例如加密密钥被盗，以及新开发的软件被复制。在连接到外部总线的常规媒体处理器中，来自连接在外部总线上的设备的所有访问请求都被保证。通过在媒体处理器的总线接口单元中提供TLB来减少安全威胁，其内容只能从媒体处理器内部更新。 TLB检查由外部访问请求指定的地址是否落在其中注册的访问允许区域内。如果是，则来自外部的访问请求被传递到媒体处理器的内部; 否则就被拒绝。

6. 发明申请

US20100146234A1 ARRANGEMENTS HAVING SECURITY PROTECTION 有权
标题翻译：有安全保障的安排
公开(公告)号：US20100146234A1
公开(公告)日：2010-06-10
申请号：US12706285
申请日：2010-02-16
申请人： Masakazu EHAMA , Kazuhiko Tanaka , Koji Hosogi , Hiroaki Nakata
发明人： Masakazu EHAMA , Kazuhiko Tanaka , Koji Hosogi , Hiroaki Nakata
IPC分类号： G06F12/14 , G06F12/00 , G06F13/14
CPC分类号： G06F12/1441 , G06F12/1027 , G06F12/1425
摘要： An external bus interface method including: receiving, via an access control unit, an access request conveyed through an external bus, and judging, via an access judging unit connected to the access control unit, whether the access request is to be honored or rejected, wherein upon receiving the access request, the access control unit sends to the access judging unit an access judging check request signal asking whether the requested address falls within one of access-permitted areas registered in the access judging unit, the access judging unit checks whether the requested address falls within one of the access-permitted areas registered in it and returns to the access control unit, an access judging check result signal indicating whether the access request is to be honored or rejected, and if the access judging check result signal indicates that the access request is to be rejected, the access control unit nullifies the access request.
摘要翻译：一种外部总线接口方法，包括：经由访问控制单元接收通过外部总线传送的访问请求，并且经由与所述访问控制单元连接的访问判断单元判断所述访问请求是否被履行或拒绝，其中，在接收到所述访问请求时，所述访问控制单元向所述访问判断单元发送访问判断检查请求信号，询问所请求的地址是否落入在所述访问判断单元中登记的访问允许区域之一内，所述访问判断单元检查是否所请求的地址落在登记在其中的访问许可区域之一内，并返回到访问控制单元，指示是否要访问或拒绝访问请求的访问判断检查结果信号，以及访问判断检查结果信号是否指示访问请求将被拒绝，访问控制单元使访问请求无效。

7. 发明授权

US07664925B2 Arrangements having security protection 有权
标题翻译：有安全保护的安排
公开(公告)号：US07664925B2
公开(公告)日：2010-02-16
申请号：US12258685
申请日：2008-10-27
申请人： Masakazu Ehama , Kazuhiko Tanaka , Koji Hosogi , Hiroaki Nakata
发明人： Masakazu Ehama , Kazuhiko Tanaka , Koji Hosogi , Hiroaki Nakata
IPC分类号： G06F12/00
CPC分类号： G06F12/1441 , G06F12/1027 , G06F12/1425
摘要： Access control unit sends to the access judging unit an access judging check request signal asking whether the requested address falls within one of the access-permitted areas registered in the access judging unit, the access judging unit checks whether the requested address falls within one of the access-permitted areas registered in it and returns to the access control unit an access judging check result signal indicating whether the access request is to be honored or rejected, and the access control unit permits access to the internal bus if the access judging check result signal indicates that the access request is to be honored, or rejects the access request otherwise.
摘要翻译：访问控制单元向访问判断单元发送访问判断检查请求信号，询问所请求的地址是否落在在访问判断单元中登记的访问允许区域之一内，访问判断单元检查请求的地址是否落入在其中登记的访问许可区域，并且返回到访问控制单元的访问判断检查结果信号，该访问判断检查结果信号指示访问请求是否被遵从或拒绝，并且如果访问判断检查结果信号则访问控制单元允许访问内部总线表示要访问访问请求，否则拒绝访问请求。

8. 发明授权

US07917718B2 Arrangements having security protection 有权
标题翻译：有安全保护的安排
公开(公告)号：US07917718B2
公开(公告)日：2011-03-29
申请号：US12706285
申请日：2010-02-16
申请人： Masakazu Ehama , Kazuhiko Tanaka , Koji Hosogi , Hiroaki Nakata
发明人： Masakazu Ehama , Kazuhiko Tanaka , Koji Hosogi , Hiroaki Nakata
IPC分类号： G06F13/00
CPC分类号： G06F12/1441 , G06F12/1027 , G06F12/1425
摘要： An external bus interface method including: receiving, via an access control unit, an access request conveyed through an external bus, and judging, via an access judging unit connected to the access control unit, whether the access request is to be honored or rejected, wherein upon receiving the access request, the access control unit sends to the access judging unit an access judging check request signal asking whether the requested address falls within one of access-permitted areas registered in the access judging unit, the access judging unit checks whether the requested address falls within one of the access-permitted areas registered in it and returns to the access control unit, an access judging check result signal indicating whether the access request is to be honored or rejected, and if the access judging check result signal indicates that the access request is to be rejected, the access control unit nullifies the access request.
摘要翻译：一种外部总线接口方法，包括：经由访问控制单元接收通过外部总线传送的访问请求，并且经由与所述访问控制单元连接的访问判断单元判断所述访问请求是否被履行或拒绝，其中，在接收到所述访问请求时，所述访问控制单元向所述访问判断单元发送访问判断检查请求信号，询问所请求的地址是否落入在所述访问判断单元中登记的访问允许区域之一内，所述访问判断单元检查是否所请求的地址落在登记在其中的访问许可区域之一内，并返回到访问控制单元，指示是否要访问或拒绝访问请求的访问判断检查结果信号，以及访问判断检查结果信号是否指示访问请求将被拒绝，访问控制单元使访问请求无效。

9. 发明授权

US07444487B2 Arrangements having security protection 有权
标题翻译：有安全保护的安排
公开(公告)号：US07444487B2
公开(公告)日：2008-10-28
申请号：US11702538
申请日：2007-02-06
申请人： Masakazu Ehama , Kazuhiko Tanaka , Koji Hosogi , Hiroaki Nakata
发明人： Masakazu Ehama , Kazuhiko Tanaka , Koji Hosogi , Hiroaki Nakata
IPC分类号： G06F12/00
CPC分类号： G06F12/1441 , G06F12/1027 , G06F12/1425
摘要： Access control unit sends to the access judging unit an access judging check request signal asking whether the requested address falls within one of the access-permitted areas registered in the access judging unit, the access judging unit checks whether the requested address falls within one of the access-permitted areas registered in it and returns to the access control unit an access judging check result signal indicating whether the access request is to be honored or rejected, and the access control unit permits access to the internal bus if the access judging check result signal indicates that the access request is to be honored, or rejects the access request otherwise.
摘要翻译：访问控制单元向访问判断单元发送访问判断检查请求信号，询问所请求的地址是否落在在访问判断单元中登记的访问允许区域之一内，访问判断单元检查请求的地址是否落入在其中登记的访问许可区域，并且返回到访问控制单元的访问判断检查结果信号，该访问判断检查结果信号指示访问请求是否被遵从或拒绝，并且如果访问判断检查结果信号则访问控制单元允许访问内部总线表示要访问访问请求，否则拒绝访问请求。

10. 发明申请

US20070136543A1 Arrangements having security protection 有权
标题翻译：有安全保护的安排
公开(公告)号：US20070136543A1
公开(公告)日：2007-06-14
申请号：US11702538
申请日：2007-02-06
申请人： Masakazu Ehama , Kazuhiko Tanaka , Koji Hosogi , Hiroaki Nakata
发明人： Masakazu Ehama , Kazuhiko Tanaka , Koji Hosogi , Hiroaki Nakata
IPC分类号： G06F12/14 , G06F13/00 , G06F12/00
CPC分类号： G06F12/1441 , G06F12/1027 , G06F12/1425
摘要： Access control unit sends to the access judging unit an access judging check request signal asking whether the requested address falls within one of the access-permitted areas registered in the access judging unit, the access judging unit checks whether the requested address falls within one of the access-permitted areas registered in it and returns to the access control unit an access judging check result signal indicating whether the access request is to be honored or rejected, and the access control unit permits access to the internal bus if the access judging check result signal indicates that the access request is to be honored, or rejects the access request otherwise.
摘要翻译：访问控制单元向访问判断单元发送访问判断检查请求信号，询问所请求的地址是否落在在访问判断单元中登记的访问允许区域之一内，访问判断单元检查请求的地址是否落入在其中登记的访问许可区域，并且返回到访问控制单元的访问判断检查结果信号，该访问判断检查结果信号指示访问请求是否被遵从或拒绝，并且如果访问判断检查结果信号则访问控制单元允许访问内部总线表示要访问访问请求，否则拒绝访问请求。

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