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1. 发明授权

US6104057A Electrically alterable non-volatile semiconductor memory device 失效
标题翻译：电可变非易失性半导体存储器件
公开(公告)号：US6104057A
公开(公告)日：2000-08-15
申请号：US138891
申请日：1998-08-24
申请人： Hiroaki Nakanishi , Kunio Matsudaira , Masahiro Matsuo , Hirohisa Abe , Yoichi Sakai
发明人： Hiroaki Nakanishi , Kunio Matsudaira , Masahiro Matsuo , Hirohisa Abe , Yoichi Sakai
IPC分类号： G11C16/04 , H01L29/423 , H01L29/76
CPC分类号： G11C16/0491 , G11C16/0425 , G11C16/0433 , H01L29/42324
摘要： An electrically alterable non-volatile memory device is disclosed. In the device architecture of the memory device, control gates are formed, divided corresponding to the blocks and interconnected independently within each block, to further be connected to a metal gate line through block select MOS transistors which are formed on a semiconductor substrate between the blocks. All gate electrodes of the block select MOS transistors which are connected to the control gates interconnected as above within each block are further connected each other. These block select transistors can be controlled by applying erase block signals such as, EBS0, EBS1 and so on, to respective transistors. In addition, the control gates are further connected to a decoder such that some of these control gates may be selected through metal control gate lines. With the block select transistors together with the metal control gate line provided as above, erasing can be achieved in the unit of memory cells which are connected to a metal control gate line within a block.
摘要翻译：公开了一种电可更改的非易失性存储器件。在存储器件的器件架构中，形成控制栅极，对应于块并且在每个块内独立互连，以进一步通过形成在块之间的半导体衬底上的块选择MOS晶体管连接到金属栅极线。在各块内连接到如上互连的控制栅极的块选择MOS晶体管的所有栅极电极彼此进一步连接。可以通过将诸如EBS0，EBS1等的擦除块信号施加到相应的晶体管来控制这些块选择晶体管。此外，控制栅极进一步连接到解码器，使得这些控制栅极中的一些可以通过金属控制栅极线选择。通过块选择晶体管与如上所述设置的金属控制栅极线一起，可以以连接到块内的金属控制栅极线的存储单元为单位实现擦除。

2. 发明授权

US06545916B2 Memory configuration of a composite memory device 有权
公开(公告)号：US06545916B2
公开(公告)日：2003-04-08
申请号：US09989841
申请日：2001-11-20
申请人： Minoru Fukuda , Hiroaki Nakanishi , Kunio Matsudaira , Masahiro Matsuo , Hirohisa Abe
发明人： Minoru Fukuda , Hiroaki Nakanishi , Kunio Matsudaira , Masahiro Matsuo , Hirohisa Abe
IPC分类号： G11C1604
CPC分类号： G11C16/16
摘要： The present invention is related to a composite flash memory device comprises a plural sector flash memory array which is divided to plural sector that is a minimum erasing unit of the flash memory device, a flash memory array storing control commands which control a total system of the composite flash memory device and/or the only composite flash memory device in and sharing I/O line of the plural sector flash memory array, the read operation of the flash memory array is enable when the plural sector flash memory array is gained access.

3. 发明授权

US06335883B1 Memory configuration of a composite memory device 有权
公开(公告)号：US06335883B1
公开(公告)日：2002-01-01
申请号：US09628825
申请日：2000-07-31
申请人： Minoru Fukuda , Hiroaki Nakanishi , Kunio Matsudaira , Masahiro Matsuo , Hirohisa Abe
发明人： Minoru Fukuda , Hiroaki Nakanishi , Kunio Matsudaira , Masahiro Matsuo , Hirohisa Abe
IPC分类号： G11C1604
CPC分类号： G11C16/16
摘要： The present invention is related to a composite flash memory device comprises a plural sector flash memory array which is divided to plural sector that is a minimum erasing unit of the flash memory device, a flash memory array storing control commands which control a total system of the composite flash memory device and/or the only composite flash memory device in and sharing I/O line of the plural sector flash memory array, the read operation of the flash memory array is enable when the plural sector flash memory array is gained access.

4. 发明授权

US07969791B2 Memory configuration of a composite memory device 有权
标题翻译：复合存储设备的内存配置
公开(公告)号：US07969791B2
公开(公告)日：2011-06-28
申请号：US12650762
申请日：2009-12-31
申请人： Minoru Fukuda , Hiroaki Nakanishi , Kunio Matsudaira , Masahiro Matsuo , Hirohisa Abe
发明人： Minoru Fukuda , Hiroaki Nakanishi , Kunio Matsudaira , Masahiro Matsuo , Hirohisa Abe
IPC分类号： G11C16/04
CPC分类号： G11C16/16
摘要： The present invention is related to a composite flash memory device comprises a plural sector flash memory array which is divided to plural sector that is a minimum erasing unit of the flash memory device, a flash memory array storing control commands which control a total system of the composite flash memory device and/or the only composite flash memory device in and sharing I/O line of the plural sector flash memory array, the read operation of the flash memory array is enable when the plural sector flash memory array is gained access.
摘要翻译：本发明涉及一种复合闪速存储装置，它包括被分成多个扇区的多扇区快闪存储器阵列，该多个扇区闪速存储器阵列是闪速存储器件的最小擦除单元，存储控制命令的闪存阵列，复合闪速存储器件和/或唯一的复合闪速存储器件，并且共享多扇区快闪存储器阵列的I / O线，当获得多个扇区闪速存储器阵列时，闪存阵列的读取操作成立。

5. 发明授权

US07672172B2 Memory configuration of a composite memory device 有权
标题翻译：复合存储设备的内存配置
公开(公告)号：US07672172B2
公开(公告)日：2010-03-02
申请号：US12333674
申请日：2008-12-12
申请人： Minoru Fukuda , Hiroaki Nakanishi , Kunio Matsudaira , Masahiro Matsuo , Hirohisa Abe
发明人： Minoru Fukuda , Hiroaki Nakanishi , Kunio Matsudaira , Masahiro Matsuo , Hirohisa Abe
IPC分类号： G11C16/04
CPC分类号： G11C16/16
摘要： The present invention is related to a composite flash memory device comprises a plural sector flash memory array which is divided to plural sector that is a minimum erasing unit of the flash memory device, a flash memory array storing control commands which control a total system of the composite flash memory device and/or the only composite flash memory device in and sharing I/O line of the plural sector flash memory array, the read operation of the flash memory array is enable when the plural sector flash memory array is gained access.
摘要翻译：本发明涉及一种复合闪速存储装置，它包括被分成多个扇区的多扇区快闪存储器阵列，该多个扇区闪速存储器阵列是闪速存储器件的最小擦除单元，存储控制命令的闪存阵列，复合闪速存储器件和/或唯一的复合闪速存储器件，并且共享多扇区快闪存储器阵列的I / O线，当获得多个扇区闪速存储器阵列时，闪存阵列的读取操作成立。

6. 再颁专利

USRE40917E1 Memory configuration of a composite memory device 有权
公开(公告)号：USRE40917E1
公开(公告)日：2009-09-15
申请号：US10613352
申请日：2003-07-03
申请人： Minoru Fukuda , Hiroaki Nakanishi , Kunio Matsudaira , Masahiro Matsuo , Hirohisa Abe
发明人： Minoru Fukuda , Hiroaki Nakanishi , Kunio Matsudaira , Masahiro Matsuo , Hirohisa Abe
IPC分类号： G11C16/04
CPC分类号： G11C16/16
摘要： The present invention is related to a composite flash memory device comprises a plural sector flash memory array which is divided to plural sector that is a minimum erasing unit of the flash memory device, a flash memory array storing control commands which control a total system of the composite flash memory device and/or the only composite flash memory device in and sharing I/O line of the plural sector flash memory array, the read operation of the flash memory array is enable when the plural sector flash memory array is gained access.

7. 发明授权

US07483312B2 Memory configuration of a composite memory device 有权
公开(公告)号：US07483312B2
公开(公告)日：2009-01-27
申请号：US10409353
申请日：2003-04-08
申请人： Minoru Fukuda , Hiroaki Nakanishi , Kunio Matsudaira , Masahiro Matsuo , Hirohisa Abe
发明人： Minoru Fukuda , Hiroaki Nakanishi , Kunio Matsudaira , Masahiro Matsuo , Hirohisa Abe
IPC分类号： G11C16/04
CPC分类号： G11C16/16
摘要： The present invention is related to a composite flash memory device comprises a plural sector flash memory array which is divided to plural sector that is a minimum erasing unit of the flash memory device, a flash memory array storing control commands which control a total system of the composite flash memory device and/or the only composite flash memory device in and sharing I/O line of the plural sector flash memory array, the read operation of the flash memory array is enable when the plural sector flash memory array is gained access.

8. 发明授权

US6115292A Memory configuration of a composite memory device 失效
公开(公告)号：US6115292A
公开(公告)日：2000-09-05
申请号：US080696
申请日：1998-05-18
申请人： Minoru Fukuda , Hiroaki Nakanishi , Kunio Matsudaira , Masahiro Matsuo , Hirohisa Abe
发明人： Minoru Fukuda , Hiroaki Nakanishi , Kunio Matsudaira , Masahiro Matsuo , Hirohisa Abe
IPC分类号： G11C16/02 , G11C16/16 , G11C16/04
CPC分类号： G11C16/16
摘要： The present invention is related to a composite flash memory device comprises a plural sector flash memory array which is divided to plural sector that is a minimum erasing unit of the flash memory device, a flash memory array storing control commands which control a total system of the composite flash memory device and/or the only composite flash memory device in and sharing I/O line of the plural sector flash memory array, the read operation of the flash memory array is enable when the plural sector flash memory array is gained access.

9. 发明申请

US20090091984A1 MEMORY CONFIGURATION OF A COMPOSITE MEMORY DEVICE 有权
标题翻译：复合存储器件的存储器配置
公开(公告)号：US20090091984A1
公开(公告)日：2009-04-09
申请号：US12333674
申请日：2008-12-12
申请人： Minoru FUKUDA , Hiroaki Nakanishi , Kunio Matsudaira , Masahiro Matsuo , Hirohisa Abe
发明人： Minoru FUKUDA , Hiroaki Nakanishi , Kunio Matsudaira , Masahiro Matsuo , Hirohisa Abe
IPC分类号： G11C11/34
CPC分类号： G11C16/16
摘要： The present invention is related to a composite flash memory device comprises a plural sector flash memory array which is divided to plural sector that is a minimum erasing unit of the flash memory device, a flash memory array storing control commands which control a total system of the composite flash memory device and/or the only composite flash memory device in and sharing I/O line of the plural sector flash memory array, the read operation of other flash memory array is enable when the plural sector flash memory array is gained access.
摘要翻译：本发明涉及一种复合闪速存储装置，它包括被分成多个扇区的多扇区快闪存储器阵列，该多个扇区闪速存储器阵列是闪速存储器件的最小擦除单元，存储控制命令的闪存阵列，复合闪速存储器件和/或唯一的复合闪速存储器件，并且共享多扇区闪速存储器阵列的I / O线，当获得多个扇区闪速存储器阵列时，其他闪速存储器阵列的读取操作成立。

10. 发明授权

US08892023B2 Image forming apparatus with width-wise sheet shifting mechanism 有权
标题翻译：具有宽度方向的纸张移动机构的图像形成装置
公开(公告)号：US08892023B2
公开(公告)日：2014-11-18
申请号：US13659339
申请日：2012-10-24
申请人： Yusuke Kawanago , Takahiro Okubo , Masahiro Matsuo , Yoshiteru Kawakami , Haruki Motegi , Osamu Yoshimura , Kunihiro Kawachi , Ken Nonaka
发明人： Yusuke Kawanago , Takahiro Okubo , Masahiro Matsuo , Yoshiteru Kawakami , Haruki Motegi , Osamu Yoshimura , Kunihiro Kawachi , Ken Nonaka
IPC分类号： G03G15/00 , B65H7/02 , G03G15/01
CPC分类号： G03G15/0189 , G03G15/6561
摘要： An image forming apparatus acquires an amount of deflection of the transporting sheet from a reference position thereof and calculates a required shift amount of the sheet. It determines whether or not the sheet is shifted frontward. If so, the image forming apparatus acquires a second specified shift value which is determined based on an urging force and the required shift amount using a second correction equation. Alternatively, if the sheet is shifted backward, the image forming apparatus acquires a first specified shift value which is determined based on the urging force and the required shift amount using a first correction equation. The image forming apparatus performs a registration roller shift correction based on the acquired first or second specified shift value.
摘要翻译：图像形成装置从基准位置获取运送纸张的偏转量，并计算纸张的所需移动量。它确定纸张是否向前移动。如果是这样，图像形成装置获取基于使用第二校正方程的推动力和所需移动量确定的第二指定移位值。或者，如果片材向后移动，则图像形成装置使用第一校正方程获取基于推动力和所需移动量确定的第一指定移位值。图像形成装置基于获取的第一或第二指定移位值执行对位辊移位校正。

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