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    • 2. 发明授权
    • Bipolar transistor with a GaAs substrate and a SiGe base or collector
    • 具有GaAs衬底和SiGe基极或集电极的双极晶体管
    • US07157749B2
    • 2007-01-02
    • US11053548
    • 2005-02-09
    • Hidetoshi FujimotoTetsuro NozuYoshitomo SagaeAkira Yoshioka
    • Hidetoshi FujimotoTetsuro NozuYoshitomo SagaeAkira Yoshioka
    • H01L31/0328H01L31/0336H01L31/072H01L31/109
    • H01L29/267H01L29/1004H01L29/7371
    • A bipolar transistor is provided which includes a GaAs substrate, an n-type collector region formed on the GaAs substrate, a p-type base region formed on the n-type collector region and having a p-type base layer of SiGe having a composition lattice-matched with the GaAs substrate, and an n-type emitter region formed on the p-type base region. A bipolar transistor may include a GaAs substrate, a collector region of a first conductivity type formed on the GaAs substrate and including a collector contact layer of the first conductivity type SiGe, which has a composition lattice-matched with the GaAs substrate, a base region of a second conductivity type formed on the collector region of the first conductivity type, and an emitter region of the first conductivity type formed on the base region of the second conductivity type.
    • 提供一种双极晶体管,其包括GaAs衬底,形成在GaAs衬底上的n型集电极区域,形成在n型集电极区域上并具有具有组成的SiGe的p型基极层的p型基极区域 与GaAs衬底晶格匹配,以及形成在p型基极区上的n型发射极区。 双极晶体管可以包括GaAs衬底,在GaAs衬底上形成的第一导电类型的集电极区域,并且包括具有与GaAs衬底晶格匹配的组成的第一导电类型SiGe的集电极接触层, 形成在第一导电类型的集电极区域上的第二导电类型的第一导电类型的发射极区域和形成在第二导电类型的基极区域上的第一导电类型的发射极区域。
    • 4. 发明申请
    • Semiconductor switching circuit
    • US20060082408A1
    • 2006-04-20
    • US11142455
    • 2005-06-02
    • Toshiki SeshitaYoshitomo Sagae
    • Toshiki SeshitaYoshitomo Sagae
    • H03K17/687
    • H03K17/6871H03K17/693
    • According to the present invention, there is provided a semiconductor switching circuit having: a common terminal; first, second, and third terminals; first, second, and third ground terminals; first, second, and third control terminals; a first through FET having a source and drain connected in series between the common terminal and first terminal, and a gate connected to the first control terminal via a first resistor; a second through FET having a source and drain connected in series between the common terminal and second terminal, and a gate connected to the second control terminal via a second resistor; a third through FET having a source and drain connected in series between the common terminal and third terminal, and a gate connected to the third control terminal via a third resistor; 11th and 12th shunt FETs each having a source and drain connected in parallel between the first terminal and first ground terminal; 21st and 22nd shunt FETs each having a source and drain connected in parallel between the second terminal and second ground terminal; and 31st and 32nd shunt FETs each having a source and drain connected in parallel between the third terminal and third ground terminal, wherein gates of the 11th and 22nd shunt FETs are connected to the third control terminal via 11th and 22nd resistors, respectively, gates of the 21st and 31st shunt FETs are connected to the first control terminal via 21st and 31st resistors, respectively, gates of the 12th and 32nd shunt FETs are connected to the second control terminal via 12th and 32nd resistors, respectively, and when a first electric potential is supplied only to a Jth (J is a natural number of 1 to 3) control terminal, and a second electric potential lower than the first electric potential is supplied to the rest of said control terminals, the common terminal and a Jth terminal are electrically connected, and the first to third terminals except for said Jth terminal and said common terminal are electrically disconnected.
    • 9. 发明申请
    • RADIO FREQUENCY SWITCH CIRCUIT
    • 无线电频率开关电路
    • US20090181630A1
    • 2009-07-16
    • US12354185
    • 2009-01-15
    • Toshiki SeshitaYoshitomo Sagae
    • Toshiki SeshitaYoshitomo Sagae
    • H04B1/18
    • H04B1/006H03K17/693H04B1/48
    • A radio frequency switch circuit includes: an antenna terminal; a first and second RF terminal; a first through transistor placed between the antenna terminal and the first RF terminal; a second through transistor placed between the antenna terminal and the second RF terminal; a first shunt transistor placed between ground and the first RF terminal; a second shunt transistor placed between the ground and the second RF terminal; and a distortion compensation circuit including a reverse parallel connected MOS capacitor whose capacitance around 0 volts has voltage dependence that is convex to the minus direction, the distortion compensation circuit being operable to compensate for voltage dependence of off-capacitance around 0 volts of the first and second through transistor and the first and second shunt transistor that is convex to the plus direction. Electrical connection between the antenna terminal and the first and second RF terminal is switchable.
    • 射频切换电路包括:天线端子; 第一和第二RF终端; 放置在天线端子和第一RF端子之间的第一通晶体管; 位于天线端子和第二RF端子之间的第二通过晶体管; 放置在地和第一RF端之间的第一并联晶体管; 放置在地和第二RF端之间的第二分流晶体管; 以及包括反向并联MOS电容器的失真补偿电路,所述反并联MOS电容器的电容约为0伏特,其电压依赖性正向负方向凸起,所述失真补偿电路可用于补偿第一和第二电压的0伏附近的关断电容的电压依赖性, 第二通过晶体管和对正方向凸起的第一和第二分流晶体管。 天线端子与第一和第二RF端子之间的电气连接是可切换的。